WO2002080243A1 - Methode de production d'un semi-conducteur a base d'un compose de nitriture iii, et element de semi-conducteur a base d'un compose de nitriture iii obtenu par cette methode - Google Patents
Methode de production d'un semi-conducteur a base d'un compose de nitriture iii, et element de semi-conducteur a base d'un compose de nitriture iii obtenu par cette methode Download PDFInfo
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- WO2002080243A1 WO2002080243A1 PCT/JP2002/002628 JP0202628W WO02080243A1 WO 2002080243 A1 WO2002080243 A1 WO 2002080243A1 JP 0202628 W JP0202628 W JP 0202628W WO 02080243 A1 WO02080243 A1 WO 02080243A1
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- compound semiconductor
- iii nitride
- mask
- group iii
- based compound
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 160
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 25
- -1 nitride compound Chemical class 0.000 title claims abstract description 24
- 239000000463 material Substances 0.000 claims abstract description 57
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- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
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- 230000007704 transition Effects 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02647—Lateral overgrowth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
Definitions
- the present invention relates to a method for producing a Group III nitride-based compound semiconductor.
- the present invention relates to a method for manufacturing a group III nitride-based compound semiconductor using lateral epitaxy growth (ELO).
- the group III nitride compound semiconductor is a binary system such as A1N, GaN, InN, ALGa-, A Lin, Ga x I ⁇ ⁇ — xN (R Both encompass the ternary system such as 0 ⁇ ⁇ 1) and the quaternary system of AlxGayln-yN (0 ⁇ x ⁇ l, 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1).
- the general formula Al x Ga y In... — y N (0 ⁇ x ⁇ l, 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1) is available.
- a group III nitride-based compound semiconductor is referred to as a p-type.
- the expression shall also include a group III nitride-based compound semiconductor doped with impurities to make it n-type. Background technology
- the light emitting spectrum is a direct transition over a wide range from ultraviolet light to red. It is a transferable semiconductor and is applied to light emitting devices such as light emitting diodes (LEDs) and laser diodes (LDs).
- LEDs light emitting diodes
- LDs laser diodes
- the wide band gap makes it possible to expect stable operation at higher temperatures than devices using other semiconductors.
- applications to transistors such as FETs are also being actively developed.
- arsenic (As) is not the main component, development of various semiconductor elements from the environmental perspective is expected.
- a sapphire is usually used as a substrate and is formed thereon.
- a group III nitride-based compound semiconductor When a group III nitride-based compound semiconductor is formed on a sapphire substrate, the sapphire and group III nitride-based compound semiconductors are formed. There is a problem that dislocations are generated due to the misfit of the lattice constant with the conductor, and the element characteristics are not good. The dislocations due to the misfit are threading dislocations penetrating the semiconductor layer in the vertical direction (perpendicular to the substrate surface), and are group III nitride-based compounds. There is a problem that a dislocation of about 10 9 cm— 2 propagates in a semiconductor. This propagates through each layer of the group III nitride-based compound semiconductor having a different composition to the uppermost layer.
- the element characteristics such as the threshold current of the LD, the element life of the LD and the element of the LED must be improved.
- the semiconductor element with low mobility becomes a semiconductor element due to the fact that electrons are scattered due to defects. Was staying at These were the same when using other substrates.
- FIG. 6 shows a substrate 91, a buffer layer 92 formed thereon, and a group III nitride-based compound semiconductor formed thereon. It shows layer 93.
- the substrate 91 is made of a conventional material such as sapphire
- the buffer layer 92 is made of a conventional material such as nitrogen nitride (A1N).
- A1N nitrogen nitride
- the sapphire substrate 91 and the group III nitride compound can be used.
- it is provided for the purpose of relaxing the misfit with the semiconductor layer 93, the occurrence of dislocations can be reduced to 0 even in this case. I can not do such a thing .
- the threading dislocation 901 propagates in the vertical direction (perpendicular to the substrate surface), which is caused by the buffer layer 92 and the group III nitride. It also penetrates through the compound semiconductor layer 93. In this way, various desired Group III nitride-based compound semiconductors are laminated on the upper layer of Group III nitride-based compound semiconductor layer 93 to obtain a semiconductor element.
- the dislocations that pass through the semiconductor element from the dislocations 902 reaching the surface of the group III nitride-based compound semiconductor layer 93 are changed. It will be transported vertically in the vertical direction. As described above, in the conventional technology, when forming a group III nitride-based compound semiconductor layer, it is difficult to prevent dislocation propagation from occurring. there were .
- the first feature of the invention is that a group III nitride-based compound semiconductor layer in which threading dislocations are suppressed by using lateral epitaxy growth.
- a group III nitride-based compound semiconductor is formed on a base layer by an epitaxy.
- a first mask forming step of forming the first mask that does not grow in the form of islands such as dots, stripes, or grids, and III.
- Securing growth space to secure growth space for epitaxial growth of group nitride-based compound semiconductors Securing growth space to form material Process and a second mask forming process that does not cause epitaxial growth of a group III nitride based compound semiconductor and a growth space
- Layers to be grown by the Pitaxial Growth process consisting of the Pitaxial growth process and the base layer based on the first and second masks. It is characterized in that it forms a mask so that it is almost completely covered from above the vertical.
- the “base layer” is an expression that includes all of the following cases. That is, (1) a so-called knofer layer, irrespective of the composition, is formed on a single or composite substrate irrespective of its composition, and (2) on a substrate. , (3) A substrate in which a so-called buffer layer is formed or not formed on a substrate, and a group III nitride-based compound semiconductor layer is formed.
- the island state does not necessarily refer to an area separated from each other, but the first mask is applied to the entire area of the wafer. The first mask may be continuous over a very wide range, such as in the form of a loop or a grid.
- the second feature is that the second mask forming process is performed by removing a part of the growth space securing material formed by the growth space securing step, and removing the first mask.
- the process of forming the material on the entire surface of the growth space securing material, and removing the second mask component material and growing it in the area with the first mask in the lower layer It is characterized by comprising a process and a step of exposing the growth space securing material formed in the space.
- the third feature is that the uppermost layer of the base layer has the same composition as the group III nitride-based compound semiconductor and has the same composition as the group III nitride-based compound semiconductor. It is characterized by being a body.
- the same composition means that a difference of about one dope (mole ratio of 1 unit, less than 1 cent, difference of less than 1) is ignored.
- the base layer is a single group III-nitride-based compound semiconductor substrate is naturally included in the invention described in claim 3.
- the fourth feature is that it is manufactured by a method of manufacturing a group III nitride-based compound semiconductor, which is one of the first feature and the third feature.
- This is a group III nitride-based compound semiconductor element characterized by being formed on an upper layer of a group III nitride-based compound semiconductor layer.
- the fifth feature is that it is manufactured by a method for manufacturing a group III nitride compound semiconductor, which is one of the first features and the third feature. It is characterized by being obtained by laminating a different group III nitride-based compound semiconductor layer on an upper layer of a group III nitride-based compound semiconductor layer. It is a group III nitride compound semiconductor light emitting device.
- the sixth feature is that the first feature is a feature of the third feature and the third feature is the method of manufacturing a group III nitride-based compound semiconductor, which is one of the features. And removing substantially all of the portion below the second mask to obtain a group III nitride-based compound semiconductor substrate. This is a method for producing a Group III nitride-based compound semiconductor substrate.
- FIG. 1 shows a diagram having a substrate 1 and a buffer layer 2 for the sake of understanding.
- the epitaxial layer is a base layer that produces a group III nitride-based compound semiconductor layer that has threading dislocations in the vertical direction when grown by annealing.
- the region where the vertical threading dislocations are reduced by the technology unique to the present invention is used.
- the purpose is to obtain a group III nitride-based compound semiconductor layer, and the substrate 1 and the buffer layer 2 are not indispensable elements for the present invention.
- the film is formed through the buffer layer 2, and penetrates vertically (perpendicularly to the substrate tffl).
- This is an example in which the present invention is applied to the first group III nitride-based compound semiconductor layer 31 having a dislocation, and the main effect of the present invention is explained. Clarify.
- the base and The resulting layer may be considered to be only the first group III nitride-based compound semiconductor layer 31, and the substrate 1, the buffer layer 2, and the first It may be considered that the group III nitride compound semiconductor layer 31 is combined.
- a first mask material 41 is formed on the entire surface of the compound semiconductor layer 31 (FIG. 1, (a)).
- the first mask material 41 is formed in the shape of an island, such as a dot, a stripe, or a lattice, to obtain a first mask 41m.
- the first surface of the first group III nitride-based compound semiconductor layer 31 is scattered and exposed ((b) in FIG. 1, the above is the first mask formation). Process).
- the gap securing material 5 is formed ((c) in FIG. 1).
- a material for securing the growth space it is possible to use a compound containing a single element such as an insulator, a dielectric, or a metal, or a compound containing a mixture.
- the second group III nitride-based compound semiconductor is epitaxially grown, and the growth space is confirmed to be a growth space for the second time.
- the packing material 5 is processed by etching or the like. Part of the formed growth space securing material 5 s is in contact with the first surface of the first Group III nitride-based compound semiconductor layer 31 (see FIG. 1). (d), growth space securing process).
- a second mask material 42 is formed on the entire surface ((e) of FIG. 1).
- the second mask material 42 has a shape that covers the formed growth space securing material 5 s.
- the second mask material 42 is formed into a desired shape by etching or the like. To shape.
- the first group III nitride-based compound semiconductor layer is formed so as to be almost entirely covered from above vertically.
- the second mask 42m is, for example, a grid or mesh, the first mask. If it is a 4 lm power strip, the second mask 4 2 m is a strip in the area where the first mask 4 lm does not exist. It is.
- the second mask 42m needs to have a "leg" so that it can be placed higher than the first mask 41m. We will call it the second mask 42m including the part that will be the "legs".
- the formed growth space securing material 5 s is removed by, for example, a jet etch or the like.
- the first group III nitride-based compound semiconductor layer 31 is formed of the formed growth space securing material.
- the first mask 41 is below the second mask 42m.
- the top epitaxial growth is possible in the upper part, and the upper part of the first mask 41 m is located in the area without the second mask 42 m.
- vertical epitaxial growth is possible.
- the vertical epitaxy from below was grown in the area without the second mask 42 m. It is possible to grow laterally epitaxially from the part ((g) in Fig. 1).
- the first Mask 4 1 m Force S The first group III nitride-based compound semiconductor layer 31 on which no S is formed
- the vertical epitaxial growth from the surface force The threading dislocation that propagates to the second mask can be stopped at a position of 42 m in the second mask.
- the first mask 41 1 m above the second group III nitride compound semiconductor due to the lateral growth without threading dislocations Layer 32 covers, and vertical epitaxy can be achieved in the part where the second mask 42m is not formed above. .
- the lattice constants and other physical quantities are equal. Therefore, rapid epitaxy growth is possible between the two layers (the third feature).
- an element in the upper layer of the group III nitride-based compound semiconductor layer obtained in the above step By forming an element in the upper layer of the group III nitride-based compound semiconductor layer obtained in the above step, a layer with few defects and a high mobility can be formed. It can be a semiconductor element that has
- FIG. 1 is a cross-sectional view showing a manufacturing process of a group II nitride semiconductor according to a first embodiment of the present invention.
- FIG. 3 is a sectional view showing a modified example.
- FIG. 4 is a cross-sectional view showing the structure of a III nitride-based compound semiconductor light emitting device according to a second embodiment of the present invention.
- FIG. 5 is a cross-sectional view showing the structure of a III nitride semiconductor light emitting device according to a third embodiment of the present invention.
- FIG. 6 is a cross-sectional view showing threading dislocations propagating through a group III nitride compound semiconductor. Best form to carry out the invention
- Fig. 1 shows an outline of an example of an embodiment of a method for producing a group III nitride-based compound semiconductor of the present invention.
- a buffer layer 2 and a first group III nitride-based compound semiconductor layer 31 are formed on a substrate 1, and a first mask material 41 is formed on the entire surface (see FIG. One (a)).
- the first mask material 41 is formed in the shape of an island, such as a point, a stripe, or a lattice, to obtain a first mask 41m.
- the first surface of the first group III nitride-based compound semiconductor layer 31 is scattered and exposed (FIG. 1, (b)).
- the growth sky is formed so as to cover the exposed surface of the island-shaped first mask 4 lm and the scattered first group III nitride compound semiconductor layer 31.
- Form the space securing material 5 ((c) in Fig. 1).
- the growth space becomes a growth space for the epitaxial growth of the second III nitride semiconductor.
- the securing material 5 is formed by etching. Part of the formed growth space securing material 5 s is in contact with the first surface of the first Group III nitride-based compound semiconductor layer 31 (see (d in FIG. 1). )).
- a second mask material 42 is formed on the entire surface ((e) in FIG. 1). After that, the second mask material 42 is formed into a desired shape. Forming by etching or the like. At this time, the first mask 4 lm and the second mask 42 m determine whether the first III nitride-based compound semiconductor layer is vertically above. They are formed so as to be covered almost all over (Fig. 1 (f)). Since the second mask 42m is disposed above the first mask 4lm, a portion serving as a "leg" is provided. Next, the formed growth space securing material 5 s is removed by a weight etch.
- the portion of the first group III nitride-based compound semiconductor layer 31 that has been in contact with the formed growth space securing material 5 s is exposed.
- a curved growth space appears, surrounded by the first mask 4 lm and the upper second mask 42 m (FIG. 1, (g)).
- the second group III nitride-based compound semiconductor layer 32 is grown vertically and horizontally.
- the first mass The vertical epitaxial growth from the surface of the first group III nitride-based compound semiconductor layer 31 in which no holes 41 m are formed is generated.
- the upper side of the first mask 4 lm is covered by lateral epitaxy growth.
- a vertical mask is formed so that the second mask 42m penetrates the unformed portion. All the upper part of the second mask 42m by the lateral epitaxy at a position higher than the second mask 42m
- the nitride-based compound semiconductor layer 32 is covered.
- the substrate is made of sapphire, silicon (Si), or charcoal. containing (S iC), sp e, channel (MgA 1 2 0 4), NdGa0 3, LiGa0 2, Z n 0, other inorganic crystals board of M g 0 its, also Li down I spoon moth Li ⁇ beam
- a III-V group compound semiconductor such as hi-gadium, gallium nitride (GaN) or other group III nitride-based compound semiconductor You can use the power S.
- an organic metal vapor phase growth method (M0CVD or M0VPE) force S is preferable.
- Phase growth method (MBE), /, gas-phase growth method (Haide VPE), liquid phase growth method (LPE), etc. may be used. It may be formed by any suitable growth method.
- the sapphire substrate when stacking a Group III nitride-based compound semiconductor on a sapphire substrate, the sapphire substrate must be formed with good crystallinity. It is preferable to form a buffer layer to correct the lattice mismatch. Even if other substrates are used, it is necessary to set a buffer layer.
- a buffer layer Group III nitride based compound semiconductor AlxGa y N
- This buffer layer may be a single layer or a multi-layer having a different composition, etc.
- the buffer layer may be formed at a low temperature of 380 to 420 ° C. It may be formed at a high temperature, or conversely, may be formed by the MOCVD method at a temperature in the range of 1000 to 1180 ° C.
- the DC magnetron sputtering device may be used. Using high-purity metal aluminum and nitrogen gas as raw materials, the A1N force is formed by the reactive knotter method.
- the force S can be used to form a buffer layer.
- the buffer layer is preferably run at 200-600 ° C, more preferably at 300-500 ° C, and more preferably at 350-500 ° C.
- the temperature is 450 ° C.
- the thickness of the buffer layer is 100 to 3000 A force.
- Desirable more desirable, 100-400 A power s Desirable, most desirable, 100-300 A.
- multilayers for example, Al, Gax- xN (0 ⁇ X ⁇ 1) Alternating layers of force and GaN layers, forming layers of the same composition, for example at a temperature below 600 ° C Alternating with and above 1 000 ° C There are methods to achieve this. Even if I set look if the Certainly theory this is found rather good, multi heavy layer on three or more Group III ⁇ I spoon-based I spoon compound Semiconductors Al.Ga y Im- x - y N ( 0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x + y ⁇ 1) may be stacked.
- the buffer layer is amorphous and the intermediate layer is single crystal. Buffer and middle The layer may be formed into multiple cycles as one cycle, and the repetition may be any cycle. The greater the repetition, the better the crystallinity.
- the group III nitride compound semiconductors in the buffer layer and upper layer are composed of boron (B) and thallium (T1) in part of the composition of the group III element. Even after replacement, part of the composition of nitrogen (N) is replaced with phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Bi). Even if it is replaced, the present invention can be applied practically. In addition, it is also good that the element is doped to such an extent that the element can be displayed in the composition.
- Al x G ai -x N Al x G ai -x N (a group III nitride-based compound semiconductor having no indium (In) or arsenic (A s) in its composition)) 0 ⁇ X ⁇ 1) Indium (In) or Nitrogen (Indium), whose atomic radius is larger than that of Aluminum (Al) or Galium (Ga) N)
- Arsenic (A s) which has a larger diameter than the diameter of the element, reduces the expansion distortion of the crystal due to the removal of the nitrogen element.
- the impurities may easily enter the group III element, and the p-type crystals may be used in this case. It can also be obtained with a green.
- the threading dislocation can be further reduced to about 1/100 to 1/100. It can also be used. 2.
- each group III nitride-based compound semiconductor It is even better to dope layers with elements that have a larger atomic radius than the main constituent elements.
- the light emitting element it is desirable to use a binary or ternary system of a Group III nitride-based compound semiconductor inherently. Ray.
- the surface of the group III nitride-based compound semiconductor layer ( ⁇ 1 It is useful to apply a mask in a strip shape so that it is perpendicular to the 1 — 20 ⁇ plane) or the m plane ( ⁇ 1 1 0 0 ⁇ plane). .
- the above masks may be arbitrarily designed in the form of islands, grids, etc.
- the lateral epitaxy growth surface may be not only a surface perpendicular to the substrate surface but also a growth surface having an oblique angle with respect to the substrate surface.
- a light emitting element is used.
- the present invention is not limited to the following examples, and the present invention can be applied to any element. It discloses a method for manufacturing a compound semiconductor.
- the first mask 4 lm and the second mask 42 m are non-overlapping when viewed from above, as shown in FIG. In other words, the area indicated by O overlaps, that is, the first mask 41 m is located below and the second mask 42 is located above. It is good to use m.
- the "legs" of the second mask 42m are provided on the GaN layer 31 in a stripe shape having a width of l / xm.
- the force S, the first mask 41 1 m may be provided with “legs”, or both may be provided as “pillars”.
- a laser diode (LD) 100 shown in FIG. 4 was formed on the wafer formed in the same manner as in the first embodiment as follows. However, when forming the GaN layer 32, silane (SiH 4 ) is introduced, and the GaN layer 32 is formed of a silicon-doped n-type GaN force. Layer. For simplicity of the figure, the sapphire substrate 1 and the buffer layer 2, the GaN layer 31 and the same height as the mask 4 lm and 42 m The wafer 100 (the part denoted by R in FIG. 1 (h)) is described together with the GaN layer 32 and the other GaN layers 32 are GaN layers 32. The layer is described as layer 103 (the part marked G in Fig. 1 (h)).
- the sapphire substrate, the A1N-forced knocker layer, the GaN layer 31 and the masks are at the same height as the 41m and 42m n
- the silicon (Si) -doped Al is added to the wafer layer 100 composed of the n-type GaN layer 32 and the n-type GaN layer 103. .. 8 G a. .
- the electrode 11 OA made of gold (Au) is partially etched on the p-contact layer 109 and partially etched until the n-type GaN layer 103 is exposed.
- an electrode 110B composed of aluminum (A1) force was formed.
- the laser diode (LD) formed in this way markedly improved the element lifetime and the light emission efficiency.
- a light emitting diode (LED) 200 as shown in FIG. 5 was formed as follows.
- the GaN layer 32 having the same height is also described as a wafer 200 (the portion denoted by R in FIG. 1 (h)), and the other GaN layers 32 are referred to as GaN layers 32. It is described as layer 203 (the part marked G in Fig. 1 (h)).
- the resulting silicon, silicon has a silicon (Si) -doped layer on top of the n-type GaN layer. . 8 63. , 92 ? ⁇ , 11 cladding layers 204, light emitting layers 205, and magnesium (Mg) doped Al. .. s Ga.
- the p-layer 206 consisting of 92 N force and the p-contact layer 206 consisting of GaN force with magnesium (Mg) doping were formed. .
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Description
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EP02705365A EP1378934A1 (en) | 2001-03-22 | 2002-03-19 | Production method of iii nitride compound semiconductor, and iii nitride compound semiconductor element based on it |
US10/472,261 US6844246B2 (en) | 2001-03-22 | 2002-03-19 | Production method of III nitride compound semiconductor, and III nitride compound semiconductor element based on it |
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JP2001083490A JP2002280314A (ja) | 2001-03-22 | 2001-03-22 | Iii族窒化物系化合物半導体の製造方法、及びそれに基づくiii族窒化物系化合物半導体素子 |
JP2001-083490 | 2001-03-22 |
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EP (1) | EP1378934A1 (ja) |
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- 2002-03-19 EP EP02705365A patent/EP1378934A1/en not_active Withdrawn
- 2002-03-19 US US10/472,261 patent/US6844246B2/en not_active Expired - Fee Related
- 2002-03-22 TW TW091105553A patent/TW548720B/zh not_active IP Right Cessation
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Also Published As
Publication number | Publication date |
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EP1378934A1 (en) | 2004-01-07 |
JP2002280314A (ja) | 2002-09-27 |
TW548720B (en) | 2003-08-21 |
US6844246B2 (en) | 2005-01-18 |
US20040087115A1 (en) | 2004-05-06 |
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