TWI594339B - 半導體裝置和其之製造方法 - Google Patents

半導體裝置和其之製造方法 Download PDF

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Publication number
TWI594339B
TWI594339B TW102140668A TW102140668A TWI594339B TW I594339 B TWI594339 B TW I594339B TW 102140668 A TW102140668 A TW 102140668A TW 102140668 A TW102140668 A TW 102140668A TW I594339 B TWI594339 B TW I594339B
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Taiwan
Prior art keywords
interposer
layer
forming
semiconductor die
dummy substrate
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TW102140668A
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TW201430967A (zh
Inventor
杜旺朱
朴杜玄
佩強錫
李吉弘
徐詳民
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艾馬克科技公司
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Publication of TW201430967A publication Critical patent/TW201430967A/zh
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Description

半導體裝置和其之製造方法 【相關申請案之交互參考/整合參考】
本申請案針對韓國智慧財產局於2012年11月9日所提申並命名為“半導體裝置和其製造方法”之韓國專利申請案號10-2012-0126932進行參考、主張優先權及利益，在此將其內容全體一併整合參考之。
本發明關於一種半導體裝置和其之製造方法。
用於形成具有中介層之電子封裝之現有系統、方法及/或架構係不充分的。透過習慣性和傳統性這類方法與本申請書剩餘部分參考圖式所提出之本發明做比較，習慣性和傳統性方法之進一步限制與缺點對一熟知此項技術之人士會變得顯而易見。
本發明之一態樣為一種半導體裝置之製造方法，該方法包括：在一虛擬基板上形成包含一重分佈層和一介電層之中介層；連接一半導體晶粒至面對該中介層上部分之重分佈層；使用一封膠來密封該半導體晶粒；及自該中介層中移除該虛擬基板。
本發明之一態樣為一種半導體裝置，包括：一中介層，包括一重分佈層和一介電層；一半導體晶粒，連接至面對該中介層上部分之重 分佈層；密封該半導體晶粒之封膠；及一凸塊，連接至面對該中介層下部分之重分佈層。
100‧‧‧半導體裝置
110‧‧‧中介層
111‧‧‧重分佈層
112‧‧‧介電層
113‧‧‧凸塊金屬
120‧‧‧半導體晶粒
121‧‧‧連接端
121a‧‧‧銅柱
121b‧‧‧焊料蓋
122‧‧‧焊料
130‧‧‧底膠
140‧‧‧封膠
150‧‧‧凸塊
113a‧‧‧金層
113b‧‧‧鎳層
113c‧‧‧銅層或鋁層
200‧‧‧半導體裝置
210‧‧‧電路板
211‧‧‧電路圖案
212‧‧‧絕緣層
220‧‧‧底膠
230‧‧‧遮蓋物
240‧‧‧熱傳導黏接劑
250‧‧‧焊球
260‧‧‧被動裝置
310‧‧‧虛擬基板
311‧‧‧種子層
311a‧‧‧鈦層或鈦/鎢層
311b‧‧‧銅層
該些附圖係包含提供本揭示進一步了解並整合且構成本說明書一部分。該些圖式說明本揭示示範性實施例並連同該說明一起用以說明本揭示原理。在該些圖式中：圖1說明根據一實施例之半導體裝置剖面圖。
圖2說明根據另一實施例之半導體裝置剖面圖。
圖3A至圖3F說明根據另一實施例依序顯示之半導體裝置製造方法之剖面圖。
圖4A至圖4D說明根據另一實施例之半導體裝置製造方法中之製造中介層前面部分之方法的剖面圖。
圖5A至圖5E說明根據另一實施例之半導體裝置製造方法中之製造中介層後面部分之方法的剖面圖。
圖6A至圖6D說明根據另一實施例之半導體裝置製造方法中之製造中介層前面部分之方法的剖面圖。
圖7A至圖7E說明根據另一實施例之半導體裝置製造方法中之製造中介層後面部分之方法的剖面圖。
圖8A至圖8D說明根據另一實施例之半導體裝置製造方法中之製造中介層前面部分之方法的剖面圖。
圖9A至圖9E說明根據另一實施例之半導體裝置製造方法中之製造中介層後面部分之方法的剖面圖。
現在參考該些附圖將示範實施例更完整地說明於後。然而，本發明各種觀點可以不同形式來具體實施，且因此所提供示範性實施例不應被建構以做為限制。
各種實施例關於一半導體裝置和其製造方法。大體上，在一半導體晶粒被安裝於一中介層上以後，將該中介層堆疊在另一半導體晶粒或基板上之半導體裝置係稱為一2.5D封裝。通常地，3D封裝代表將一半導體晶粒堆疊在另一半導體晶粒或基板上而沒有一中介層之半導體裝置。
然而，上述2.5D封裝應具有複數個直通矽晶穿孔，使得電性訊號流動於一上面半導體晶粒及一下面半導體晶粒或基板之間。因此，在根據相關技術之半導體裝置中，該直通矽晶穿孔以及電路圖案應被形成於該中介層中。結果，製造成本可能昂貴，同時，該半導體裝置之厚度會增加。
本發明一示範觀點提供包含具有相當薄厚度之中介層而沒有一直通矽晶穿孔之半導體裝置和該半導體裝置之製造方法。
本發明另一示範觀點提供一半導體裝置，其中，由於例如一中介層係形成於由矽或玻璃所形成之虛擬基板上且能夠使用各種材料來製造並實現於一內嵌式被動結構中，一具有次微米單位之微細間距之重分佈層能夠被形成，以及提供該半導體裝置之製造方法。
根據實施例中之至少一者，一半導體裝置之製造方法包含：在一虛擬基板上形成包含一重分佈層和一介電層之中介層，連接一半導體晶粒至面對該中介層上部分之重分佈層，使用一封膠來密封該半導體晶 粒，自該中介層中移除該虛擬基板，以及連接一凸塊至面對該中介層下部分之重分佈層。
該虛擬基板可例如包含一矽或玻璃。該介電層可例如包含一氧化矽層、一氮化矽層或一聚合物層。一焊料可例如形成於面對該中介層上部分之重分佈層上，且該半導體晶粒可被連接至該焊料。
在連接該半導體晶粒後，一底膠可例如填充於該半導體晶粒及該中介層之間。在密封該半導體晶粒後，該封膠可例如被研磨以露出該半導體晶粒頂部表面。移除該虛擬基板可例如包含研磨和蝕刻該虛擬基板以露出面對該中介層下部分之重分佈層。
連接該凸塊可例如包含：在面對該中介層下部分之重分佈層上形成一凸塊下金屬層；並連接該凸塊至該凸塊下金屬層。形成該中介層可例如包含先前在面對該中介層下部分之重分佈層上所形成之凸塊下金屬層。
在連接該凸塊後，該凸塊可例如安裝於一電路板上。一底膠可例如填充於該中介層和該電路板之間。一遮蓋物可例如附接至該電路板以遮蓋該半導體晶粒。
形成該中介層可例如包含：在該虛擬基板上形成一種子層；在該種子層上形成並圖案化該重分佈層；在該重分佈層外面形成該介電層；研磨並移除該虛擬基板；及移除該種子層。
形成該中介層可例如包含：在該虛擬基板上形成一種子層；在該種子層上形成一凸塊下金屬層；在該凸塊下金屬層上形成並圖案化該重分佈層；在該重分佈層外面形成該介電層；研磨並移除該虛擬基板；及 移除該種子層。圖案化該凸塊下金屬層可例如包含移除在該凸塊下金屬層外面所形成之種子層。
根據另一實施例，一半導體裝置包含：一中介層，包含一重分佈層和一介電層；一半導體晶粒，連接至面對該中介層上部分之重分佈層；密封該半導體晶粒之封膠：及一凸塊，連接至面對該中介層下部分之重分佈層。
該介電層可例如包含一氧化矽層、一氮化矽層或一聚合物層。一焊料可例如形成於面對該中介層上部分之重分佈層上，且該半導體晶粒可被連接至該焊料。一底膠可例如填充於該半導體晶粒及該中介層之間。該半導體晶粒頂部表面可例如貫穿該封膠而露出。
一凸塊下金屬層可例如置於面對該中介層下部分之重分佈層和該凸塊之間。該凸塊下金屬層可例如置於該中介層內部。該凸塊可例如安裝於一電路板上。一底膠可例如填充於該中介層和該電路板之間。一遮蓋物可例如附接至該電路板以遮蓋該半導體晶粒。
現在參考該些附圖將各種示範實施例更完整地說明於後。
實施例可以不同形式來具體實施，且不應被建構以做為在此所提供實施例之限制。更確切地說，這些實施例被提供以讓本揭示徹底且完整並能傳達本揭示範圍給那些熟知此項技術之人士。
在該些圖式中，該些層與區域尺寸可被誇大以提供簡潔說明。如同在此所用地，該用語包含該些相關表列項目中之一者或更多之任意和所有結合。
在下列說明中，該技術用語只被使用於說明一特定示範性實 施例而非限制本揭示。除非參考至對立方，否則單數形式用語可包含複數形式。“包含”、“包括”、“正包含”、“正包括”用語表示一特性、一區域、一固定編號、一步驟、一製程、一構件及/或一元件，但不排除其它特性、區域、固定編號、步驟、製程、構件及/或元件。
再者，儘管像一第一和一第二之用語被使用以說明本發明各實施例中之各種構件、元件、區域、層及/或部分，但是該些構件、元件、區域、層及/或部分並不受限於這些用語。這些用語只被使用以區分一構件、元件、區域、層或部分與另一者。因此，在一實施例中被稱之為一第一構件、一第一元件、一第一區域、一第一層及/或一第一部分之構件、元件、區域、層及/或部分在另一實施例中可被稱之為一第二構件、一第二元件、一第二區域、一第二層及/或一第二部分。
再者，本說明書中所使用之用語“半導體晶粒”可例如包含具有一主動電路或一被動電路、一半體體晶圓或它的等效物之半導體晶片。再者，在本說明書中，一虛擬基板可例如包含矽、玻璃或它的等效物。再者，在本說明書中，一介電層可例如包含矽、玻璃或它的等效物。
圖1說明根據一實施例之半導體裝置剖面圖。
參考至圖1，根據一實施例之半導體裝置100包含一中介層110、一半導體晶粒120、一底膠130、一封膠140及一凸塊150。
該中介層110包含一重分佈層111和一介電層112。例如，該中介層110可包含具有多層結構之重分佈層111，且該重分佈層111可由該介電層112來保護之。置於底部和頂部表面之每一面上之重分佈層111係貫穿該介電層112而直接露出。再者，置於該介電層112之底部和頂部表 面之每一面上之重分佈層111可例如具有一相當大寬度以讓該凸塊稍後可輕易地被形成。如上所述地，具有該相當大寬度之重分佈層111部分可例如被定義為一墊片或平面。
在此，該重分佈層111可例如由銅、鋁及它們的等效物中擇一來構成之。再者，該介電層112可例如由一氧化矽層、一氮化矽層、一聚合物層和它們的等效物中擇一來構成之。然而，本揭示並不限定於這些材料。舉例來說，當該氧化矽層或該氮化矽層被充當該介電層112使用時，該重分佈層111可例如具有次微米單位之微細間距。在一些例子中，一被動裝置可被具體實施。當該介電層112包含該氧化矽層或該氮化矽層時，這個可例如因為藉由使用一半導體製造(FAB)程序所具體實現之線寬來圖案化該重分佈層111和該介電層112而得之。如先前所知地，一封裝製程所具體實現之線寬可顯著地大於該半導體FAB製程中之那個實施例。更進一步，既然該中介層110不像一相關技術般地，可以不需要直通矽晶穿孔，該中介層110可具有一薄厚度並可利用低成本來製造之。
該半導體晶粒120可例如包含一共同記憶體、一圖形處理單元(GPU)、一中央處理單元(CPU)或它的等效物。然而，本揭示並不限定於這些類型。該半導體晶粒120包含可電性連接至該中介層110之連接端121。如所示地，該連接端121可例如包含一銅柱121a和置於該銅柱121a一末端上之一焊料蓋121b。該連接端121可例如包含一共同焊料凸塊。再者，一焊料122可先被置於該連接端121和該中介層110之間，也就是面對該中介層110上部分之重分佈層111之頂部表面上，以輕易地連接該中介層110至該連接端121。結果，該半導體晶粒120可電性連接至面對該中介層110上 部分之重分佈層111。
該底膠130係填充於該中介層110和該半導體晶粒120之間。更特別地，該底膠130可被置於該中介層110和該半導體晶粒120之間且同時環繞該半導體晶粒120下部分之一側表面。該底膠130可例如改善該中介層110和該半導體晶粒120間之物理/機械耦合。此外，該底膠130可阻止該中介層110和該半導體晶粒120彼此間因為例如該中介層110和該半導體晶粒120間各自熱膨脹係數的差異所產生之應力而分離。
該封膠140環繞該中介層110上方所置之半導體晶粒120以保護該半導體晶粒對抗外部環境。更特別地，該封膠140環繞該半導體晶粒120和該底膠130之表面。然而，該半導體晶粒120之頂部表面可曝露於該封膠140外面以改善該半導體晶粒120之散熱執行效率。
在此，該封膠140之一側表面可齊平於該中介層110之一側表面。再者，該封膠140之一頂部表面可齊平於該半導體晶粒120之頂部表面。結果，根據該目前實施例之半導體裝置100可具有一小型結構。
該凸塊150係連接至面對該中介層110下部分之重分佈層111。更特別地，一凸塊金屬層113係置於貫穿該中介層110底部表面而露出之重分佈層111，且接著，該凸塊150係連接至該凸塊金屬層113。該凸塊150相較於一共同焊球尺寸可例如具有一相當小的尺寸。因此，該凸塊150可被定義為一微凸塊。例如，該凸塊150可具有大約100微米或更小之直徑。然而，本揭示並不限定於此直徑。在一些例子中，該凸塊150之直徑可大於上述直徑。另一方面，將說明於下之焊球可具有大約200微米至400微米直徑。
因此，根據該目前實施例之半導體裝置100可例如製造成一覆晶形狀。因此，具有該覆晶形狀之半導體裝置100可例如安裝在用於共同半導體裝置或半導體封裝之一電路板上。替代性地，根據該目前實施例之半導體裝置100可被安裝於一母板或主機板上。
因此，根據該目前實施例可例如提供具有一相當薄厚度之中介層110而沒有直通矽晶穿孔之半導體裝置100(覆晶裝置)。再者，既然例如該目前實施例使用由一非有機材料所構成之氧化矽層或氮化矽層，具有次微米單位之微細間距之重分佈層111可被提供。再者，該目前實施例可例如提供包含可被實現於一具體實施之被動結構中之中介層110之半導體裝置100。
圖2說明根據另一實施例之半導體裝置剖面圖。
參考至圖2，根據另一實施例之半導體裝置200包含上述裝置100(此後稱之為一覆晶裝置)、一電路板210、一底膠220、一遮蓋物230、一熱傳導黏接劑240及一焊球250。
如上所述地，該覆晶裝置100具有該底部表面，其上置放該凸塊150。該凸塊150係安裝於該電路板210上。
該電路板210包含一電路圖案211和一絕緣層212。更進一步，一被動裝置260可例如安裝於該電路板210上。再者，如上所述地，該覆晶裝置100之凸塊150係電性連接至該電路板210之電路圖案211。
該底膠220係填充於該覆晶裝置100和該電路板210之間。也就是該底膠220環繞該凸塊150以及該覆晶裝置100之中介層110和該封膠140之側表面。因此，它可阻止該覆晶裝置100和該電路板210彼此間因 為該覆晶裝置100和該電路板210間各自之熱膨脹係數的差異所產生之應力而分離。
該遮蓋物230可被附接至該電路板210且同時近乎環繞該覆晶裝置100。因此，可由該遮蓋物230保護該覆晶裝置100來對抗外部環境。該遮蓋物可例如由一金屬、陶瓷或它的等效物所構成以改善散熱執行效率，但本揭示並不限定於此。
該熱傳導黏接劑240係置於該覆晶裝置100和該遮蓋物230之間與該遮蓋物230和該電路板210之間。該熱傳導黏接劑240可快速地傳送該覆晶裝置100所產生之熱至該遮蓋物230。再者，該熱傳導黏接劑240可將該遮蓋物230固定至該覆晶裝置100和該電路板210。
該焊球250係連接至該電路板210之底部表面。也就是該焊球250係電性連接至該電路板210之電路圖案211。因為該焊球250之故，根據該目前實施例之半導體裝置200可例如安裝於例如一電腦、一智慧型手機和雷同者之電子設備的母板或主機板上。
因此，該目前實施例可例如一2.5D半導體裝置，包含具有一相當薄厚度之中介層110而沒有直通矽晶穿孔之半導體裝置100(覆晶裝置)。再者，既然例如該目前實施例使用由一非有機材料所構成之氧化矽層或氮化矽層，具有次微米單位之微細間距之重分佈層111可被提供。再者，該目前實施例可提供該半導體裝置200，內含有可被實現於一內嵌式被動結構中之中介層110之半導體裝置100。
圖3A至圖3F說明根據另一實施例依序顯示之半導體裝置製造方法之剖面圖。
參考圖3A至圖3F，根據一實施例之半導體裝置100之製造方法包含在一虛擬基板310上形成一中介層110，連接一半導體晶粒120至該中介層110，使用一封膠140來密封該半導體晶粒120，研磨該封膠140，研磨該虛擬基板310，以及連接一凸塊150。現在將這個詳述之。
如圖3A和圖3B中所示地，在該虛擬基板310上形成該中介層110之步驟中，該中介層110係直接形成於該虛擬基板310上。也就是包含一重分佈層111和一介電層112之中介層110係直接形成於該虛擬基板310上。如上所述地，該重分佈層111可例如具有一多層結構。具有一相當大寬度之重分佈層111(其可被定義為一墊片或平面)可被形成於該介電層112之頂部和底部表面中之每一面上。在此，該重分佈層111可例如由銅、鋁及它們的等效物中擇一來構成之。再者，該介電層112可例如由一氧化矽層、一氮化矽層、一聚合物層和它們的等效物中擇一來構成之。然而，本揭示並不限定於這些材料。更進一步，一焊料122可例如先被形成於該介電層112之一頂部表面上所形成之重分佈層111(一墊片或平面)上，以在稍後輕易地電性連接該半導體晶粒120至其上。在此，該虛擬基板310可例如由矽、玻璃和它們的等效物中之一者所構成。然而，本揭示並不限定於虛擬基板310類型。如上所述地，既然例如由一非有機材料所構成之氧化矽層或氮化矽層被充當該虛擬基板310使用，具有一微細間距和微細寬度之重分佈層111可被形成。
如圖3C中所示地，在連接該半導體晶粒120至該中介層110之步驟中，該半導體晶粒120係電性連接至該中介層110。也就是該半導體晶粒120之一連接端121(一銅柱121a和一焊料蓋121b)係電性連接至先前形 成於該中介層110上之焊料122。更進一步，一底膠130係填充於該中介層110和該半導體晶粒120之間。該底膠130遮蓋該半導體晶粒120之一側表面的下面區域。
如圖3D中所示地，在使用一封膠140來密封該半導體晶粒120之步驟中，該半導體晶粒120係使用該封膠140來密封於該中介層110上。也就是形成於該中介層110上之底膠130和半導體晶粒120之表面可由該封膠140所環繞。
如圖3E中所示地，在研磨該封膠140之步驟中，形成於該半導體晶粒120上之封膠140被研磨並移除一預定厚度。例如，該封膠140可被研磨並移除，直到該半導體晶粒120之頂部表面曝露於外為止。
如圖3F中所示地，在研磨該虛擬基板310之步驟中，置於該中介層110下方之虛擬基板310被研磨及/或蝕刻，並因此被移除。因此，該重分佈層111(該墊片或平面)係貫穿該中介層110之下部分而曝露於外。
雖未顯示，但一凸塊下金屬113可被形成於上述之貫穿該中介層110之下部分而外露之重分佈層111上，且該凸塊150可被連接至該凸塊下金屬層113。(見圖1)
更進一步，在該已形成半導體裝置100，也就是該覆晶裝置100中，該凸塊150可被安裝於該電路板210上。再者，一底膠220可例如形成於該覆晶裝置100和該電路板210之間。更進一步，一遮蓋物230可例如透過一熱傳導黏接劑來附接至該覆晶裝置100和該電路板210。再者，該焊球250可被連接至該電路板210之底部表面，其可例如形成該2.5D封裝裝置200。(見圖2)
因此，該目前實施例可例如提供具有一相當薄厚度之中介層而沒有直通矽晶穿孔之半導體裝置100和包含該半導體裝置100之半導體裝置200之製造方法。再者，既然例如該中介層110係形成於由矽或玻璃所構成之虛擬基板310上，具有次微米單位之微細間距之重分佈層111可被形成。此外，該目前實施例可提供包含可例如使用各種材料來形成並實現於一內嵌式被動結構中之中介層110之半導體裝置100和包含該半導體裝置100之半導體裝置200之製造方法。
圖4A至圖4D說明根據另一實施例之半導體裝置100之製造方法中之製造中介層110前面部分之方法的剖面圖。圖5A至圖5E說明根據另一實施例之半導體裝置100之製造方法中之製造中介層110後面部分之方法的剖面圖。
如圖4A至圖4D和圖5A至圖5E中所示地，形成該中介層110之方法包含在一虛擬基板310上形成一種子層311，圖案化一重分佈層111，蝕刻該種子層311，形成一介電層112，移除該虛擬基板310及移除該種子層311。現在將這個詳述之。
如圖4A中所示地，在該虛擬基板310上形成該種子層311之步驟中，一鈦層311a/銅層311b或一鈦/鎢層311a/銅層311b可例如形成於該虛擬基板310之整個頂部表面以提供將在稍後被使用於電鍍該重分佈層111之種子層311。
如圖4B中所示地，在圖案化該重分佈層111之步驟中，該重分佈層111被圖案化並形成於該種子層311上。也就是在一銅層或一鋁層被電鍍在該種子層311之整個頂部表面上之後，一微影成像製程被執行以 形成具有一預定圖案之重分佈層111。在此，形成於該重分佈層111外面之種子層311尚未被移除。
如圖4C中所示地，在蝕刻該種子層311之步驟中，例如，形成於該重分佈層111外面之種子層311之銅層311b被蝕刻並移除。也就是仍舊留下該鈦層或該鈦/鎢層311a。
如圖4D中所示地，在形成該介電層112之步驟中，該介電層112係形成於該重分佈層111四周。更進一步，可將形成該重分佈層111和該介電層112之步驟執行數次。也就是該重分佈層111和該介電層112可在該虛擬基板310上增長數次。另一方面，既然例如該重分佈層111和該介電層112交替地增長，所需重分佈層111可被形成。因此，該中介層110可具有一小尺寸且薄的厚度。此外，一被動結構可被內嵌於該中介層110中。
在此，形成於該介電層112之最上面和最下部分中之每一個上之重分佈層111可例如具有一相當寬之寬度(墊片或平面)。
如圖5A至圖5C中所示地，在移除該虛擬基板310之步驟中，該中介層110安裝於其上之虛擬基板310被移除。也就是如圖5A和圖5B中所示地，經由該研磨製程將具有一相當厚之厚度之虛擬基板310的一部分移除，且接著經由該蝕刻製程將具有一相當薄之厚度之剩餘部分移除。結果，如圖5C中所示地，該種子層311之鈦層或鈦/鎢層311a係曝露於外。
如圖5D中所示地，在移除該種子層311之步驟中，殘留在該中介層110上之種子層311，也就是該鈦層或該鈦/鎢層311a被移除。因此，在該中介層110中具有一相當寬之寬度之重分佈層111係貫穿該介電層 112而曝露於外。
更進一步，如圖5E中所示地，在該種子層311被移除後，一凸塊下金屬層113可被形成於貫穿該介電層112而露出之重分佈層111上，且接著，一凸塊150可被連接至該凸塊下金屬層113。因此，該凸塊下金屬層113自該介電層112中突出，且該凸塊150近乎環繞該凸塊下金屬層113。
圖6A至圖6D說明根據另一實施例之半導體裝置100之製造方法中之製造中介層110前面部分之方法的剖面圖。圖7A至圖7E說明根據另一實施例之半導體裝置100之製造方法中之製造中介層110後面部分之方法的剖面圖。
如圖6A至圖6D和圖7A至圖7E中所示地，形成該中介層110之方法包含在一虛擬基板310上形成一種子層311，在該種子層311上形成一凸塊下金屬層113，蝕刻該種子層311，形成一重分佈層111，形成一介電層112，移除該虛擬基板310及移除該種子層311。現在將這個詳述之。
如圖6A中所示地，在該虛擬基板310上形成該種子層311之步驟中，一鈦層311a/銅層311b或一鈦-鎢層311a/銅層311b可例如形成於該虛擬基板310之整個頂部表面以提供該種子層311。
如圖6B中所示地，在該種子層311上形成該凸塊下金屬層113之步驟中，例如，一金層113a、一鎳層113b及一銅層或一鋁層113c係依序形成於該種子層311上以形成該凸塊下金屬層113。
如圖6C中所示地，在蝕刻該種子層311之步驟中，例如， 留在該凸塊下金屬層113外面之種子層311之銅層被蝕刻並移除。也就是仍舊留下該鈦層或該鈦/鎢層311a。
如圖6D中所示地，在形成該重分佈層111及形成該介電層112之步驟中，該重分佈層111係在該凸塊下金屬層113上進行圖案化，且同時該介電層112係形成於其四周。也就是在一銅層或一鋁層被電鍍在該凸塊下金屬層113上之後，一微影成像製程被執行以形成具有一預定圖案之重分佈層111。再者，該介電層112係形成於該重分佈層111四周。更進一步，可將形成該重分佈層111和該介電層112之步驟執行數次。也就是上述增長製程可被執行。
在此，形成於該中介層110最上面之表面上並具有一相當寬之寬度之重分佈層111可例如被定義為一墊片或平面。
如圖7A至圖7C中所示地，在移除該虛擬基板310之步驟中，該中介層110安裝於其上之虛擬基板310被移除。也就是如圖7A和圖7B中所示地，經由該研磨製程將具有一相當厚之厚度之虛擬基板310的一部分移除，且接著經由該蝕刻製程將具有一相當薄之厚度之剩餘部分移除。結果，如圖7C中所示地，該種子層311之鈦層或鈦/鎢層311a係曝露於外。
如圖7D中所示地，在移除該種子層311之步驟中，殘留在該中介層110上之種子層311，也就是該鈦層或該鈦/鎢層311a被移除。因此，該凸塊下金屬層113係貫穿該介電層112而曝露於外。也就是該凸塊下金屬層113之底部和側邊表面係置於該介電層112內。再者，只有該凸塊下金屬層113之頂部表面係貫穿該介電層112而曝露於外。也就是說，該凸塊 下金屬層113之露出表面係齊平於該介電層112之露出表面。
更進一步，如圖7E中所示地，在該種子層311被移除後，一凸塊150係連接至貫穿該介電層112而露出之凸塊下金屬層113。也就是既然例如該凸塊下金屬層113係先形成於該形成該中介層110之步驟中，它可以不需要透過一獨立製程來形成該凸塊下金屬層113以在稍後用於連接該凸塊150。替代性地，因為這些製程特徵之故，該凸塊下金屬層113並未置於該凸塊150內部。
圖8A至圖8D說明根據另一實施例之半導體裝置100之製造方法中之製造中介層110前面部分之方法的剖面圖。圖9A至圖9E說明根據另一實施例之半導體裝置100之製造方法中之製造中介層110後面部分之方法的剖面圖。
如圖8A至圖8D和圖9A至圖9E中所示地，根據該目前實施例之製造該中介層110之方法係類似於根據前述實施例之方法。然而，如圖8C中所示地，根據該目前實施例之製造該中介層110之方法與根據前述實施例之方法之不同在於形成於一凸塊下金屬層113外面之種子層311係在蝕刻該種子層311中被完全移除。也就是，如圖8C中所示地，該種子層311未殘留在該凸塊下金屬層113外面。再者，如圖9C和圖9D中所示地，可在一焊料被連接至一凸塊之前移除形成於該凸塊下金屬層113上之種子層311。因此，該凸塊下金屬層113之露出表面係未齊平於一介電層112之露出表面。也就是該凸塊下金屬層113之露出表面係置於較該介電層112之露出表面低之位置。因此，該凸塊150之側面部分接觸到該介電層112。
實施例提供包含具有一相當薄厚度之中介層而沒有直通矽 晶穿孔之半導體裝置及該裝置之製造方法。
再者，既然例如該中介層係形成於由矽或玻璃所構成之虛擬基板上，具有次微米單位之微細間距之重分佈層可被形成。此外，該些實施例可提供包含可使用各種材料來形成並實現於該內嵌式被動結構中之中介層之半導體裝置和包含該半導體裝置及包含上述裝置之半導體裝置之製造方法。
示範性實施例已在此被揭示，且儘管特定用語被運用，它們被使用且只是以總體性和描述性意義進行說明，並非限定用途。因此，那些熟知此項技術之人士要了解到形式和細節上的各種變化可被取得而不偏離下列申請專利範圍中所提出之本揭示精神和範圍。
100‧‧‧半導體裝置
110‧‧‧中介層
111‧‧‧重分佈層
112‧‧‧介電層
113‧‧‧凸塊金屬
120‧‧‧半導體晶粒
121‧‧‧連接端
121a‧‧‧銅柱
121b‧‧‧焊料蓋
122‧‧‧焊料
130‧‧‧底膠
140‧‧‧封膠
150‧‧‧凸塊

Claims (19)

  1. 一種半導體裝置之製造方法，該方法包括：連接一半導體晶粒至在一矽虛擬基板上包含一重分佈層和一介電層的一中介層，該連接包含連接該半導體晶粒至該重分佈層，使得該半導體晶粒面對該中介層的一上部分；密封該半導體晶粒於一封膠中；及自該中介層中移除該矽虛擬基板，該移除包含使用一第一移除製程移除該矽虛擬基板的一第一部分以及使用不同於該第一移除製程的一第二移除製程移除該矽虛擬基板的一第二部分。
  2. 如申請專利範圍第1項所述之方法，包括在該連接該半導體晶粒之後，將一底膠填充於該半導體晶粒和該中介層之間。
  3. 如申請專利範圍第1項所述之方法，包括連接一凸塊至該中介層的一第一側處之重分佈層，所述連接一凸塊包括：在所述從該中介層之該第一側移除該矽虛擬基板之後，在該中介層的該第一側處之該重分佈層上形成一凸塊下金屬層；及連接該凸塊至該凸塊下金屬層。
  4. 如申請專利範圍第1項所述之方法，其包含形成該中介層，其中，所述形成該中介層包括：形成一凸塊下金屬層，其上會形成該重分佈層中之至少一部分。
  5. 如申請專利範圍第3項所述之方法，包括將該已連接凸塊安裝至一電路板。
  6. 如申請專利範圍第5項所述之方法，包括將一底膠填充於該中介層和該電路板之間。
  7. 如申請專利範圍第5項所述之方法，包括將一遮蓋物接合至該半導體晶粒並且至具有一黏接劑的該封膠。
  8. 如申請專利範圍第1項所述之方法，其包含形成該中介層，其中，所述形成該中介層包括：直接在該矽虛擬基板上形成一種子層；在該種子層上形成並圖案化該重分佈層；在該重分佈層外側形成該介電層；及移除該種子層。
  9. 一種半導體裝置之製造方法，該方法包括：直接在一矽虛擬基板上形成包含一重分佈層和一介電層之中介層；連接一半導體晶粒至面對該中介層上部分之重分佈層；使用一封膠來密封該半導體晶粒於一封膠中；及自該中介層中移除該矽虛擬基板，其中，所述形成該中介層包括：在該矽虛擬基板上形成一種子層；直接在該種子層的至少一部分上形成一凸塊下金屬層；在該凸塊下金屬層上形成並圖案化該重分佈層；在該重分佈層外側形成該介電層；及移除其上直接形成有該凸塊下金屬層的該種子層的該至少一部分。
  10. 如申請專利範圍第9項所述之方法，其中，所述移除該種子層的該至少一部分是在所述移除該矽虛擬基板之後而被執行。
  11. 一種半導體裝置之製造方法，該方法包括： 直接在一矽虛擬基板上形成包含一重分佈層和一介電層之中介層；連接一半導體晶粒至面對該中介層上部分之重分佈層；使用一封膠來密封該半導體晶粒於一封膠中；及自該中介層中移除該矽虛擬基板，其中，所述形成該中介層包含形成一第一層直接在該矽虛擬基板上以及形成包含一種子層的一第二層直接在該第一層上。
  12. 如申請專利範圍第11項所述之方法，其中，該第一層包括一第一種子層。
  13. 如申請專利範圍第11項所述之方法，其中，所述形成該中介層包含使用一半導體製造程序來形成該中介層之至少一部分。
  14. 一種半導體裝置之製造方法，該方法包括：直接在一矽虛擬基板上形成包含一重分佈層和一介電層之中介層；連接一半導體晶粒至面對該中介層上部分之重分佈層；使用一封膠來密封該半導體晶粒於一封膠中；及自該中介層中移除該矽虛擬基板，其中，從該中介層移除該矽虛擬基板會曝露該中介層的一種子層，並且進一步包含蝕刻該經曝露的種子層。
  15. 一種半導體裝置之製造方法，該方法包括：直接在一虛擬基板上形成包含一重分佈層和一介電層之中介層；及自該中介層中移除該虛擬基板，其中所述移除該虛擬基板包含：利用一第一移除程序移除該虛擬基板的一第一部分；以及利用不同於該第一移除程序的一第二移除程序移除該虛擬基板的 一第二部分，從而曝露該中介層的一第一側。
  16. 如申請專利範圍第15項所述之方法，其進一步包含在所述移除該虛擬基板之後，形成一凸塊下金屬層於該中介層的該第一側上。
  17. 如申請專利範圍第15項所述之方法，其中，所述形成該中介層包括：形成一第一種子層，其上會形成該重分佈層中之至少一部分；並且包含在所述移除該虛擬基板之後，蝕刻該第一種子層。
  18. 一種半導體裝置，包括：一中介層，包括一重分佈層和一介電層；一半導體晶粒，經由一銅柱而連接至該重分佈層並且面對該中介層之一上側；封膠，其密封該半導體晶粒且被研磨以曝露該半導體晶粒的一上側；及一凸塊，連接至該重分佈層並且面對該中介層之一下側。
  19. 如申請專利範圍第18項所述之半導體裝置，包含一被動裝置，被埋置於該重分佈層中。
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