SG11201503639YA - Semiconductor device and manufacturing method thereof - Google Patents
Semiconductor device and manufacturing method thereofInfo
- Publication number
- SG11201503639YA SG11201503639YA SG11201503639YA SG11201503639YA SG11201503639YA SG 11201503639Y A SG11201503639Y A SG 11201503639YA SG 11201503639Y A SG11201503639Y A SG 11201503639YA SG 11201503639Y A SG11201503639Y A SG 11201503639YA SG 11201503639Y A SG11201503639Y A SG 11201503639YA
- Authority
- SG
- Singapore
- Prior art keywords
- manufacturing
- semiconductor device
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/481—Insulating layers on insulating parts, with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
- H01L23/04—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3135—Double encapsulation or coating and encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3675—Cooling facilitated by shape of device characterised by the shape of the housing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
- H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68345—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self supporting substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68381—Details of chemical or physical process used for separating the auxiliary support from a device or wafer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/1308—Plural core members being stacked
- H01L2224/13082—Two-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/81005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
- H01L2224/814—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83001—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus
- H01L2224/83005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/921—Connecting a surface with connectors of different types
- H01L2224/9212—Sequential connecting processes
- H01L2224/92122—Sequential connecting processes the first connecting process involving a bump connector
- H01L2224/92125—Sequential connecting processes the first connecting process involving a bump connector the second connecting process involving a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0504—14th Group
- H01L2924/05042—Si3N4
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/053—Oxides composed of metals from groups of the periodic table
- H01L2924/0544—14th Group
- H01L2924/05442—SiO2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Materials Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Geometry (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020120126932A KR101411813B1 (en) | 2012-11-09 | 2012-11-09 | Semiconductor device and manufacturing method thereof |
US13/726,917 US9000586B2 (en) | 2012-11-09 | 2012-12-26 | Semiconductor device and manufacturing method thereof |
PCT/US2013/069057 WO2014074776A1 (en) | 2012-11-09 | 2013-11-08 | Semiconductor device and manufacturing method thereof |
Publications (1)
Publication Number | Publication Date |
---|---|
SG11201503639YA true SG11201503639YA (en) | 2015-06-29 |
Family
ID=50680934
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG11201503639YA SG11201503639YA (en) | 2012-11-09 | 2013-11-08 | Semiconductor device and manufacturing method thereof |
Country Status (8)
Country | Link |
---|---|
US (6) | US9000586B2 (en) |
EP (1) | EP2917934A4 (en) |
JP (1) | JP2015534287A (en) |
KR (1) | KR101411813B1 (en) |
CN (2) | CN110085523B (en) |
SG (1) | SG11201503639YA (en) |
TW (1) | TWI594339B (en) |
WO (1) | WO2014074776A1 (en) |
Families Citing this family (68)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9721872B1 (en) | 2011-02-18 | 2017-08-01 | Amkor Technology, Inc. | Methods and structures for increasing the allowable die size in TMV packages |
JP2013236039A (en) * | 2012-05-11 | 2013-11-21 | Renesas Electronics Corp | Semiconductor device |
US10991669B2 (en) * | 2012-07-31 | 2021-04-27 | Mediatek Inc. | Semiconductor package using flip-chip technology |
TWI562295B (en) | 2012-07-31 | 2016-12-11 | Mediatek Inc | Semiconductor package and method for fabricating base for semiconductor package |
KR101411813B1 (en) | 2012-11-09 | 2014-06-27 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device and manufacturing method thereof |
US10714378B2 (en) | 2012-11-15 | 2020-07-14 | Amkor Technology, Inc. | Semiconductor device package and manufacturing method thereof |
KR101366461B1 (en) | 2012-11-20 | 2014-02-26 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device and manufacturing method thereof |
US9799592B2 (en) | 2013-11-19 | 2017-10-24 | Amkor Technology, Inc. | Semicondutor device with through-silicon via-less deep wells |
US9171798B2 (en) | 2013-01-25 | 2015-10-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods and apparatus for transmission lines in packages |
US8946884B2 (en) | 2013-03-08 | 2015-02-03 | Xilinx, Inc. | Substrate-less interposer technology for a stacked silicon interconnect technology (SSIT) product |
KR101473093B1 (en) * | 2013-03-22 | 2014-12-16 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device and manufacturing method thereof |
US8927412B1 (en) | 2013-08-01 | 2015-01-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-chip package and method of formation |
US8928117B1 (en) * | 2013-08-01 | 2015-01-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Multi-chip package structure and method of forming same |
KR101607981B1 (en) | 2013-11-04 | 2016-03-31 | 앰코 테크놀로지 코리아 주식회사 | Interposer and method for manufacturing the same, and semiconductor package using the same |
KR101982905B1 (en) * | 2015-08-11 | 2019-05-27 | 앰코 테크놀로지 인코포레이티드 | Semiconductor package and fabricating method thereof |
KR20150104467A (en) * | 2014-03-05 | 2015-09-15 | 앰코 테크놀로지 코리아 주식회사 | Manufacturing method of semiconductor device and semiconductor device thereof |
FR3018953B1 (en) * | 2014-03-19 | 2017-09-15 | St Microelectronics Crolles 2 Sas | INTEGRATED CIRCUIT CHIP MOUNTED ON AN INTERPOSER |
KR101676916B1 (en) | 2014-08-20 | 2016-11-16 | 앰코 테크놀로지 코리아 주식회사 | Manufacturing method of semiconductor device amd semiconductor device thereof |
TWI566305B (en) * | 2014-10-29 | 2017-01-11 | 巨擘科技股份有限公司 | Method for manufacturing three-dimensional integrated circuit |
KR20160080965A (en) * | 2014-12-30 | 2016-07-08 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device and manufacturing method thereof |
KR101684071B1 (en) * | 2015-03-05 | 2016-12-07 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device and manufacturing method thereof |
CN104851816A (en) * | 2015-04-13 | 2015-08-19 | 华进半导体封装先导技术研发中心有限公司 | Method for packaging multiple chips in high density |
US9916999B2 (en) | 2015-06-04 | 2018-03-13 | Micron Technology, Inc. | Methods of fabricating a semiconductor package structure including at least one redistribution layer |
KR101672640B1 (en) * | 2015-06-23 | 2016-11-03 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device |
EP3154084A3 (en) * | 2015-09-16 | 2017-04-26 | MediaTek Inc. | Semiconductor package using flip-chip technology |
US9735079B2 (en) * | 2015-10-08 | 2017-08-15 | Dyi-chung Hu | Molding compound wrapped package substrate |
KR101787832B1 (en) * | 2015-10-22 | 2017-10-19 | 앰코 테크놀로지 코리아 주식회사 | Method for fabricating semiconductor package and semiconductor package using the same |
US9875988B2 (en) | 2015-10-29 | 2018-01-23 | Semtech Corporation | Semiconductor device and method of forming DCALGA package using semiconductor die with micro pillars |
US10177083B2 (en) | 2015-10-29 | 2019-01-08 | Intel Corporation | Alternative surfaces for conductive pad layers of silicon bridges for semiconductor packages |
CN105225965B (en) * | 2015-11-03 | 2019-01-25 | 中芯长电半导体(江阴)有限公司 | A kind of fan-out package structure and preparation method thereof |
CN108292654A (en) | 2015-12-11 | 2018-07-17 | 英特尔公司 | Microelectronic structure with the multiple microelectronic components connect using the microelectronics bridging in embedded microelectronic substrate |
US10600759B2 (en) | 2016-01-12 | 2020-03-24 | Advanced Semiconductor Engineering, Inc. | Power and ground design for through-silicon via structure |
US9917043B2 (en) | 2016-01-12 | 2018-03-13 | Advanced Semiconductor Engineering, Inc. | Semiconductor package device and method of manufacturing the same |
CN105895538A (en) * | 2016-04-28 | 2016-08-24 | 合肥祖安投资合伙企业(有限合伙) | Manufacture method for chip packaging structure and chip packaging structure |
US20170338128A1 (en) * | 2016-05-17 | 2017-11-23 | Powertech Technology Inc. | Manufacturing method of package structure |
US10504827B2 (en) | 2016-06-03 | 2019-12-10 | Amkor Technology, Inc. | Semiconductor device and manufacturing method thereof |
US9865566B1 (en) | 2016-06-15 | 2018-01-09 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor structure and manufacturing method thereof |
KR102632563B1 (en) * | 2016-08-05 | 2024-02-02 | 삼성전자주식회사 | Semiconductor Package |
CN106356341A (en) * | 2016-08-31 | 2017-01-25 | 华为技术有限公司 | Semiconductor device and manufacture method |
US9960328B2 (en) | 2016-09-06 | 2018-05-01 | Amkor Technology, Inc. | Semiconductor device and manufacturing method thereof |
US10515887B2 (en) * | 2016-09-20 | 2019-12-24 | Mediatek Inc. | Fan-out package structure having stacked carrier substrates and method for forming the same |
KR102073294B1 (en) | 2016-09-29 | 2020-02-04 | 삼성전자주식회사 | Fan-out semiconductor package |
US10381301B2 (en) * | 2017-02-08 | 2019-08-13 | Micro Technology, Inc. | Semiconductor package and method for fabricating the same |
JP6827857B2 (en) * | 2017-03-15 | 2021-02-10 | アオイ電子株式会社 | Semiconductor devices and methods for manufacturing semiconductor devices |
US10687419B2 (en) * | 2017-06-13 | 2020-06-16 | Advanced Semiconductor Engineering, Inc. | Semiconductor package device and method of manufacturing the same |
CN107507816A (en) * | 2017-08-08 | 2017-12-22 | 中国电子科技集团公司第五十八研究所 | Fan-out-type wafer scale multilayer wiring encapsulating structure |
CN107785339A (en) * | 2017-10-13 | 2018-03-09 | 中芯长电半导体(江阴)有限公司 | 3D chip-packaging structures and preparation method thereof |
US10957672B2 (en) * | 2017-11-13 | 2021-03-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and method of manufacturing the same |
US10510634B2 (en) * | 2017-11-30 | 2019-12-17 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and method |
US10388631B1 (en) | 2018-01-29 | 2019-08-20 | Globalfoundries Inc. | 3D IC package with RDL interposer and related method |
KR102560697B1 (en) * | 2018-07-31 | 2023-07-27 | 삼성전자주식회사 | Semiconductor package having interposer |
US10504824B1 (en) * | 2018-09-21 | 2019-12-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Integrated circuit package and method |
US10872871B2 (en) * | 2018-12-21 | 2020-12-22 | Taiwan Semiconductor Manufacturing Co., Ltd. | Chip package structure with dummy bump and method for forming the same |
JP7335036B2 (en) * | 2019-03-29 | 2023-08-29 | ラピスセミコンダクタ株式会社 | Semiconductor package manufacturing method |
US11024616B2 (en) * | 2019-05-16 | 2021-06-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and method of manufacturing the same |
DE102019211371A1 (en) * | 2019-07-30 | 2021-02-04 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Method of manufacturing an electronic circuit component and electronic circuit component |
US11062968B2 (en) | 2019-08-22 | 2021-07-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package structure and method for forming the same |
US11282772B2 (en) * | 2019-11-06 | 2022-03-22 | Advanced Semiconductor Engineering, Inc. | Package structure, assembly structure and method for manufacturing the same |
TWI727488B (en) * | 2019-11-06 | 2021-05-11 | 虹晶科技股份有限公司 | Fan-out type package structure and manufacturing method |
KR20210073903A (en) | 2019-12-11 | 2021-06-21 | 삼성전기주식회사 | Substrate on substrate structure and electronics comprising the same |
US11626340B2 (en) * | 2019-12-12 | 2023-04-11 | Qorvo Us, Inc. | Integrated circuit (IC) package with embedded heat spreader in a redistribution layer (RDL) |
US11424219B2 (en) * | 2020-01-16 | 2022-08-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package structure and method of fabricating the same |
KR20210110008A (en) * | 2020-02-28 | 2021-09-07 | 삼성전자주식회사 | Semiconductor package |
KR20210131548A (en) * | 2020-04-24 | 2021-11-03 | 삼성전자주식회사 | Semiconductor package |
KR20220007255A (en) | 2020-07-10 | 2022-01-18 | 삼성전자주식회사 | Semiconductor package |
KR20220022218A (en) | 2020-08-18 | 2022-02-25 | 삼성전자주식회사 | Semiconductor package and method of manufacturing the semiconductor package |
US11908757B2 (en) * | 2021-06-18 | 2024-02-20 | Taiwan Semiconductor Manufacturing Company Limited | Die corner removal for molding compound crack suppression in semiconductor die packaging and methods for forming the same |
US11978729B2 (en) * | 2021-07-08 | 2024-05-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device package having warpage control and method of forming the same |
Family Cites Families (48)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3996521B2 (en) * | 2002-02-22 | 2007-10-24 | 株式会社フジクラ | Manufacturing method of substrate for multilayer wiring board |
US6794273B2 (en) * | 2002-05-24 | 2004-09-21 | Fujitsu Limited | Semiconductor device and manufacturing method thereof |
JP3892774B2 (en) * | 2002-08-13 | 2007-03-14 | 富士通株式会社 | Manufacturing method of semiconductor device |
JP2004039867A (en) * | 2002-07-03 | 2004-02-05 | Sony Corp | Multilayer wiring circuit module and its manufacturing method |
JP2006518944A (en) * | 2003-02-25 | 2006-08-17 | テッセラ,インコーポレイテッド | Ball grid array with bumps |
JP4449608B2 (en) * | 2004-07-09 | 2010-04-14 | 凸版印刷株式会社 | Semiconductor device |
JP4790297B2 (en) * | 2005-04-06 | 2011-10-12 | ルネサスエレクトロニクス株式会社 | Semiconductor device and manufacturing method thereof |
US7755176B1 (en) * | 2005-04-21 | 2010-07-13 | Amkor Technology, Inc. | Die-mounting substrate and method incorporating dummy traces for improving mounting film planarity |
JP4787559B2 (en) * | 2005-07-26 | 2011-10-05 | ルネサスエレクトロニクス株式会社 | Semiconductor device and manufacturing method thereof |
US20070029669A1 (en) * | 2005-08-05 | 2007-02-08 | Frank Stepniak | Integrated circuit with low-stress under-bump metallurgy |
US7741707B2 (en) | 2006-02-27 | 2010-06-22 | Stats Chippac Ltd. | Stackable integrated circuit package system |
US7902660B1 (en) * | 2006-05-24 | 2011-03-08 | Amkor Technology, Inc. | Substrate for semiconductor device and manufacturing method thereof |
JP2008091638A (en) * | 2006-10-02 | 2008-04-17 | Nec Electronics Corp | Electronic equipment, and manufacturing method thereof |
JP2008091639A (en) * | 2006-10-02 | 2008-04-17 | Nec Electronics Corp | Electronic equipment, and manufacturing method thereof |
US7687318B2 (en) * | 2007-05-04 | 2010-03-30 | Stats Chippac, Ltd. | Extended redistribution layers bumped wafer |
US8084854B2 (en) | 2007-12-28 | 2011-12-27 | Micron Technology, Inc. | Pass-through 3D interconnect for microelectronic dies and associated systems and methods |
CA2715368C (en) | 2008-02-14 | 2016-04-26 | Kingsdown, Inc. | Apparatuses and methods providing variable support and variable comfort control of a sleep system and automatic adjustment thereof |
KR101025408B1 (en) * | 2008-12-02 | 2011-03-28 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor package and manufacturing method thereof |
KR101153000B1 (en) * | 2009-06-04 | 2012-06-04 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor package |
US9196509B2 (en) * | 2010-02-16 | 2015-11-24 | Deca Technologies Inc | Semiconductor device and method of adaptive patterning for panelized packaging |
JP5570855B2 (en) * | 2010-03-18 | 2014-08-13 | 新光電気工業株式会社 | Wiring substrate and manufacturing method thereof, semiconductor device and manufacturing method thereof |
US8993431B2 (en) * | 2010-05-12 | 2015-03-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of fabricating bump structure |
JP5502624B2 (en) | 2010-07-08 | 2014-05-28 | 新光電気工業株式会社 | Wiring board manufacturing method and wiring board |
US8288201B2 (en) | 2010-08-25 | 2012-10-16 | Stats Chippac, Ltd. | Semiconductor device and method of forming FO-WLCSP with discrete semiconductor components mounted under and over semiconductor die |
KR101191247B1 (en) * | 2010-10-28 | 2012-10-16 | (주) 트라이스시스템 | Fbga package and method for manufacturing the same |
KR20120053332A (en) | 2010-11-17 | 2012-05-25 | 삼성전자주식회사 | Semiconductor package and method of forming the same |
KR101217434B1 (en) * | 2011-02-18 | 2013-01-02 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device |
US10050004B2 (en) * | 2015-11-20 | 2018-08-14 | Deca Technologies Inc. | Fully molded peripheral package on package device |
US8518796B2 (en) * | 2012-01-09 | 2013-08-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor die connection system and method |
JP5454605B2 (en) * | 2012-04-02 | 2014-03-26 | 富士通セミコンダクター株式会社 | Wiring substrate and semiconductor device |
US8933473B1 (en) * | 2012-06-01 | 2015-01-13 | Valery Dubin | Method, apparatus and system for providing light source structures on a flexible substrate |
KR101419597B1 (en) * | 2012-11-06 | 2014-07-14 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device and manufacturing method thereof |
KR101411813B1 (en) * | 2012-11-09 | 2014-06-27 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device and manufacturing method thereof |
US9136159B2 (en) * | 2012-11-15 | 2015-09-15 | Amkor Technology, Inc. | Method and system for a semiconductor for device package with a die-to-packaging substrate first bond |
US10714378B2 (en) * | 2012-11-15 | 2020-07-14 | Amkor Technology, Inc. | Semiconductor device package and manufacturing method thereof |
KR101366461B1 (en) * | 2012-11-20 | 2014-02-26 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device and manufacturing method thereof |
US9543373B2 (en) * | 2013-10-23 | 2017-01-10 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor structure and manufacturing method thereof |
KR101563909B1 (en) * | 2014-08-19 | 2015-10-28 | 앰코 테크놀로지 코리아 주식회사 | Method for manufacturing Package On Package |
KR101676916B1 (en) * | 2014-08-20 | 2016-11-16 | 앰코 테크놀로지 코리아 주식회사 | Manufacturing method of semiconductor device amd semiconductor device thereof |
KR101672622B1 (en) * | 2015-02-09 | 2016-11-03 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device and manufacturing method thereof |
US9502397B1 (en) * | 2015-04-29 | 2016-11-22 | Deca Technologies, Inc. | 3D interconnect component for fully molded packages |
US9520372B1 (en) * | 2015-07-20 | 2016-12-13 | Taiwan Semiconductor Manufacturing Company, Ltd. | Wafer level package (WLP) and method for forming the same |
KR101787832B1 (en) * | 2015-10-22 | 2017-10-19 | 앰코 테크놀로지 코리아 주식회사 | Method for fabricating semiconductor package and semiconductor package using the same |
US10872879B2 (en) * | 2015-11-12 | 2020-12-22 | Amkor Technology Singapore Holding Pte. Ltd. | Semiconductor package and manufacturing method thereof |
US10290672B2 (en) * | 2016-05-31 | 2019-05-14 | Semiconductor Components Industries, Llc | Image sensor semiconductor packages and related methods |
KR20180086804A (en) * | 2017-01-23 | 2018-08-01 | 앰코 테크놀로지 인코포레이티드 | Semiconductor device and manufacturing method thereof |
KR102077455B1 (en) * | 2017-07-04 | 2020-02-14 | 삼성전자주식회사 | Semiconductor device |
KR102055595B1 (en) * | 2017-12-15 | 2019-12-16 | 삼성전자주식회사 | Semiconductor package |
-
2012
- 2012-11-09 KR KR1020120126932A patent/KR101411813B1/en active IP Right Grant
- 2012-12-26 US US13/726,917 patent/US9000586B2/en active Active
-
2013
- 2013-11-08 SG SG11201503639YA patent/SG11201503639YA/en unknown
- 2013-11-08 EP EP13854060.4A patent/EP2917934A4/en not_active Withdrawn
- 2013-11-08 WO PCT/US2013/069057 patent/WO2014074776A1/en active Application Filing
- 2013-11-08 CN CN201811570115.9A patent/CN110085523B/en active Active
- 2013-11-08 CN CN201380069858.7A patent/CN104904006A/en active Pending
- 2013-11-08 TW TW102140668A patent/TWI594339B/en active
- 2013-11-08 JP JP2015541911A patent/JP2015534287A/en active Pending
-
2015
- 2015-03-27 US US14/671,095 patent/US9536858B2/en active Active
-
2017
- 2017-01-03 US US15/397,052 patent/US9966276B2/en active Active
-
2018
- 2018-05-08 US US15/973,799 patent/US10297466B2/en active Active
-
2019
- 2019-05-21 US US16/418,563 patent/US10985031B2/en active Active
-
2021
- 2021-04-19 US US17/234,109 patent/US11501978B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
KR20140060435A (en) | 2014-05-20 |
KR101411813B1 (en) | 2014-06-27 |
US9536858B2 (en) | 2017-01-03 |
EP2917934A1 (en) | 2015-09-16 |
TWI594339B (en) | 2017-08-01 |
US20180261468A1 (en) | 2018-09-13 |
CN104904006A (en) | 2015-09-09 |
TW201430967A (en) | 2014-08-01 |
EP2917934A4 (en) | 2016-06-01 |
US20170125264A1 (en) | 2017-05-04 |
US9966276B2 (en) | 2018-05-08 |
US20140131856A1 (en) | 2014-05-15 |
US9000586B2 (en) | 2015-04-07 |
US20210265174A1 (en) | 2021-08-26 |
CN110085523A (en) | 2019-08-02 |
US10297466B2 (en) | 2019-05-21 |
WO2014074776A1 (en) | 2014-05-15 |
US11501978B2 (en) | 2022-11-15 |
US20150200179A1 (en) | 2015-07-16 |
US10985031B2 (en) | 2021-04-20 |
JP2015534287A (en) | 2015-11-26 |
US20190279881A1 (en) | 2019-09-12 |
CN110085523B (en) | 2024-04-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
SG11201503639YA (en) | Semiconductor device and manufacturing method thereof | |
EP2843707A4 (en) | Semiconductor device and semiconductor device manufacturing method | |
EP2913854A4 (en) | Semiconductor device and method for manufacturing same | |
EP2833404A4 (en) | Semiconductor device and method for manufacturing semiconductor device | |
EP2816598A4 (en) | Semiconductor device and method for manufacturing same | |
HK1198303A1 (en) | Semiconductor device and method of manufacturing the same | |
TWI560805B (en) | Semiconductor device and method for fabricating the same | |
EP2709149A4 (en) | Semiconductor device and manufacturing method thereof | |
EP2793267A4 (en) | Semiconductor device and semiconductor device manufacturing method | |
EP2833405A4 (en) | Semiconductor device, and method for manufacturing semiconductor device | |
EP2858111A4 (en) | Imaging device manufacturing method and semiconductor device manufacturing method | |
SG11201504825RA (en) | Semiconductor device and method for manufacturing the same | |
EP2804214A4 (en) | Semiconductor device and method of manufacturing thereof | |
EP2985790A4 (en) | Semiconductor device and semiconductor device manufacturing method | |
EP2854174A4 (en) | Semiconductor device and method for manufacturing same | |
EP2790216A4 (en) | Semiconductor device and semiconductor device manufacturing method | |
EP2688102A4 (en) | Semiconductor device and manufacturing method therefor | |
EP2802005A4 (en) | Semiconductor device and method for manufacturing same | |
TWI563540B (en) | Semiconductor device manufacturing method | |
EP2709148A4 (en) | Semiconductor device and manufacturing method thereof | |
EP2819152A4 (en) | Semiconductor element and method for manufacturing semiconductor element | |
EP2804216A4 (en) | Semiconductor device and method of manufacturing thereof | |
EP2860760A4 (en) | Semiconductor device and method for manufacturing same | |
EP2913843A4 (en) | Semiconductor device manufacturing method | |
GB201213673D0 (en) | Semiconductor device and fabrication method |