TWI702709B - 用以製造具有多層模製導電基板和結構之半導體封裝的方法 - Google Patents

用以製造具有多層模製導電基板和結構之半導體封裝的方法 Download PDF

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TWI702709B
TWI702709B TW105112793A TW105112793A TWI702709B TW I702709 B TWI702709 B TW I702709B TW 105112793 A TW105112793 A TW 105112793A TW 105112793 A TW105112793 A TW 105112793A TW I702709 B TWI702709 B TW I702709B
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conductive
encapsulant
conductive pattern
pillar
pattern
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TW105112793A
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TW201709477A (zh
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班文貝
元秋亨
鄭季洋
金本吉
金即俊
李鐘炫
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美商艾馬克科技公司
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Abstract

在一個實施例中，一種用於製造一半導體封裝的方法包括提供一多層模製導電結構。該多層模製導電結構包括：一第一導電結構，其係設置在一載板的一表面上；和一第一囊封劑，其係覆蓋該第一導電結構的至少部分，而其它部分係暴露於該第一囊封劑中。一第二導電結構係設置在該第一囊封劑上，並且係電氣連接到該第一導電結構。一第二囊封劑係覆蓋該第二導電結構的一第一部分，而該第二導電結構的一第二部分係暴露到外部，並且該第二導電結構的一第三部分係暴露於設置在該第二囊封劑中的一接收空間中。該方法包括：將一半導體晶粒電氣連接至該第二導電結構，並在一些實施例中，移除該載板。

Description

用以製造具有多層模製導電基板和結構之半導體封裝的方法
本申請案係主張在美國專利局於2016年4月19日所提交的美國專利申請案的優先權，其案號為15/133,081，發明名稱為“用以製造具有多層模製導電基板和結構之半導體封裝的方法”，以及在韓國知識產權局於2015年5月22日所提交的韓國專利申請案的優先權，其案號為10-2015-0071718，並且上述專利申請案所獲取的所有權益係其根據35 U.S.C.§119，本文以引用的方式將其內容完整併入。
本發明一般係關於電子電路，並且更特定而言係關於半導體封裝及其結構，以及形成半導體封裝的方法。
根據近來對於電子裝置的小型化和高性能的需求，已研究和開發了各種製程以用於提供高性能的半導體封裝。提供高性能的半導體封裝的之一種製程為增加一記憶體晶片的容量，也就是，達成高積體化的記憶體晶片。高積體化的記憶體晶片的達成可藉由在一半導體晶粒的有限空 間中儘可能地填充許多單元。
然而，高積體化的記憶體晶片需要高度複雜的技術，包括了像是需要達成精確、精細的線路寬度、和長時間的顯影。替代性地，已經提出一種半導體晶粒的堆疊技術，以提供高容量的半導體模組。也已經提出了以一晶圓級來製造一封裝的技術，在該晶圓上形成有複數個半導體晶粒。除了需要昂貴和複雜的製造技術之外，這些技術中的每一者都缺少在電路圖案的重新設計上的靈活性。
因此，希望能具有可以解決先前所述以及其他問題之形成封裝半導體裝置的結構及方法。還希望這些結構和方法可以很容易地併入到製造流程，並具有成本效益。
本發明的敘述包括，特別是以下特徵，一種多層模製導電基板或多層模製導電結構係包括至少兩層的囊封或模製導電互連結構。在一些實施例中，一載板係附接到該多層模製導電結構的一表面以作為一臨時支撐結構。在其他實施例中，該載板可以被配置為一散熱板或散熱器結構。電子構件，例如半導體裝置及/或被動元件，可以被附接到該多層模製導電結構，其包括凹部部分內的附接件。在該多層載板中的上層導電圖案及/或連接結構可以在製造製程中重新設計，以允許彈性、節省時間、和成本效益的製造能力。
更特定而言，在一個實施例中，一種用於製造一半導體封裝，其包括：提供一多層模製導電結構，其包括：一第一導電結構，其設 置在一載板的一第一表面上；一第一囊封劑，其係囊封該第一導電結構的至少部分，而該第一導電結構的其它部分係暴露於該第一囊封劑中；一第二導電結構，其係設置在該第一囊封劑上，並且係電氣耦合到該第一導電結構；以及一第二囊封劑，其係囊封該第二導電結構的一第一部分，而該第二導電結構的一第二部分係暴露於該第二囊封劑中的一接收空間。該方法包括：將一第一半導體晶粒電氣連接到該第二導電結構在該接收空間中之第三部分。
在另一個實施例中，一種半導體封裝包括一第一導電結構。一第一囊封劑係囊封該第一導電結構的至少部分，而該第一導電結構的其它部分係暴露於該第一囊封劑中。一第二導電結構係設置在該第一囊封劑上，並且係電氣耦合到該第一導電結構。一第二囊封劑係囊封該第二導電結構的一第一部分，而該第二導電結構的一第二部分係暴露於該第二囊封劑中。一第一半導體晶粒係電氣耦合到該第二導電結構。
在進一步的實施例中，一種半導體封裝係包括一第一導電圖案和一第一導電支柱，其係電氣連接到該第一導電圖案。一第一囊封劑係囊封該第一導電圖案和該第一導電支柱。一第二導電圖案係電氣連接到該第一導電支柱，其係暴露於該第一囊封劑的外部。一第二導電支柱係電氣連接到該第二導電圖案的一部分。一第二囊封劑係囊封該第二導電圖案的一第一部分和該第二導電支柱的一部分。一接收空間係設置於該第二囊封劑中，以暴露該第二導電圖案的至少一第二部分。一第一半導體晶粒係放置在該接收空間，並係電氣連接到該第二導電圖案的該第二部分。
10‧‧‧載板
11‧‧‧第一表面
12‧‧‧第二表面
13‧‧‧散熱板/散熱器
14‧‧‧絕緣層
20‧‧‧導電凸塊
30‧‧‧第三囊封劑
100‧‧‧模製載板次組件/第一模製載板
110‧‧‧第一導電圖案
120‧‧‧第一導電支柱
121‧‧‧第一導電結構
130‧‧‧第一囊封劑
140‧‧‧第二導電圖案
150‧‧‧第二導電支柱
160‧‧‧第二囊封劑
161‧‧‧接收空間
200‧‧‧第一半導體模組
201‧‧‧多層模製導電結構/多層模製導電基板/模製載板結構/第二模製載板
202‧‧‧多層模製導電結構/多層模製導電基板
210‧‧‧半導體晶粒
220‧‧‧第一接合墊
221‧‧‧第二導電結構
230‧‧‧第一導電凸塊
240‧‧‧第一底層填料
300‧‧‧第二半導體模組
310‧‧‧第二半導體晶粒
320‧‧‧第二接合墊
330‧‧‧第二導電凸塊
400‧‧‧被動元件
1000‧‧‧半導體封裝
2000‧‧‧半導體封裝
3000‧‧‧半導體封裝
4000‧‧‧半導體封裝
5000‧‧‧半導體封裝
本說明書的上述和其它特徵將參考隨附的圖式，藉由範例性實施例進行細節描述，而變得更加明瞭，其中：圖1至圖11是部分剖面圖，其依序例示了根據本發明的一個實施例來製造半導體封裝的方法；圖12是部分剖面圖，其例示了根據本發明的另一個實施例的半導體封裝；圖13是部分剖面圖，其例示了根據本發明的又另一個實施例的半導體封裝；圖14是部分剖面圖，其例示了根據本發明的又另一個實施例的半導體封裝；以及圖15是部分剖面圖，其例示了根據本發明的又另一個實施例的半導體封裝。
為了簡化和清楚地說明，圖中的元件不一定按比例繪製，並且在不同圖式中，相同的元件符號表示相同的元件。此外，已知的步驟及元件之描述和細節係予以省略以求描述的簡化。本文所使用的用語「及/或」係包括一個或更多相關所列的項目之任意組合和所有組合。此外，這裡使用的用語之目的僅是用於描述特定實施例，並不旨在限制本揭示。本文中所使用的單數形式也意圖包括複數形式，除非上下文另外明確指出。應進一步理解的是，用語「包括、及/或包含」，在本說明書中使用時，是用以指定所陳述的特徵、數字、步驟、操作、元件、及/或構件的存在，而不是用以排除一個或更多其它特徵、數字、步驟、操作、元件、構件、及/或上述 組合之增加或存在。應理解的是，儘管用語「第一、第二…等」在本文中可用於描述各種部件、元件、區域、層及/或區塊，但是這些構件、元件、區域、層、及/或區塊不應受到這些用語的限制。這些用語僅用於將構件、元件、區域、層及/或區塊與其他的構件、元件、區域、層及/或區塊作出區分。因此，舉例來說，一第一部件、一第一元件、一第一區域、一第一層、及/或下面討論的一第一區塊可以被稱為一第二部件、一第二元件、一第二區域、一第二層、及/或一第二區塊，而不脫離本揭示的教導。參考「一個實施例」或「一實施例」意味著與該實施例相關所描述的特定特徵、結構、或特性係被包括在本發明的至少一個實施例中。因此，「在一個實施例中」或「在一實施例中」的詞語在本說明書全文所出現的不同場合不一定都指相同的實施例，但在某些情況下，其可能為真。此外，在一個或更多實施例中，特定特徵、結構、或特性可以用任何合適的方式進行組合，其對於本領域具有通常知識之人士將是顯而易見的。另外，用語「當…之時」指的是至少在開始的動作之持續時間的至少部分發生了某些動作。詞語「大約」或「約」的使用實質上指的是，元件的量值預期將接近一狀態值或位置。然而，如在本領域中所眾所周知的是，總是會有些微的差異，使得量值或位置與所陳述的量值有所差異。除非另有說明，本文所使用的「上」或「上方」用語包括方位、位置、或關係，其中所指定的元件可直接或間接實體接觸。應進一步理解的是，下文所例示和描述的這些實施例可以具有實施例、及/或可以在缺少本文所沒有特定揭示的元件下所實行。
參考圖1至圖11，一種用於根據第一實施例而製造半導體封裝的方法、以及一種使用該方法來製造的半導體封裝1000將進行描述。圖1至圖11例示了一種根據第一實施例而製造半導體封裝的方法之部分剖面圖。
首先，如圖1所示，一第一導電圖案110係形成於一載板10的一第一表面11上。在此，包括該第一表面11的該載板10係進一步包括對置於該第一表面11的第二表面12。在一個實施例中，該載板10所具有的厚度的範圍係從大約3微米到300微米。在一些實施例中，該載板10可以由金屬、矽、玻璃、環氧樹脂、或如本領域技術人士所知曉的其他材料中的一者或更多者來形成。至少該第一表面11係已準備並已清洗，用於接收該第一導電圖案110。
在一個實施例中，該第一導電圖案110可以由導電材料製成，包括銅(Cu)、金(Au)、銀(Ag)、鋁(Al)或如本領域技術人士所知曉的其它材料。另外，該第一導電圖案110可藉由物理氣相沉積(PVD)、化學氣相沉積(CVD)、金屬濺鍍、金屬蒸鍍、電解或無電電鍍、或如本領域技術人士所知曉的其它形成技術來形成。在一個實施例中，該第一導電圖案110所具有的厚度的範圍係從大約3微米到50微米。在沉積之後，該導電材料可以藉由物理蝕刻或化學蝕刻，或如本領域技術人士所知曉的其它技術來進行圖案化。在其他實施例中，一遮罩層(未圖示)可以首先沉積在該第一主要表面11上，並且隨後沉積該導電材料。在形成該導電圖案後，該遮罩層可移除或可不移除，取決於其應用。
接著，參考圖2，電氣連接到該第一導電圖案110的一個或 更多第一導電支柱120係被形成。該第一導電支柱120係被形成以延伸遠離該第一導電圖案110和該載板10的第一表面11，或是從該第一導電圖案110和該載板10的第一表面11向外延伸。在一個實施例中，該第一導電支柱120較佳地係以具有良好的導電、導熱的材料來形成，如銅(Cu)、銅合金、或其類似物，但是該第一導電支柱120的形狀和材料都沒有受到本文所揭示內容的限制。在一個實施例中，該第一導電支柱120所具有的厚度的範圍係從大約30微米到300微米。此外，該第一導電支柱120可使用PVD、CVD、金屬濺鍍、金屬蒸鍍、電解、或無電電鍍或如本領域技術人士所知曉的其它形成技術來形成。在一個實施例中，電解或無電電鍍技術係搭配使用一遮罩層，該遮罩層係設置於該第一主要表面11上方，且具有一預選圖案，以用於在希望的位置中形成該第一導電支柱120。在一個實施例中，該第一導電支柱120具有與該第一導電圖案110不同的寬度。在一個實施例中，一第一導電結構121可包括該第一導電圖案110和該第一導電支柱120、及/或額外的導電結構中的一者或更多者。
接著，參考圖3，該載板10的第一表面11的頂部部分，亦即，該第一導電圖案110和該第一導電支柱120的每一者的外表面係藉由一第一囊封劑130或第一模製囊封劑加以囊封。
在一個實施例中，該第一囊封劑130係完全囊封並覆蓋該第一導電圖案110和該第一導電支柱120，以保護該第一導電圖案110和該第一導電支柱120，使其不會受到像是外部衝擊或氧化的損害。在一個實施例中，該第一囊封劑130被形成以具有比該第一導電支柱120更高的厚度。在其他實施例中，該第一囊封劑可形成以與該第一導電支柱120的遠端齊平。 在此，該第一囊封劑130可以是聚合物複合材料，例如像是用於透過模製製程而執行囊封的環氧模製化合物、用於透過一分配器而執行囊封的液體囊封構件、或其上述的類似物，但是本實施例的方面不限於此。
接著，參考圖4，使用一移除製程以移除該第一囊封劑130的部分。在一個實施例中，使用一研磨製程以在該第一囊封劑130的一表面上移除一預定厚度的材料，使得該第一導電支柱120暴露於該第一囊封劑130的外部。在此，研磨可以使用像是一鑽石研磨機或其等效物來執行，但本發明的方面不限於此。在其他實施例中，遮罩和蝕刻技術，以及研磨技術或上述組合可以用於移除該第一囊封劑130的部分。在一個實施例中，圖4的結構可稱為一模製載板次組件100或第一模製載板100，其包括該載板10、該第一導電圖案110、一個或更多的該第一導電支柱120、以及該第一囊封劑130。在大多數實施例中，該模製載板次組件100包括暴露於該第一囊封劑130的外部的一個或更多的第一導電支柱120，如大致上由圖4所示。在一個實施例中，該模製載板次組件100可以被預先製造並在按照預期的設計修改而被實施在一第二導電圖案140和一第二導電支柱150中，如下文所描述。按照本實施例，此提供了增強的設計靈活性，並節省製造成本和週期時間。
接著，參考圖5，電氣連接到該第一導電支柱120且暴露於該第一囊封劑130的外部上的第二導電圖案140係被形成。在此，如同本領域技術人士所知曉，該第二導電圖案140可以由導電材料製成，包括銅(Cu)、金(Au)、銀(Ag)、鋁(Al)或其它材料。另外，該第二導電圖案140可藉由物理氣相沉積(PVD)、化學氣相沉積(CVD)、金屬濺鍍、金屬 蒸鍍、電解或無電電鍍、或如本領域技術人士所知曉的其它形成技術來形成。在一個實施例中，該第二導電圖案140所具有的厚度的範圍係從大約3微米到50微米。選擇用於該第二導電圖案140上的導電材料與選擇用於該第一導電圖案110上的導電材料可以是相同的或不同的。
根據本實施方式，由於該第二導電圖案140與該第一導電圖案110可以具有不同的圖案，例如，位置和形狀方面，可根據一第一半導體晶粒、或將在後面描述的其他電氣構件或電子裝置而輕易地重新設計或修改電路圖案。
接著，參考圖6，電氣連接到該第二導電圖案140的一個或更多第二導電支柱150係被形成。在此，該第二導電支柱150可被選擇性地連接到該第二導電圖案140的一部分。該第二導電支柱150被形成為從該第二導電圖案140向上延伸而遠離或向外延伸，並且較佳地係以良好的導電、導熱性的材料製成，如銅(Cu)、銅合金、或其類似物，但該第二導電支柱150的形狀和材料不限於在本文所揭示的內容。在一個實施例中，該第二導電支柱150所具有的厚度的範圍係從大約30微米到300微米。此外，該第二導電支柱150可藉由物理氣相沉積(PVD)、化學氣相沉積(CVD)、金屬濺鍍、金屬蒸鍍、電解或無電電鍍、或如本領域技術人士所知曉的其它形成技術來形成。在一個實施例中，電解或無電電鍍技術係搭配使用一遮罩層，該遮罩層係設置於該第一囊封劑130的表面上方，且具有一預選圖案，以用於在希望的位置中形成該第二導電支柱150。在一個實施例中，該第二導電支柱150具有與該第二導電圖案140不同的寬度，並且可以進一步具有與該第一導電支柱120不同的寬度和形狀。在一個實施例中，一第二導電 結構221可包括該第二導電圖案140和該第二導電支柱150、及/或其它導電結構中的一個或更多個。
接著，參考圖7，該第一囊封劑130的頂部部分，也就是，該第二導電圖案140和該第二導電支柱150的每一者的外表面係藉由一第二囊封劑160加以囊封。在一個實施例中，該第二囊封劑160進一步包括一接收空間161，其係被形成以防止該第二導電支柱150所沒有連接到該第二導電圖案140之剩餘區域免於被囊裝。該接收空間161可以使用網版遮罩或其等效物來形成，但是本發明的方面不限於此。在其他實施例中，該接收空間161可以在該第二囊封劑160形成之後才形成。在其他實施例中，在該接收空間161內的導電圖案140的側壁部分可以被該第二囊封劑160或其它絕緣材料囊封或覆蓋。在一個實施例中，該接收空間161係被配置為具有大致上如圖7所示的傾斜的側壁，以便更佳地促進製造並避免在該第二囊封劑160的尖角。
該第二囊封劑160係完全囊封並覆蓋該第二導電圖案140和該第二導電支柱150之一部分，以保護該第二導電圖案140和該第二導電支柱150，使得其不會受到像是外部衝擊或氧化的損害。在一個實施例中，該第二囊封劑160被形成以具有比該第二導電支柱150更高的厚度。或者，該第二囊封劑160可形成以與該第二導電支柱150的遠端齊平。在一些實施例中，該第二囊封劑160可以是聚合物複合材料，例如像是用於透過模製製程而執行囊封的環氧模製化合物、用於透過一分配器而執行囊封的液體囊封構件、或其上述的類似物，但是本實施例的方面不限於此。該第二囊封劑160可以是與該第一囊封劑130相同的材料或不同的材料。根據本實施 例，該第一囊封劑130和該第二囊封劑160是不同且分開的材料區域。
接著，參考圖8，使用一移除製程移除該第二囊封劑160的部分。在一個實施例中，使用一研磨製程以在該第二囊封劑160的一表面上移除一預定厚度的材料，使得該第二導電支柱150暴露於該第二囊封劑160的外部。在一個實施例中，可以使用像是一鑽石研磨機或其等效物來執行研磨，但本發明的方面不限於此。在其他實施例中，遮罩和蝕刻技術，以及研磨技術或上述組合可以用於移除該第二囊封劑160的部分。在一替代性實施例中，可以在該第二囊封劑的部分已被移除之後，形成該接收空間161。在一個實施例中，圖8的結構可稱為多層模製導電結構201、多層模製導電基板201，模製載板結構201、或第二模製載板201，其包括該模製載板次組件100、該第二導電圖案140，一個或更多第二導電支柱150、以及具有一個或更多接收空間161的第二囊封劑160。在大多數實施例中，該多層模製導電結構201包括暴露於該第二囊封劑160的外部的該一個或更多第二導電支柱150。在其他實施例中，多層模製導電結構202或多層模製導電基板202係包括該第一導電圖案110、該第一囊封劑130、該第二導電圖案140、一個或更多第二導電支柱150，以及沒有載板10的該第二囊封劑160。
接著，參考圖9一第一半導體模組200被置放在該接收空間161，以予以電氣連接到該第二導電圖案140的剩餘部分，並且該第一半導體模組200未被該第二囊封劑160囊封。在一些實施例中，該第一半導體模組200包括一第一半導體晶粒210、一第一接合墊220、一第一導電凸塊230、和一第一底層填料240。該第一半導體晶粒210具有一底表面，且電氣連接 至一主動層(未圖示)之該第一接合墊220係暴露於該底表面。在一個實施例中，該第一接合墊220包括一導電材料，例如鋁、銅、錫、鎳、金銀、或其它合適的導電材料的一層或更多層。
該第一導電凸塊230係以電氣和實體的方式連接該第一接合墊220和透過一回流製程以連接該第二導電圖案140，並且該第一導電凸塊230係由一個或更多導電材料製成，例如，鉛/錫(Pb/Sn)、或無引線錫和類似物、或其它合適的導電材料。在一個實施例中，該第一導電凸塊230可以是一焊料凸塊、銅支柱、焊料球、或球型凸塊。在一個實施例中，該第一底層填料240填充或配置於該第一囊封劑130的一個表面與該第一半導體晶粒210的底表面之間，隨後進行固化製程。
根據本實施例，該第一底層填料240係保護一凸塊接合部分不會受到外部因素的影響，像是在製造半導體封裝的過程中所產生的機械衝擊或腐蝕。在此，該第一底層填料240可以是聚合物材料，像是環氧樹脂、熱塑性材料、熱固性材料、聚醯亞胺、聚氨酯、聚合物材料、填充的環氧樹脂、填充的熱塑性材料、填充的熱固性材料、填充的聚醯亞胺、填充的聚氨酯、填充的聚合物材料中、助熔的底層填料、或如本領域技術人士所知曉的其他材料中的一者或更多者。在一個實施例中，該第一半導體晶粒210具有主要表面(例如，與第一導電凸塊230對置的表面)，該主要表面實質上位於(例如，水平面)與該第二囊封劑160的外表面相同之平面上。在其它實施例中，該第一半導體晶粒210的主要表面係位於與該第二囊封劑160的外表面不同之平面(例如，水平面)上。
接著，參考圖10和圖11，根據本發明另一實施例，該半導 體封裝1000係藉由附接一個或更多導電凸塊20以電氣連接到暴露於該第二囊封劑160的外部的(多個)第二導電支柱150而製成。在一個實施例中，該導電凸塊20可以由金屬材料製成，例如鉛/錫(Pb/Sn)、或無引線錫和類似物、或如本領域技術人士所知曉的其它合適的導電材料。在一個實施例中，該導電凸塊20可以是一焊料凸塊、銅支柱、焊料球、或球型凸塊。根據本實施例，該半導體晶粒210的外部主要表面與該導電凸塊20的遠端或表面是位於不同的平面，以便在該半導體封裝1000被附接於此時，提供該第一半導體晶粒210和下一層級(level)的組件(如，一印刷電路板)之間的間隙。在一個實施例中，該載板10被分離，以提供如圖11所示的半導體封裝1000，其第一導電圖案110係暴露於外部，用於進一步互連的功能或散熱，在下文中會描述進一步的實施例。
圖12係根據另一實施例而例示一半導體封裝2000的部分剖面圖。在一個實施例中，一散熱器13或一散熱板13係附接到該第一囊封劑130的頂部部分。在一個實施例中，該散熱板13也可以分開地附接到該第一囊封劑130。在一個較佳的實施例中，該載板10係被配置以使用插入於該載板10和該第一囊封劑層130之間的絕緣層14作為散熱板13(例如，包括一導熱材料)。在一些實施例中，該散熱板13係較佳地以具有高熱導率和低熱膨脹係數之金屬來形成。然而，由於該散熱板13直接連接到暴露的第一導電圖案110，一絕緣層14係插入於該散熱板13和該第一導電圖案110之間，以防止在該散熱板13和該第一導電圖案110之間發生電氣短路。在一些實施例中，該散熱板13可以由具有高熱導率的材料來形成，例如矽、玻璃或、環氧樹脂，並且一金屬及/或陶瓷粉末係形成於該散熱板13內。
圖13係根據進一步的實施例而例示一半導體封裝3000的部分剖面圖。在一個實施例中，在該載板10與該第一囊封劑130分離後，一第二半導體模組300係被放置以電氣連接到在該第一囊封劑130的頂部部分處的第一導電圖案110，並且該第二半導體模組300的外表面是藉由在該第一囊封劑130的頂部部分處的第三囊封劑30來囊封的。
在一個實施例中，該第二半導體模組300包括一第二半導體晶粒310、一第二接合墊320、一第二導電凸塊330、和一第二底層填料(未圖示)。該第二半導體晶粒310具有一底表面，而電氣連接到主動層(未圖示)的第二接合墊320係暴露於該底表面。在一個實施例中，該第二接合墊320包括一導電材料，例如鋁、銅、錫、鎳、金銀、或其它合適的導電材料的一層或更多層。
該第二導電凸塊330係以電氣和實體的方式連接該第二接合墊320和透過一回流製程以連接該第一導電圖案110，並且該第二導電凸塊330係由一個或更多導電材料製成，例如，鉛/錫(Pb/Sn)、或無引線錫和類似物、或其它合適的導電材料。在一個實施例中，該第二導電凸塊330可以是一焊料凸塊、銅支柱、焊料球、或球型凸塊。該第三囊封劑30可以用和先前所述的第一囊封劑130之相同的材料來形成。在其他實施例中，可以形成該第三囊封劑30，以暴露該第二半導體模組300或該第二半導體晶粒310到外部，以在使用或不用散熱板的情況下提供改良的熱散失。
圖14係根據又進一步的實施例而例示一半導體封裝4000的部分剖面圖。在一個實施例中，在該載板10與該第一囊封劑130分離後，一被動元件400係被放置以電氣連接到在該第一囊封劑130的頂部部分處的 第一導電圖案110，並且被附接而能夠交換信號。此外，該被動元件400的外表面是藉由在該第一囊封劑130的頂部部分處的第三囊封劑30來囊封的。在一個實施例中，該被動元件400可形成為一電阻器、一電感器、或一電容器。該第三囊封劑30可以用和先前所述的第一囊封劑130之相同的材料來形成。
圖15係根據另一個實施例而例示一半導體封裝5000的部分剖面圖。在一個實施例中，在該載板10與該第一囊封劑130分離後，該第二半導體模組300和該被動元件400係被放置以電氣連接到在該第一囊封劑130的頂部部分處的第一導電圖案110，並且被附接而能夠交換信號。此外，該第二半導體模組300和該被動元件400的外表面是藉由在該第一囊封劑130的頂部部分處的第三囊封劑30來囊封的。在一個實施例中，該第二半導體模組300和該被動元件400係如前面相關於圖13和圖14所描述。該第三囊封劑30可以用和先前所述的第一囊封劑130之相同的材料來形成。在替代實施例中，可以形成該第三囊封劑30，以暴露該第二半導體晶粒310的表面，如前所述。
從上述的一切可知，根據另一個實施例，本領域的技術人士能確定的是，一種用於製造半導體封裝的方法，其包括形成一第一導電圖案於一載板的一第一表面上；形成一第一導電支柱，其係被電氣連接到該第一導電圖案；首先使用一第一囊封劑來囊封該第一導電圖案和該第一導電支柱；形成一第二導電圖案，其係被電氣連接到該第一導電支柱，該第一導電支柱係暴露於該第一囊封劑的外部；形成一第二導電支柱，其係被電氣連接到該第二導電圖案的一部分；其次使用一第二囊封劑來囊封該第 二導電圖案和該第二導電支柱的部分，並且一接收空間，該第二導電圖案的剩餘部分係被暴露於該接收空間；以及放置一第一半導體晶粒於該接收空間而予以電氣連接到暴露於該第二囊封劑的外部的該第二導電圖案。
從上述的一切可知，根據進一步的實施例，本領域的技術人士能確定的是，一種半導體封裝，其包括：一第一導電圖案；一第一導電支柱，其係被電氣連接到該第一導電圖案；一第一囊封劑，其係囊封該第一導電圖案和該第一導電支柱；一第二導電圖案，其係被電氣連接到暴露於該第一囊封劑的外部的該第一導電支柱；一第二導電支柱，其係被電氣連接到該第二導電圖案的部分；一第二囊封劑，其形成一接收空間，該第二導電圖案的剩餘部分係被暴露於該接收空間，該第二囊封劑係囊封該第二導電圖案和該第二導電支柱的一部分；以及一第一半導體晶粒，其係被電氣連接到暴露於該第二囊封劑的外部的該第二導電圖案，並且係被放置於該接收空間中。
從上述的一切可知，根據本文所描述的方法之進一步的實施例，本領域的技術人士能確定的是，電氣耦合該第一半導體晶粒係包括：直接將該第一半導體晶粒連接到第二導電結構在該接收空間中之第三部分。在又進一步的實施例中，電氣耦合該第一半導體晶粒可包括電氣耦合具有一主要表面的該第一半導體晶粒，該主要表面實質上位於與該第二囊封劑的一外表面相同之一平面上。在另一個實施例中，提供該多層模製導電結構可包括：提供包含金屬、矽、玻璃、或環氧樹脂的一者或更多者之載板。在進一步的實施例中，提供該多層模製導電結構可包括：提供包括一金屬且具有一絕緣層之該載板，該絕緣層係設置在該載板的該第一表面 和該第一導電結構之間。
從上述的一切可知，根據本文所描述的結構之進一步的實施例，本領域的技術人士能確定的是，該半導體封裝可進一步包括導電凸塊，其係附接到該第二導電結構的第二部分。
從上述的一切可知，根據本文所描述的結構之進一步的實施例，本領域的技術人士能確定的是，一散熱板，其可以被配置在該第一囊封劑之對置於該第一半導體晶粒的頂表面附近。
鑑於上述所述，顯而易見的是，已揭示一種使用具有彈性的設計能力的多層模製導電結構來製造一半導體封裝之方法及結構。其包括，特別是，一第一導電結構和一第二導電結構，該第一導電結構係被一第一模製囊封劑囊封，且該第二導電結構係設置在該第一模製囊封劑上並電氣連接到該第一導電結構。該第二導電結構有助於對該封裝基板互連結構之彈性設計變化或重新設計。該第二模製囊封劑係囊封該第二導電結構的至少部分，並且一電子裝置係電氣連接到該第二導電圖案。在一些實施例中，一個或更多額外的電子裝置可電氣連接到該第一導電圖案。在其他實施方式中，一散熱板可以被附接到該半導體封裝。
雖然已經特定顯示本發明的範例性實施例並進行描述，本領域的技術人士可以了解的是，可對於其形式和細節上進行各種變化而不脫離本發明的精神和範疇的前提下，本發明的精神和範疇係如由隨附申請專利範圍所界定。
如申請專利範圍所反映，本發明的特色可在於比單一個前面所揭示實施例的所有特徵還少。因此，以下所表述的申請專利範圍在此明 確地併入附圖的詳細說明，每一項申請專利範圍本身係作為本發明的一個單獨實施例。此外，雖然本文所描述的一些實施例係包括在其他實施例中的一些特徵但不是其它實施例的特徵，不同實施例的特徵之組合係希望落在本發明的範疇內，希望形成本領域的技術人士所能理解地不同的實施例。
20‧‧‧導電凸塊
110‧‧‧第一導電圖案
120‧‧‧第一導電支柱
130‧‧‧第一囊封劑
140‧‧‧第二導電圖案
150‧‧‧第二導電支柱
161‧‧‧接收空間
200‧‧‧第一半導體模組
210‧‧‧半導體晶粒
220‧‧‧第一接合墊
230‧‧‧第一導電凸塊
240‧‧‧第一底層填料
1000‧‧‧半導體封裝

Claims (10)

  1. 一種用於製造半導體封裝的方法，其包括：提供多層模製導電結構，其包括：第一導電結構，其包括在載板的第一表面上的第一導電圖案和附接至所述第一導電圖案的第一導電支柱，其中在所述第一導電支柱附接至所述第一導電圖案處，所述第一導電圖案比所述第一導電支柱寬，以及其中所述第一導電圖案界定所述半導體封裝的最外面圖案化導電結構；第一囊封劑，其囊封所述第一導電結構，其中：所述第一導電圖案具有暴露於所述載板的所述第一表面附近的所述第一囊封劑的第一表面中的外表面；所述第一導電圖案具有嵌入於所述第一囊封劑內的側表面；所述第一導電支柱暴露於所述第一囊封劑的第二表面中，所述第二表面與所述第一囊封劑的所述第一表面相對；以及所述第一導電圖案的所述外表面與所述第一囊封劑的所述第一表面大致上齊平；第二導電結構，其包括附接至所述第一導電結構的第二導電圖案和附接至所述第二導電圖案的第一部分的第二導電支柱；以及第二囊封劑，其囊封所述第二導電結構，其中：所述第二導電圖案具有暴露於鄰接所述第一囊封劑的所述第二表面的所述第二囊封劑的第一表面中的外表面；所述第二導電圖案的第二部分暴露於接收空間中，其中所述第二部分在所述接收空間中沒有與任何第一導電支柱和第二導電 支柱直接實體接觸；以及所述第二導電支柱暴露於與所述第二囊封劑的所述第一表面相對的所述第二囊封劑的第二表面中；以及將第一半導體晶粒電氣耦合到在所述接收空間中的所述第二導電圖案的所述第二部分。
  2. 如申請專利範圍第1項所述的方法，其中：提供所述多層模製導電結構包括：提供具有嵌入於所述第二囊封劑中的側表面的所述第二導電圖案；以及提供與所述第二囊封劑大致上齊平的所述第二導電圖案的所述外表面；以及所述方法進一步包括：移除所述載板；提供第二半導體晶粒和被動元件，其被放置以電氣耦合至所述第一囊封劑的所述第一表面附近的所述第一導電圖案，其中所述第一導電支柱橫向插入於所述被動元件和所述第一半導體晶粒之間，使得所述被動元件不與所述第一導電支柱重疊；以及提供第三囊封劑，其囊封所述第二半導體晶粒和所述被動元件，其中所述被動元件和所述第一半導體晶粒不橫向重疊，以及其中所述第二半導體晶粒和所述第一半導體晶粒不完全橫向重疊。
  3. 如申請專利範圍第1項所述的方法，其中提供所述多層模製導電結構包括： 提供具有所述第一表面的所述載板；形成所述第一導電圖案在所述載板的所述第一表面上；形成所述第一導電支柱以與所述第一導電圖案電氣耦合；之後，形成所述第一囊封劑至所述第一導電圖案和所述第一導電支柱上；移除所述第一囊封劑的部分以在所述第一囊封劑的所述第二表面暴露所述第一導電支柱；形成所述第二導電圖案以與所述第一導電支柱電氣耦合；形成所述第二導電支柱以與所述第二導電圖案的第一部分電氣耦合；之後，形成所述第二囊封劑至所述第二導電圖案和所述第二導電支柱上；移除所述第二囊封劑的第一部分以形成暴露所述第二導電圖案的所述第二部分的所述接收空間；在移除所述第二囊封劑的所述第一部分之後，移除所述第二囊封劑的第二部分以在所述第二囊封劑的所述第二部分中暴露所述第二導電支柱。
  4. 一種半導體封裝，其包括：第一導電結構，其包括第一導電圖案和附接至所述第一導電圖案的第一導電支柱，其中在所述第一導電支柱附接至所述第一導電圖案處，所述第一導電圖案比所述第一導電支柱寬，以及其中所述第一導電圖案界定所述半導體封裝的最外面圖案化導電結構；第一囊封劑，其囊封所述第一導電結構，其中：所述第一導電圖案具有暴露於所述第一囊封劑的第一表面 中的外表面；所述第一導電圖案具有嵌入於所述第一囊封劑內的側表面；所述第一導電支柱暴露於所述第一囊封劑的第二表面中，所述第二表面與所述第一囊封劑的所述第一表面相對；以及所述第一導電圖案的所述外表面與所述第一囊封劑的所述第一表面大致上齊平；第二導電結構，其包括電氣耦合至所述第一導電結構的第二導電圖案和附接至所述第二導電圖案的第一部分的第二導電支柱，其中在所述第二導電支柱附接至所述第二導電圖案的所述第一部分處，所述第二導電圖案比所述第二導電支柱寬；第二囊封劑，其囊封所述第二導電結構，其中：所述第二導電圖案具有暴露於所述第二囊封劑的第一表面中的外表面；所述第二導電圖案的第二部分沒有在所述第二囊封劑和在所述第二導電支柱提供；以及所述第二導電支柱暴露於與所述第二囊封劑的所述第一表面相對的所述第二囊封劑的第二表面中；第一半導體晶粒，其電氣耦合到所述第二導電圖案的所述第二部分；以及接收空間，其設置在所述第二囊封劑中，其中所述接收空間暴露所述第二導電圖案的所述第二部分，其中：所述第二導電圖案的所述第二部分在所述接收空間中沒有與任何第一 導電支柱和第二導電支柱直接實體接觸。
  5. 如申請專利範圍第4項所述的半導體封裝，其進一步包括：第一底層填料，其設置在所述第一囊封劑的所述第二表面和所述第一半導體晶粒的表面之間，其中所述第一底層填料實體接觸所述第二導電圖案的所述第二部分的側表面。
  6. 如申請專利範圍第4項所述的半導體封裝，其進一步包括：被動元件，其被放置以電氣耦合至所述第一囊封劑的所述第一表面附近的所述第一導電圖案，其中：所述第一導電支柱和所述第二導電支柱橫向插入於所述被動元件和所述第一半導體晶粒之間，使得所述被動元件不與所述第一導電支柱重疊以及不與所述第二導電支柱重疊；以及所述第一導電支柱和所述第二導電支柱電氣連接；第三囊封劑，其囊封所述被動元件，其中所述被動元件和所述第一半導體晶粒不重疊；以及第二半導體晶粒，其附接至所述第一導電圖案的所述外表面以使得所述第二半導體晶粒鄰近所述第一囊封劑的所述第一表面以及所述第一半導體晶粒鄰近所述第一囊封劑的所述第二表面，以及其中所述第二半導體晶粒和所述第一半導體晶粒僅部分重疊，以及其中所述第三囊封劑囊封所述第二半導體晶粒。
  7. 如申請專利範圍第4項所述的半導體封裝，其中：所述第二囊封劑的側壁表面界定所述接收空間；所述側壁表面是傾斜的； 所述第一半導體晶粒直接連接至在所述接收空間中的所述第二導電圖案的所述第二部分；所述第二導電圖案具有嵌入所述第二囊封劑中的側表面；以及所述第二導電圖案的所述外表面與所述第二囊封劑大致上齊平。
  8. 一種半導體封裝，其包括：第一導電圖案；第一導電支柱，其連接到所述第一導電圖案，其中在所述第一導電支柱連接至所述第一導電圖案處，所述第一導電圖案比所述第一導電支柱寬，以及其中所述第一導電圖案界定所述半導體封裝的最外面圖案化導電結構；第一囊封劑，其囊封所述第一導電圖案和所述第一導電支柱，其中：所述第一導電圖案具有暴露於所述第一囊封劑的第一表面中的外表面；以及所述第一導電支柱暴露於所述第一囊封劑的第二表面中，所述第二表面與所述第一囊封劑的所述第一表面相對；第二導電圖案，其電氣連接到所述第一導電支柱，其中所述第一導電支柱暴露於所述第一囊封劑的所述第二表面中；第二導電支柱，其連接到所述第二導電圖案的第一部分；第二囊封劑，其囊封所述第二導電圖案的第一部分和所第二導電支柱的部分，其中：所述第二導電圖案具有暴露於鄰接所述第一囊封劑的所述第二表面的所述第二囊封劑的第一表面中的外表面；以及 所述第二導電支柱暴露於與所述第二囊封劑的所述第一表面相對的所述第二囊封劑的第二表面中；接收空間，其設置於所述第二囊封劑中，以暴露所述第二導電圖案的至少一第二部分；所述第二部分在所述接收空間中沒有與任何第一導電支柱和第二導電支柱直接實體接觸；以及第一半導體晶粒，其放置在所述接收空間，並電氣連接到所述第二導電圖案的所述第二部分。
  9. 如申請專利範圍第8項所述的半導體封裝，其中：所述第一半導體晶粒直接連接到在所述接收空間中的所述第二導電圖案；所述半導體封裝進一步包括至少一導電凸塊，其耦合到所述第二導電支柱之暴露於所述第二囊封劑的外部的部分；所述半導體封裝係進一步包括第一底層填料，其設置在所述第一囊封劑的所述第二表面和所述第一半導體晶粒的表面之間，其中所述第一底層填料實體接觸在所述接收空間中的所述第二導電圖案的所述第二部分的側表面；所述第一導電圖案具有嵌入所述第一囊封劑內的側表面；所述第一導電圖案的所述外表面與所述第一囊封劑大致上齊平；在所述第二導電支柱連接至所述第二導電圖案的所述第一部分處，所述第二導電圖案比所述第二導電支柱寬；所述第二導電圖案具有嵌入所述第二囊封劑內的側表面；以及 所述第二導電圖案的所述外表面與所述第二囊封劑大致上齊平。
  10. 如申請專利範圍第8項所述的半導體封裝，其進一步包括：第二半導體晶粒和被動元件，其被放置以電氣耦合至所述第一囊封劑的所述第一表面附近的所述第一導電圖案，其中所述第一導電支柱橫向插入於所述被動元件和所述第一半導體晶粒之間，以使得所述被動元件不與所述第一導電支柱重疊；以及第三囊封劑，其囊封所述第二半導體晶粒和所述被動元件，其中所述被動元件和所述第一半導體晶粒不重疊，以及其中所述第二半導體晶粒和所述第一半導體晶粒僅部分重疊。
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