TW558816B - Manufacturing method of semiconductor device and semiconductor device - Google Patents

Manufacturing method of semiconductor device and semiconductor device Download PDF

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Publication number
TW558816B
TW558816B TW090117123A TW90117123A TW558816B TW 558816 B TW558816 B TW 558816B TW 090117123 A TW090117123 A TW 090117123A TW 90117123 A TW90117123 A TW 90117123A TW 558816 B TW558816 B TW 558816B
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TW
Taiwan
Prior art keywords
lead
wafer
semiconductor device
lead frame
internal
Prior art date
Application number
TW090117123A
Other languages
English (en)
Inventor
Shotaro Uchida
Original Assignee
Toshiba Corp
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Publication date
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Publication of TW558816B publication Critical patent/TW558816B/zh

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/11Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/115Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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Description

558816 經濟部智慧財產局員工消费合作社印製
A7 B7五、發明説明(1 ) 〔發明所屬之技術領域〕 本發明係有關一種具有多針腳之半導體裝置之製造方 法及利用此方法所得到之半導體裝置。 〔習知技術〕 近年隨著攜帶型電子機器的普及,半導體封裝體的小 型薄型化、輕量化、高性能化均受到特別的要求。習知, 半導體晶片的上部電極是用連線銲接被連接在外部引線。 又’二極體等之2端子製品是用銲接介於內部引線被連接 在外部引線。 又,因功率M〇S F E T等之3端子製品是處理較大 的電流所以最好是銲接引線,但由於被設在晶片上面的閘 電極比源電極還小,就算銲接內部引線,還是顯現不出位 置精確度。因此,閘電極是用單線的銲接線,源電極是用 欲確保電流容量的複數條銲接線而連接的。 閘電極是.種能做細線連接的連線銲接,源電極是有助 於散熱與〇 N電阻的內部引線之銲接的話,也亦各別進行 不同之連接的方法,但要是閘電極爲連線銲接用之電極( 例如A 1 ),源電極爲銲接用之電極(例如'N i > A u ) 的話,就必須改變電極的表面處理,反而導致增加製造設 備成本與製造成本。 又,串聯連接兩個功率Μ〇S F E T而使用的情形, 習知是用印刷基板的配線完成此串接的。此方法會因配線 產生寄生電感與導線電阻,而招致性能降低。 本紙張尺度適用中國國家標準(CNS〉Α4規格(210X297公釐) i1!lr (請先閲讀背面之注意事項再填寫本頁) 裝· 訂 558816 A7 B7 五、發明説明(2.) 〔發明欲解決之課題〕 (請先閲讀背面之注意事項再填寫本頁) 本發明係爲考慮上述事項而發明的,針對半導體裝置 之內部配線提供一安裝作業性優、可靠性高的外部引線之 連接方法。又,提供一用上述製造方法所得到的半導體裝 置及能將兩個半導體晶片應用上述連接方法串接在半導體 封裝體內之構成。 〔用以解決課題之手段〕 經濟部智慧財產局員工消費合作社印¾. 爲解決上述課題,本發明之半導體裝置之製造方法( 申請專利範圍第1項)其特徵爲具有:將在上面具有主電 極與面積小於此主電極之副電極的半導體晶片,介於連接 件搭載在外部引線框架的晶片銲墊之工程、和將各自連接 前述半導體晶片之主電極及副電極與前述外部引線框架所 對應的外部引線之連接用銲墊之間的內部引線利用聯結桿 被連接的內部.引線框架,介於連接件搭載在所定位置之工 程、和加熱前述連接件,並同時導電固定前述半導體晶片 與前述晶片銲墊之間、前述內部引線與前述半導體晶片之 電極及前述外部引線的連接銲墊之間之工程、和切斷前述 聯結桿,在各內部引線使前述內部引線框架分開之工程。 又,本發明之半導體裝置(申請專利範圍第2項)其 特徵爲具備有:被搭載在引線框架之晶片銲墊上,具有主 電極與面積小於此主電極的副電極之半導體晶片、和被連 接在前述半導體晶片的主電極及副電極與前述引線框架所 本紙張尺度適用中國國家標準(CNS ) A4規格(2IOX297公釐) -5- 經濟部智慧財產局員工消費合作社印製 558816 A7 _____B7____ 五、發明説明(之) 對應的外部引線的連接銲墊之間,具有分別在內部引線之 間被切斷的聯結桿之內部引線框架。 上述半導體裝置乃希望如下所述般的被構成。 (1 )聯結桿是比內部引線框架的其他部分之厚度還 薄。 (2 )聯結桿係被設置在外部引線框架所鄰接的外部 引線之中央附近。 (3 )晶片銲墊係在鄰接聯結桿的部分,具有以離開 此聯結桿一段距離的狀態呈後退之缺口部分。 (4 )內部引線框架是形成聯結桿部分高於半導體晶 片的上面。 又,本發明之半導體裝置(申請專利範圍第7項)係 具備有:被搭載在外部引線框架所鄰接的第1及第2晶# 銲墊上,分別具有主電極與面積小於此主電極之副電極的 第1及第2半導體晶片、和具有被連接在前述第1及第2 半導體晶片之各個主電極及副電極與前述外部引線框架所 對應的外部引線之間的內部引線,且具有各別在內部引線 之間被切斷的聯結桿之內部引線框架、和對前述第1及胃 2晶片銲墊之相對邊而言,被垂直形成在前述第1晶片銲 墊之突起引線部、和與被連接於搭載在前述第2晶片靜墊 的第2半導體晶片的主電極的內部引線形成一體’具有與 前述突起引線部嵌合的缺口部,且與前述突起引線部導電 連結之連結引線部。 上述之半導體裝置乃希望如下所述般被構成。 本紙浪尺度適用中國國家標準(CNS ) A4規格(2丨〇X 297公釐) (請先閲讀背面之注意事項再填寫本頁)
-6 - 558816 A7 B7 五、發明説明(4 ) (1)在突起引線部的上端具有從上端面後退而支撐 連結引線部之平坦部分。 (請先閱讀背面之注意事項再填寫本頁) (2 )第1及第2半導體裝置係爲M〇S F ET之晶 片’第1半導體裝置係爲內裝一並聯在M〇S F ET的肯 特基勢壘二極體之晶片。 〔發明之實施形態〕 以下參照圖面說明本發明之實施形態。 (第1實施形態) 第1圖係爲說明有關本發明之第1實施形態之半導體 裝置之製造方法圖,第1圖(a )係表示半導體晶片安裝 在引線框架上,利用內部引線連接半導體晶片的上面電極 與引線框架的外部引線狀態之平面圖,第1圖(b )係爲 沿著第1圖(a )之A — A線之斷面圖。 經濟部智慧財產局員工消费合作社印製 第1圖中,1係引線框架中之晶片銲墊,3係引線框 架之外部引線.,5係與外部引線3形成一體之內部引線連 接用銲墊,7係引線框架之聯結桿,構成己知之樹脂密封 用引線框架。爲了與後述的內部引線框架做一區別,於以 後稱之爲外部引線框架。 在外部引線框架之晶片銲墊1介於連接件2 1 a來安 裝半導體晶片9。連接件2 1 a可使用銲劑或導電性黏接 劑。半導體晶片9例如爲Μ〇S F E T,在晶片上面具有 電極面積大的源電極(主電極)1 1、電極面積小的閘電 極(副電極)1 3 ,晶片下面的汲電極乃如前所述介於連 本紙張尺度適用中國國家標準(CNS ) Α4規格(210X297公釐) 558816 A7 _B7_ 五、發明説明(5 ) 接件被連接在晶片銲墊1。 (請先閱讀背面之注意事項再填寫本頁) 第1實施形態之特徵係在於對源電極1 1與閘電極 1 3的外部引線框架之引線(內部引線)是用由板狀金屬 製成的內部引線框架而連接的。內部引線框架係由源電極 引線1 5與閘電極引線1 7構成的,更具有連結兩者之聯 結桿1 9。聯結桿1 9係於安裝內部引線框架後,用切斷 器等切開。以很容易切開的狀態使聯結桿定位在鄰接的外 部引線間的略中央而設置。 又,內部引線框架係利用衝壓加工等來形成例如由銅 或銅合金的板,如第1圖(a )所示,配合晶片上面與外 部引線上面的水平而彎曲加工。此時包括聯結桿1 9的部 分是以高於晶片上面的狀態被形成,藉此就很容易切斷聯 結桿。 經濟部智慧財產局員工消f合作社印製 內部引線框架係如第2圖所示,利用框架2 3被連結 的狀態來供給複數個內部引線之裝置(源電極引線1 5與 閘電極引線1.7的裝置),於被連接在晶片與外部引線框 架之前,在懸掛軸2 5的引線側根元被切斷。各個內部引 線框架(內部引線裝置)係具有被連接在晶片之上面電極 (源電極1 1及閘電極1 3 )的晶片銲墊部1 5 a , 1 7 a、和被連接在外部引線之引線銲墊部1 5 b、 1 7 b。晶片銲墊部1 5 a ,1 7 a 、引線銲墊部1 5 b 、1 7 b係分別利用連接件2 1 b、2 1 c被連接在晶片 電極1 1 ,1 3與外部引線連接銲墊5。連接件2 1 b、 2 1 c可使用銲劑或導電性黏接劑,與使用在小片裝配接 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) -8- 經濟部智慧財產局員工消费合作社印製 558816 A7 B7 五、發明説明(6 ) 合的連接件2 1 a同材料爲佳,但配合需求也可使用不相 同者。 其次,說明第1圖之引線連接構成之製造工程。先在 連接引線框架之晶片銲墊1及內部引線的外部引線之連接 銲墊5,利用配料機適量的供給例如膏狀的銲劑(銲膏) 。也可用印刷法取代配料方式。 其次,將半導體晶片9使用小片裝配接合等安裝在引 線框架之晶片銲墊1上。然後使用配料機等將銲膏適量的 供給到晶片的源電極1 1、閘電極1 3之上。被使用在小 片裝配接合的銲膏與被使用在引線連接的銲膏可使用同一 種銲膏。 其次,由內部引線框架被連結在框架的狀態,將源電 極引線1 5與閘電極引線1 7切開成1組,使之定位安裝 在半導體晶片及外部引線框架上。 供給內部引線用的銲膏除上述方法外,也可先裝銲膏 印刷在內部引,線框架的晶片銲墊部1 5 a 、1 7 a與引線 銲墊部1 5 b、1 7 b (第2圖之虛線部),使之配合安 裝在半導體晶片及外部引線框架上的所定位置。 其次,使安裝完成的引線框架通過銲接圓滑熱處理爐 ,來實施銲劑的圓滑熱處理。圓滑熱處理爐可爲輸送帶式 之連續爐,也可爲靜態型之圓滑熱處理爐。藉此小片裝配 接合用的銲劑2 1 a 、內部引線用的銲劑2 1 b 、2 1 c 就能同時被圓滑熱處理。 上述係爲銲接圓滑熱處理的狀態,但使用導電性黏接 本紙張尺度適用中國國家標隼(CNS ) A4規格(210X297公釐) (請先閱讀背面之注意事項再填寫本頁)
-9 - 558816 A7 B7 五、發明説明(8 ) 1 a之聯結桿1 9的部分利用切口 2 6形成後退,就很容 易切斷聯結桿。 (請先閱讀背面之注意事項再填寫本頁) (第3實施形態) 第4圖係有關本發明之第2實施形態的內部引線之平 面圖以及沿著聯結桿1 9 a的部分(B部)之B — B線之 放大斷面圖。第2實施形態係如第4圖(b )所示,聯結 桿1 9 a的切斷部2 7之厚度比內部引線的厚度(例如 0.3mm)薄(例如〇.15mm),很容易切斷。 (第4實施形態) 第4實施形態係爲內部引線框架之再一變形例。第5 圖係有關本發明之第4實施形態的內部引線之平面圖,聯 結桿部分是用兩根聯結桿1 9 b、1 9 b /構成的。藉此 提高聯結桿部分的剛性,還可防止源電極引線1 5與閘電 極引線1 7扭轉等相對性的變形。 經濟部智慧財產局員工消費合作社印!». 再者,針對聯結桿19b、19b >,如第4圖(b )般,於一部分設有較薄之處,亦可很容易的切斷。 (第5實施形態) 第5實施形態係爲內部引線框架之又一變形例。第6 圖係爲有關本發明之第5實施形態的內部引線之平面圖’ 聯結桿部分是用兩根聯結桿1 9 c、1 9 c >構成的。與 第4實施例相異之點在於,1根聯結桿1 9 c是被設置在 本紙张尺度適用中國國家標隼(CNS ) A4規格(210X 297公釐) -11 - 558816 A7 B7 經濟部智慧財產局員工消资合作社印製 五、發明説明(9 .) 外部引線框架的內部引線連接用靜墊5附近。與第4實施 形態同樣的可提高內部引線框架的剛性。又,針對聯結桿 19 c、19 c ',如第4圖(b)般,在一部分設有較 薄之處,亦可很容易的切斷。 (第6實施形態) 第7圖(a )係表示有關本發明之第6實施形態的半 導體裝置之引線連接方法之平面圖’於第7圖(b )表示 沿著其c _ C線之斷面圖。本實施形態是將兩個相鄰的半 導體晶片安裝在引線框架’於進行內部引線連接後’被模 組成一封裝體。再者,沿著A 一 A線之斷面圖係與第1圖 (b)相同。又,於第8圖表示沿著第1圖(b)之D -D線之斷面圖。 第7圖所示的兩個半導體晶片1 1 :、1 1 2被小片裝 配接合後,應用第1〜第5實施形態所說明的內部引線框 架的連接方法.,各別被連接在外部引線框架,但圖面右側 所示的第1內部引線框架之形狀與圖面左側所示的第2內 部引線框架之形狀是相異的。第1內部引線框架是舉第1 實施形態之內部引線框架爲例,但也可使用第3或第4實 施形態的內部引線框架。 又,圖面左側所示的第2晶片銲墊1 2與圖面右側所示 的第1晶片銲墊1 !的形狀是相異的。第2晶片銲墊1 2是 舉第1實施形態的晶片銲墊爲例,但也可使用第2實施形 態的晶片銲墊。 —— —— —— — — (請先閲讀背面之注意事項再填寫本頁) •裝
,1T k 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) -12- 經濟部智慧財產局員工消费合作社印¾ 558816 A7 ___B7_ 五、發明説明(10 ) 第1晶片銲墊1 1係使鄰接第2晶片銲墊1 2的部分之 一部分被切入到晶片銲墊略邊邊的中央,並被加工成直立 狀。此直立部分即爲突起引線部3 3。 另一左側的第2內部引線框架之源電極(主電極)引 線之一部分係具有延長至第1晶片方向之連結引線部2 9 ,搭載第1晶片的晶片銲墊之突起引線部3 3是嵌合於被 設置在其前端的切口部3 1。此時,在自突起引線部3 3 之上端面後退的位置,設有支撐第2晶片之內部引線的連 結引線部2 9之段差(平坦部)3 5。按此即可穩定地保 持第2內部引線框架。第2內部引線框架的連結引線部 2 9與第1晶片銲墊的突起引線部3 3之嵌合部是用銲劑 2 1 ci接合的。 其次,說明第6實施形態之半導體裝置之製造工程。 先利用配料機例如將銲膏適量的供給到引線框架的晶片銲 墊1 !及1 2、連接內部引線之外部引線的銲墊5。亦可用 印刷法取代配料方式。 其次,將半導體晶片9 !、9 2使用小片裝配接合等分 別安裝在引線框架的晶片銲墊1 ^、1 2上。然後使用配料 機等將銲膏適量的供給到晶片的源電極1 1 i、1 1 2閘電 極1 3 i、1 3 2之上。使用在小片裝配接合的銲膏與使用 在引線連接的銲膏可使用同一種銲膏。 其次,由內部引線框架被連結在框架的狀態,將第1 晶片用的源電極引線1 5 1與閘電極引線1 7 1切開成1組 ,使之定位安裝在半導體晶片的電極及外部引線框架的連 本紙張尺度適用中國國家標準(CNS ) A4規格(210X 297公釐〉 (請先閲讀背面之注意事項再填寫本頁)
-13· 558816 A7 B7 五、發明説明(11 ) 接銲墊上。接著,將第2晶片用的源電極引線1 5 2與閘電 極引線1 7 2切開成1組,使之定位安裝在半導體晶片及外 部引線框架上。此時,第2內部引線框架的連結引線部 3 7之缺口部3 1是與第1內部引線框架的突起引線部 3 3嵌合,且被載置於設置在突起引線部3 3的段差3 5 。更由配料機將銲膏2 1 d供給到連結引線部2 9與突起 引線部3 3的嵌合部。 其次,將安裝上晶片及內部引線框架的外部引線框架 通過銲接圓滑熱處理爐,來實施銲劑的圓滑熱處理。圓滑 熱處理爐可爲輸送帶式之連續爐,也可爲靜態型之圓滑熱 處理爐。藉此小片裝配接合用的銲膏2 1 a、內部引線用 的銲劑2 1 b、2 1 c、連結部用的銲劑2 1 d就可同時 被圓滑熱處理。 然後經過與第1實施例同樣的工程,藉此完成密封過 的半導體裝置。上述實施形態是在連接件使用銲膏,但使 用導電性黏接劑當然亦可。 對連結引線部2 9之第1晶片銲墊1 1的連接方法可 考慮將連結引線部2 9之前端形成在下方,直接對第1晶 片銲墊1 1進行銲接,但作爲此連接的銲劑會與安裝晶片 用的銲劑融合,安裝銲劑之厚度、晶片之平行度恐會受到 不良影響之虞。對此本發明利用突起引線部3 3使銲接部 與晶片遠離,就不用擔心如上述般的不良影響。 第6實施形態的封裝體乃如第9圖所示,要是應用同 步整流電路的一部分很有效的。於第9圖中,Q 1爲功率 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) —iilr (請先閱讀背面之注意事項再填寫本頁) 裝· 訂 經濟部智慧財產局員工消費合作社印奴 -14- 558816 經濟部智慧財產局員工消贫合作社印製 A7 B7 五、發明説明(12 ) M〇S F E T,而並聯寫入電晶體符號的二極體係爲寄生 二極體。串接在Q 1的Q2 ’除了寄生二極體以外,在同 一晶片內並聯一肯特基能障二極體S B D之功率 1^1〇3?£丁。在(3 1的源極3 1與(32的汲極〇2之連 接結點負荷連接著感應體L與電容器C的串聯電路。肯特 基能障二極體SBD是被設在當Q1的電晶體爲OFF時 的電流用路。 上述電路的Q 2爲第1半導體晶片,Q 1爲第2半導 體晶片,應用於第6實施形態的封裝體的話,即能實現以 同步整流電路的一部分作爲一封裝化的半導體裝置。如此 一來只要半導體裝置電路被一封裝化,寄生電感與導線電 阻會比使用配線基板作爲配線的狀況更加減少,就能使元 件性能與實裝效率提高。 以上根據實施形態說明本發明,但本發明並不限於上 述實施形態,可做各種變形。例如在第6實施形態是以兩 片做說明,但也可應用三片以上的多晶片。 〔發明之效果〕 如以上所述,按本發明應用內部引線框架,藉此在與 小片裝配接合之銲接工程的同時,也可對如閘電極般的小 電極進行內部引線的銲接,工程被簡略化,不需要使用高 價的金線之連線銲接工程,設備亦被簡略化。 又,若將本發明應用於以兩片以上進行模組之多晶片 封裝的話,即可減少因印刷配線基板的寄生電感與導線電 本紙張尺度適用中國國家標準(CNS ) Α4規格(210Χ297公釐) — 到 (請先閲讀背面之注意事項再填寫本頁) 裝. 、π -15- 558816 A7 B7 五、發明説明(13 ) 阻,還可提高元件性能,減少印刷基板的實面積。 〔圖面之簡單說明〕 第1圖係說明有關本發明之第1實施形態之半導體_ 置之內部連接方法的平面圖以及沿A — A線之斷面圖。 第2圖係爲本發明之內部引線框架之平面圖。 第3圖係有關本發明之第2實施形態之半導體裝s g 平面圖。 第4圖係有關本發明之第3實施形態之半導體裝置之 內部引線框架之平面圖以及沿B - B線之斷面圖。 第5圖係有關本發明之第4實施形態之半導體裝置之 內部引線框架之平面圖。 第6圖係有關本發明之第5實施形態之半導體裝置之 內部引線框架之平面圖。 第7圖係說有關本發明之第6實施形態之半導體裝置 之內部連接方法之平面圖以及沿C - C線之斷面圖。 第8圖係沿第7圖之D — D線之斷面圖。 第9圖係適於第6實施形態之同步整流電路之電路圖 〇 〔符號之說明〕 1,1 a…晶片銲墊 3…外部引線 5…內部引線連接用銲墊 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閲讀背面之注意事項再填寫本頁) .裝- 訂 經濟部智慧財產局員工消费合作社印¾ -16- 經濟部智慧財產局員工消资合作社印¾. 558816 A7 B7 五、發明説明(14 ) 7…(外部引線框架用)聯結桿 9…半導體晶片 1 1…源電極(主電極) 1 3…閘電極(副電極) 1 5…源電極引線 1 5 a、1 5 b…源電極引線連接部 1 7…閘電極引線 1 7 a、1 7 b…閘電極引線連接部 19、19a、19b、19bi、19c、19c!.··聯 結桿(內部引線框架用) 2 1 a、2 1 b、2 1 c、2 1 d…銲劑(連接件) 2 3…內部引線框架用框架 2 5…懸掛軸 2 6…晶片銲墊切口(後退部) 2 7…聯結桿薄壁處 2 9…連結引線部 3 1…缺口部 3 3…突起引線部 3 5…段差 Q1 ,Q2…功率MOSFET S B D…肖特基能障二極體 L…感應體 C…電容器 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閱讀背面之注意事項再填寫本頁)
•17-

Claims (1)

  1. A8 B8 C8 D8 558816 六、申請專利範圍 ,前述聯結桿是比前述內部引線框架的其他部分之厚度還 薄。 (請先閱讀背面之注意事項再填寫本頁) 4 .如申請專利範圍第2項所述之半導體裝置,其中 ,前述聯結桿是被設在前述外部引線框架所鄰接的外部引 線之中央附近。 5 .如申請專利範圍第2項所述之半導體裝置,其中 ,前述晶片銲墊係在鄰接前述聯結桿的部分,具有以離開 此聯結桿一段距離的狀態呈後退之缺口部分。 6 .如申請專利範圍第2項所述之半導體裝置,其中 ,內部引線框架是形成聯結桿部分高於半導體晶片的上面 〇 7.—種半導體裝置,其特徵爲具備有: 被搭載在外部引線框架所鄰接的第1及第2晶片銲墊 上,分別具有主電極與面積小於此主電極之副電極的第1 及第2半導體晶片、和 經濟部智慧財產局員工消費合作社印製 具有被連接在前述第1及第2半導體晶片之各個主電 極及副電極與前述外部引線框架所對應的外部引線之間.的 內部引線,且具有各別在內部引線之間被切斷的聯結桿之 內部引線框架、和 對前述第1及第2晶片銲墊之·相對邊而零,被垂直形 成在前述第1晶片銲墊之突起引線部、和 與被連接於搭載在前述第2晶片銲墊的第2半導體晶 片的主電極的內部引線形成一體,具有與前述突起引線部 嵌合的缺口部,且與前述突起引線部導電連結之連結引線 本紙張尺度適用中國國家橾準(CNS ) A4規格(210 X 297公嫠) -2 - A8 B8 C8 D8 558816 六、申請專利範圍 部。 8 ·如申請專利範圍第7項所述之半導體裝置,其ψ ’前述在突起引線部的上端具有從上端面後退而支撐前述 連結引線部之平坦部分。 9 ·如申請專利範圍第7項所述之半導體裝置,其中 ’前述第1及第2半導體裝置係爲M〇S F Ε Τ之晶片, 前述第1半導體裝置係爲內裝一並聯在M〇S F ΕΤ的肯 特基勢壘二極體之晶片。 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) Α4規格(210 X 297公釐) -3-
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