CN101752358B - 带有整合旁路电容器的紧密半导体封装及其方法 - Google Patents
带有整合旁路电容器的紧密半导体封装及其方法 Download PDFInfo
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- CN101752358B CN101752358B CN2009102538709A CN200910253870A CN101752358B CN 101752358 B CN101752358 B CN 101752358B CN 2009102538709 A CN2009102538709 A CN 2009102538709A CN 200910253870 A CN200910253870 A CN 200910253870A CN 101752358 B CN101752358 B CN 101752358B
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Abstract
Description
Claims (25)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/330,381 US8062932B2 (en) | 2008-12-01 | 2008-12-08 | Compact semiconductor package with integrated bypass capacitor and method |
US12/330,381 | 2008-12-08 |
Publications (2)
Publication Number | Publication Date |
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CN101752358A CN101752358A (zh) | 2010-06-23 |
CN101752358B true CN101752358B (zh) | 2012-07-04 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN2009102538709A Active CN101752358B (zh) | 2008-12-08 | 2009-12-04 | 带有整合旁路电容器的紧密半导体封装及其方法 |
Country Status (2)
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CN (1) | CN101752358B (zh) |
TW (1) | TWI382520B (zh) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8269330B1 (en) * | 2011-04-22 | 2012-09-18 | Cyntec Co., Ltd. | MOSFET pair with stack capacitor and manufacturing method thereof |
US9119313B2 (en) * | 2013-04-25 | 2015-08-25 | Intel Corporation | Package substrate with high density interconnect design to capture conductive features on embedded die |
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