CN101752329B - 带有堆积式互联承载板顶端散热的半导体封装及其方法 - Google Patents

带有堆积式互联承载板顶端散热的半导体封装及其方法 Download PDF

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CN101752329B
CN101752329B CN2009102466289A CN200910246628A CN101752329B CN 101752329 B CN101752329 B CN 101752329B CN 2009102466289 A CN2009102466289 A CN 2009102466289A CN 200910246628 A CN200910246628 A CN 200910246628A CN 101752329 B CN101752329 B CN 101752329B
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loading plate
semiconductor
heat
interconnected loading
encapsulation
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CN101752329A (zh
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刘凯
弗朗索瓦·赫伯特
石磊
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Alpha and Omega Semiconductor Cayman Ltd
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Alpha and Omega Semiconductor Ltd
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Abstract

介绍了一种带有堆积式互联承载板顶端散热的半导体封装方法。此半导体封装包括一个带有终端引线的电路基片、一个在电路基片上的半导体晶粒、一个用于连接和互联半导体晶粒的顶端接触区同电路基片的低热阻的紧密互联承载板、一个用于顶端散热的在紧密互联承载板上的低热阻的堆积式互联承载板、以及一个成型封装剂用于封装除堆积式互联承载板的顶面裸露区之外的半导体封装，以保持有效的顶端散热。堆积式互联承载板的顶部包括一个在紧密互联承载板上的外围突出物。此外围突出物使得散热用的裸露顶面最大化，并且不依赖于其他区域的局限，适用于紧密互联承载板。堆积式互联承载板可被部分刻蚀或三维定型，以生成外围突出物。

Description

带有堆积式互联承载板顶端散热的半导体封装及其方法
技术领域
本发明主要涉及电器系统封装，更确切地说，本发明用于半导体晶粒的物理级封装。
背景技术
凭借高集成密度、极低的静态电流以及不断提高的功率容量等优势，功率金属氧化物半导体场效应管(MOSFET)广泛应用于开关式电源和变频器等电力电子领域。随着散热能力不断提高，用户市场也不断驱使功率金属氧化物半导体场效应管的封装尺寸不断减小。
因此，许多高功率密度应用中，需要带有双面(顶部和底部)散热的功率半导体设备封装，以便将设备运行温度降至最低，最大限度地提高设备和系统的效率和可靠性。底部散热问题的解决，是通过将半导体晶粒安装在金属引线框架或热传导基底上，或通过迭片电路基底的吸热过孔。以下主要介绍一些用于解决顶端散热问题的原有技术。
本申请与以下相同受让人的专利申请案相关：
美国申请，申请号为11/799,467，名称为“具有压窝板互联的半导体封装”，发明人为孙明等，公开号为US20070290336；以下简称为美国申请11/799,467。
美国专利申请公开号为20080087992，名称为“具有桥接板互联的半导体封装”，发明人为石磊等；以下简称为美国20080087992。
相同受让人的美国专利申请，申请号为12/130,663，名称为“用于半导体设备封装的导电夹片”，发明人为石磊等；以下简称为美国申请12/130,663。
相同受让人美国专利申请，申请号为12/237953，名称为“带有窗式阵列的顶端曝光夹片”，发明人为石磊等；以下简称为美国申请12/237953。
并附上以作参考。
在一种叫做“直接场效应管”的方法(美国专利6,624,522；美国专利7,285,866；美国专利申请公布2007/0284722)中，要求半导体晶粒要倒置在金属罐内，以致于晶片的背面，也就是分离式功率金属氧化物半导体场效应管的漏极，与金属罐的“盖子”电接触。金属罐与晶片背面相连，起漏极的作用，“盖子”和“顶端”用于顶端散热。另一方面，晶片真实顶端上的源极和栅极正面向下，连接在一个电路板上，起底部散热表面的作用。因此，通过“直接场效应管”方法，例如SO-8封装焊盘，无论其外部几何接线，还是封装焊盘，都不符合行业标准封装引脚。
在名为“含有漏极夹片的半导体晶粒封装”的美国专利6,777,800中提到，带有较大表面的漏极夹片电耦合到半导体晶粒的漏极区域上。用绝缘的成型材料封装晶片，并通过这种材料使漏极晶片的较大表面曝光，便于顶端散热。然而这种封装方法要求倒装晶片，使晶片的封装过程变得复杂。
下面简单介绍一下原有的技术，即使用顶端贴有裸露底板的薄皮，以便顶端散热的同时，也能获得符合行业标准封装引脚的封装焊盘。
美国申请11/799,467介绍了一种具有压窝板互联的半导体封装。本文的图1A和图1B分别再现了美国申请11/799,467专利中的图17和图18，并简要介绍。因此，参照图1A和图1B，源板1700包括多个在上面形成的凹坑1710。这些凹坑1710凹向源板1700的顶面1715，并含有一个通孔1720，在通孔1720的底面1730的平面上方有一个缺口1725。类似地，栅平面1750也有一个凹坑1760，凹向它的顶面1755，并含有一个通孔1770。这种封装方式虽然接近行业标准封装引脚，但却无法实现顶端散热。
Kasem等人发明的名为“与引线直接相连的集成电路晶片封装”的美国专利6,249,041，以下简称为：US 6,249,041，介绍了一种改良的半导体设备。这种改良的半导体设备包括一个在顶面或底面拥有接触区的半导体晶片。本文的图2再现了US 6,249,041的图3B，并做简要介绍。功率金属氧化物半导体场效应管封装41结构参见横截面视图。功率金属氧化物半导体场效应管封装41拥有一个由公共接触区驱动的功率金属氧化物半导体场效应管晶片42。晶片42顶面上的源极接触区和栅极接触区，分别覆盖一层由导电金属组成的金属层。同样地，晶片42底面的漏极接触区也覆盖一层金属层。源极引线装置的接触区48a同晶片42的源极接触区相接触，并且通过一个导电的粘合层49使之保持这种接触。三个源极的引线48b从接触区48a中延伸出来，为印制电路板提供电接触。同源极引线装置一样，栅极引线装置也有一个接触区同晶片42的栅极接触区相接触。漏极引线装置也同样有一个接触区52a，同晶片42底面的漏极接触区相接触。四个漏极引线52b从接触区52a中延伸出来，为印制电路板提供电接触。漏极引线装置的接触区52a同晶片42的漏极接触区相接触，并且通过一个导电的粘合层53使之保持这种接触。用塑料封装材料54封装晶片42、引线装置的接触区48a和52a，以及引线装置的部分引线48b和52b。尽管，封装材料54能使晶片42与外部介质绝缘、绝热，并为功率金属氧化物半导体场效应管封装41提供支撑结构和结构刚性。但这种封装方式也无法实现顶端散热。
Kalfus等人发明的名为“功率器件的自动定心电极”的美国专利4,935,803，以下简称为：US 4,935,803，介绍了一种功率器件引线成形的改进方法，这种方法是通过使用一个引线框，将晶粒镶嵌在引线框上，以及一个分立的连接晶片，连接在引线框和半导体晶片上的焊接区之间。本文的图3再现了US 4,935,803中的图4。在横截面视图中，晶粒16的接触区22被凸起的电介质18所包围，通过连接设备20将晶粒16镶嵌在晶粒标志13上。连接设备20可以是导电的，也可以是绝缘的，但当晶粒的支架12和13也被用作耦合到晶粒16上的设备电引线之一时，通常使用导电焊接。引线30朝向晶粒16的方向延伸，以作为晶粒16的外部连接。校直设备32和52位于引线30的底部附近，最靠近晶粒16的地方。在本示例中，校直设备32在引线30中呈凹形，然而也可使用凸形等其他形状。图3中，校直设备32的形状基本上是半圆柱形沟槽，或其他圆的二维形状，其长度方向垂直于引线30到晶粒16的方向。然而，如图所示，校直设备32和42却向下凸起，也可向上凸起，也就是肿块或凸起，而不是凹陷。连接装置(晶片)40从引线30延伸到晶粒16上的接触区22。然后分别通过焊接材料36和38，将连接装置40连接到引线30和晶粒接触区22上。在其第一末端，连接晶片(装置)40的连接装置42与引线30的校直装置32相接触，在其第二末端，连接装置46的底部48与晶粒接触区(焊接区)22相耦合。校直装置42的形状之所以如此，是为了能够啮合校直装置32。校直装置32和42的沟槽状凹坑，使得沿引线30到晶粒16上的晶粒接触区22的方向上，连接装置40能够横向移动，但在朝向晶粒接触区22方向上，移动受限，在引线30和焊接区22水平上(方位角的)旋转受限。尽管如此，连接装置40在垂直面上的装置中仍然能够旋转。这样才能实现当晶粒16的厚度发生很大变化时，无需改变引线框或连接装置，大大简化生产过程。图3所示的结构专用于此目的，因为校直装置32和42的嵌套曲面形成了一个旋转铰链，这一旋转铰链使得连接装置40关于引线30的垂直旋转，无需改变校直装置32和42的间距。就此方面而言，还需要连接装置40的底部，接触焊接区22的地方也是弯曲的，正如US4,935,803的连接装置46所示，也无法实现顶端散热。
石磊等人发明的名为“具有桥接板互联的半导体封装”的美国专利申请20080087992，以下简称为：US 20080087992，介绍了一种用于封装半导体晶粒的带有桥接源极盘互联的半导体封装。本文的图4A和图4B分别再现了US 20080087992中的图7和图5。图4A展示了一种半导体封装700，包括一个带有晶粒焊接区107的引线框705、一个源极接触部分110以及一个栅极接触部分115。功率半导体晶粒120可以有一个金属化漏极区域(图中没有给出)，通过回焊，耦合到晶粒焊接区107上。一个桥接源极盘130包括一个冲压过的金属片形成的桥接部分131、在桥接部分131任一侧的低谷部分133、在低谷部分133和桥接部分131任一侧的平面部分135，以及从平面部分135之一垂下来的连接部分137。桥接源极盘130还含有在低谷部分133分别形成的一对凹坑710。这对凹坑710凹向低谷部分133的顶面720，其底面(图中没有给出)沿它的底平面上方延伸。栅极平面750将栅极引线117的栅极接触部分115电连接到功率半导体晶粒120上的栅极金属化接触区(图中没有给出)。一个栅极平面凹坑760被置于栅极平面750上，并冲压，以致于在回焊过程中，与半导体晶粒120的栅极金属化接触校直对齐。栅极平面凹坑760可以任选地包含一个通孔770。图4B展示了US 20080087992的一种最佳实施方案，即半导体封装500含有一个桥接源极平面桥接部分131的顶面510，并涂有封装剂520。这个裸露的顶面510用于消散功率半导体晶粒120产生的热量；另外，还提供一个吸附面，用于吸收额外的热量。桥接部分131下面的密封材料的循环，为封装500提供增加的机械强度。
在石磊等人申请的名为“用于半导体设备封装的导电夹片”一般转让的美国专利中，申请号为12/130,663，申请日为2008年5月30日，以下简称为美国申请12/130,663，介绍了一种带有导电晶片的半导体设备封装，带有分立的平行导电指套，这些导电指套通过导电桥相互连接在一起。本文的图4C和图4D分别再现了美国申请12/130,663的图2A和图2D。图4C展示了一种半导体设备封装200，并用栅极晶片208代替栅极接合线。这种封装200包括一个装有保险丝的引线框102、一个具有顶面的金属氧化物半导体设备114、位于引线框102顶端的顶部栅极和底部漏极，以及晶片112，此晶片带有通过导电桥106相互连接在一起的分立的平行导电指套，并且仅在导电桥106处与金属氧化物半导体设备114的顶面电接触。指套104可能在晶片112的平面上弯出来，以便垂直接触带有保险丝的源极引线118。在本实施例中，通过栅极晶片208，顶部栅极与引线框102的山脊引线110电接触。栅极晶片208的顶面与晶片112的顶面在本例中是共面的。图4D为覆盖模塑料之后的半导体封装200的透视图。如图所示，晶片112的顶面和栅极晶片208的顶面都是裸露的。
在石磊等人申请的名为“带有窗式阵列的顶端曝光夹片”一般转让的美国专利中，申请号为12/237953，申请日为2008年9月24日，以下简称为美国申请12/237953，介绍了一种带有单级晶片的半导体设备封装。每个单级晶片都有一个带有窗式阵列的金属薄板。本文的图4E和图4F分别再现了美国申请12/237953的图1A和图1B。如图4E所示，半导体设备封装100含有一个带保险丝的引线框102和一个顶面和底面均有接触区的半导体设备104。通过示例可以看出，半导体设备104可以是一个垂直金属氧化物半导体(MOS)设备，并具有一个顶端源极接触点S、一个顶端栅极接触点G以及一个底端漏极接触点D。本例中，半导体设备104位于引线框102的上面，其底端漏极接触点D朝向引线框102的主体部分，并与主体部分电接触。本例中，引线框102可以带保险丝，也可以不带。作为美国申请12/237953的一个典型实施例，半导体设备封装100含有单级晶片106，单级晶片106包括两个分离的金属薄板，它们分别是具有窗式阵列111的金属薄板108和具有窗式阵列113的金属薄板110。本文所述的金属是一种导热、导电的材料，而且具有良好的延展性。在金属薄板108上，导电指套阵列中的每一个指套都包括一个第一末端和一个第二末端，其目的是与半导体设备104的源极接触区S，在导电指套的第二末端电接触。每个导电指套的第一末端都在每个相应的窗式阵列111处，与金属薄板108电接触。这种结构能够为分立的各支路提供多级并联电路。可以通过分立的金属薄板110形成一个或多个额外的导电指套，以便在半导体设备104的栅极接触区G和引线框102的栅极引线107之间，提供电接触。每个导电指套都包括一个第一末端，在窗口113处，与金属薄板110电接触，以及一个与半导体设备104的栅极接触区G电接触的第二末端。例如通过使用焊锡或导电粘合剂，可以在导电指套和接触区S、G之间建立电接触和机械接触。正如图4F所示，半导体设备封装100可以通过模塑料118封装，并使金属薄板108和110的顶面裸露。尽管裸露区域要足够大，以便有效散热，但与半导体设备104的接触区必须很小。
上述使用带有底板曝光的顶面接合的原有技术确实具有以下多个优势：
适用于行业标准封装引脚
无需接合线，节省生产成本
减少寄生电感和阻抗
降低封装热阻抗
由于通过塑料封装复合物，顶面金属裸露的区域有限，所以当散热片直接接触封装的顶面时，上述优势获得的顶面散热效果也很有限。每一个优势都是在最大化散热的顶端金属裸露区，和最大化连接引线与顶面晶粒电极的金属，之间做出取舍。更确切地说，当顶面晶粒电极数量和/或低洼区(凹陷、锚定孔、低谷部分、指套之间的导电桥和窗口)顶面薄板的数量增多时，每个顶面薄板的顶面裸露的散热可用面积相应地减少，这使得顶面散热的效力进一步减小。因此，在优化与半导体晶粒的连接以及保持符合行业标准封装引脚的半导体设备封装方式的同时，迫切需要进一步提高顶面散热的效力。
发明内容
提出了一种带有堆积式互联承载板顶端散热的半导体封装。此半导体封装包括：
一个带有数个终端引线的电路基片，用于外部电路连接。
至少有一个半导体晶粒的底面连接在电路基片上面。
第一号高度匹配的低热量和低电阻的紧密互联承载板，用于连接和互联半导体晶粒的顶端接触区同电路基片。紧密互联承载板是三维成型的，以适应顶端接触区和电路基片之间的高度差。每一个第二号低热阻堆积式互联承载板，都堆积连接在所选的紧密互联承载板上，以增加半导体封装的有效顶端散热。
一个成型封装剂，除了至少一个堆积式互联承载板上的至少一个顶面裸露之外，半导体的其他大部分都通过成型封装剂封装，保持有效顶端散热。
一种改良方式是部分刻蚀至少一个堆积式互联承载板顶面的外围突出物。这部分被刻蚀的外围突出物可以增强成型封装剂闭锁到半导体封装的顶端。
另一种改良方式是至少一个堆积式互联承载板的顶端含有一个外围突出物，悬挂于它所相应连接的紧密互联承载板上方。外围突出物允许用于散热的顶面裸露面积最大化，并且不受其他区域的约束，适用于所选的紧密互联承载板。至少一个堆积式互联承载板的外围突出物的底部被部分刻蚀，或者至少一个堆积式互联承载板是三维成型的，以产生外围突出物。
另一种改良方式是对每一个所选的紧密互联承载板都定尺寸、成型，这与它所对应的堆积式互联承载板的裸露顶面的数量无关，以便使它所对应的半导体晶粒上的连接区域最大化，因此降低它们相关联的扩散电阻。
另一种改良方式是至少一个高度匹配的紧密互联承载板含有数个闭锁扣环，在数个终端引线附近相互啮合，以便使半导体封装的过程中的半导体晶粒的旋转漏电最小。同样地，至少一个堆积式互联承载板含有数个闭锁扣环，在数个终端引线附近相互啮合，以便也使半导体封装的过程中的半导体晶粒的旋转漏电最小。
额外的改良方式，至少一个紧密互联承载板包括：
数个凹陷与半导体晶粒的顶端金属化接触区相接触。
数个锚定孔，能够在与半导体晶粒的顶端金属化接触区想接触的同时，便于糊状焊锡的填充。
在一个具体实施例中，电路基片可以由一个引线框组成，也可以由一个带有数个导热过孔以便底部散热的迭片电路组成。
提出了一种带有堆积式互联承载板顶端散热的半导体封装可选方式。这种可选的半导体封装包括：
一个具有许数终端引线的电路基片，用于外部电接触。
一个半导体晶粒，其底面连接在电路基片上。
第一号高度匹配的低热量和低电阻的紧密互联承载板，用于在紧密互联承载板三维成型，以适应顶端接触区和电路基片之间的高度差时，连接半导体晶粒的顶端接触区，并形成用于外部电接触的数个终端引线。
每一个第二号低热阻堆积式互联承载板，都堆积连接在所选的紧密互联承载板上，以增加半导体封装的有效顶端散热。
提出了一种与数个高度匹配的紧密互联承载板和高度匹配的堆积式互联承载板互联的半导体晶粒的顶端散热半导体封装方法。这种方法包括：
a)提供电路基片，并带有数个用于外部电接触的终端引线。
b)提供半导体晶粒，并将其连接在电路基片上。
c)在半导体晶粒的顶端接触区和电路基片上，提供并附上数个紧密互联承载板，以便在顶端接触区和终端引线之间形成电接触。
d)在所选的紧密互联承载板上，提供并附上数个堆积式互联承载板。
e)在封装过程中，使封装剂成型。
f)除去堆积式互联承载板顶面的成型封装剂，以便维持有效的顶端散热。
一种变化方案，上述步骤e)和f)可以用以下步骤代替：
e)可拆卸的掩膜覆盖在堆积式互联承载板的每一个顶面上，以致最终完全曝光。
f)在封装过程中，使封装剂成型。
g)从封装过程中，除去可拆卸的掩膜，以使堆积式互联承载板的顶面裸露，维持有效的顶端散热。
就一般而言，上述步骤e)、f)和g)可以用以下步骤代替：
e)在封装过程中，形成成型封装剂，以致于堆积式互联承载板的顶面裸露，维持有效的顶端散热。
一种生产改良方式，上述步骤d)还包括：
d1)在所选的紧密互联承载板上涂覆粘合剂，以便将其与堆积式互联承载板相连。
d2)在封装过程，处理并激活粘合剂，以便在堆积式互联承载板和所选的紧密互联承载板之间建立稳固连接。
本文的备忘中，将为本领域的技术人员，进一步介绍本发明的这些方面，以及多个实施例。
附图说明
为了更加详细地介绍本发明的各种实施例，特提交附图以作参考。但是附图仅用作说明，不能以此限定本发明的范围。
图1A和图1B为节录自美国申请11/799,467原有技术的附图；
图2为节录自美国6,249,041原有技术的附图；
图3为节录自美国4,935,803原有技术的附图；
图4A和图4B为节录自美国20080087992原有技术的附图；
图4C和图4D为节录自美国申请12/130,663原有技术的附图；
图4E和图4F为节录自美国12/237953原有技术的附图；
图5A和图5B为本发明带有紧密互联承载板和带有一个半刻蚀外围突出物的堆积式互联承载板的半导体封装的实施例附图；
图6为本发明中堆积式互联承载板成型以产生外围突出物的实施例附图；
图7为本发明中将紧密互联承载板的外围突出物终端转化为终端引线的外围突出物的实施例附图；
图8A和图8C为本发明一个实施例，其中紧密互联承载板具有凹陷和一个锚定孔，堆积式互联承载板具有一个外围突出物和闭锁的扣环；
图9A和图9B为本发明一个实施例，其中堆积式互联承载板含有闭锁的扣环和堆积式互联承载板顶面的外围突出物部分刻蚀，以增强成型封装剂闭锁到半导体封装的顶端。
具体实施方式
本说明和所含附图仅为本发明的一个或多个目前的最佳实施方案，以及一些典型的可选组件和/或备选实施方案。本说明和附图旨在举例说明，并不能以此限定本发明的范围。因此，本领域的技术人员应能够轻松识别依本发明所作的变化、修改及替换。这些变化、修改及替换仍属本发明涵盖的范围。
图5A和图5B说明一种具有紧密互联承载板526和堆积式互联承载板528的顶端散热的半导体封装500。图5B为图5A沿A-A方向上的横断面示图。顶端散热的半导体封装500包括：
一个电路基片，也就是本例中用于外部电接触的，具有数个终端引线的引线框502；
一个半导体晶粒520，其底面520b连接在引线框502的晶粒焊接区504上；
一个高度匹配的低热阻紧密互联承载板526，用于连接和互联晶粒顶面520的顶端接触区与引线框502。紧密互联承载板526为三维成型的，以适应顶端接触区和引线框502直接的高度差，因此在顶端接触区和终端引线506之间形成电接触。如图所示，紧密互联承载板526也可以具有凹陷526a，以便减少相关的粘着应力，提高相关的粘合剂流量。
一个低热阻的堆积式互联承载板528，堆积连接在紧密互联承载板526上，以便增加半导体封装500的有效顶端散热。平顶堆积式互联承载板528堆积在紧密互联承载板526上，通过降低在它下面的紧密互联承载板对倾斜、旋转和扭曲的敏感度，有助于改善它的可制造性；否则会引起紧密互联承载板526和晶粒顶面520a的顶端接触区之间的连接可靠性问题。显而易见，堆积式互联承载板528也有一个底部部分刻蚀的外围突出物528b，位于紧密互联承载板526和作为栅极夹板的另一互联承载板524的上面。或者，栅极夹板可以用栅极接合线代替。由于有外围突出物528b，堆积式互联承载板528并不与另外的互联承载板524接触。这就使得用于散热的顶面528最大的裸露区域，并不受来自于紧密互联承载板526和以下其他互联承载板524的其他区域的限制。换言之，前面提到的引自原有技术在用于散热的顶面金属裸露量和顶端晶粒电极的金属接触量之间的取舍问题，可以大幅减少。更确切地说，当顶面晶粒电极数量和/或顶面承载板低洼区特征(凹陷、锚定孔、低谷部分、指套之间的导电桥和窗口)的数量增多时，每个顶面承载板的顶面裸露的散热可用面积相应地减少的程度，相对于所引的原有技术的减少程度要小得多。出于同样的原因，紧密互联承载板526的成型和尺寸，可不依赖于堆积式互联承载板528的顶面裸露区528a的面积，以使半导体晶粒520上相应的焊接区最大化，减少与之相关的扩散电阻。对于本领域的技术人员，当紧密互联承载板526和堆积式互联承载板528都是由金属等高电导率材料构成时，本发明顶端散热半导体封装500能够使晶粒到终端引线之间的电阻和晶粒对周围环境的热阻达到最小，同时还能增加顶端晶粒电极数量和承载板低洼区特征的数量。
一成型封装剂530将半导体的大部分都通过成型封装在内，除了堆积式互联承载板528上的一个顶面528a裸露之外以保持有效顶端散热。由于带有外围突出物528b的堆积式互联承载板528大幅提升了成型封装剂530的总接触粘合面积，这也使得成型封装剂的粘着力增大，避免脱落，以及封装的防潮性增强，抵抗环境湿度。
图6为本发明的一个典型实施例，顶端冷却的半导体封装600的堆积式互联承载板628是三维机械成型的(而不是部分刻蚀)，以产生外围突出物628b。在这种情况下，紧密互联承载板626(带有凹坑626a)以及堆积式互联承载板628相继连接在半导体晶粒620的晶粒顶面620a上。半导体晶粒620的底面620b位于引线框602的晶粒焊接区604上。堆积式互联承载板628的顶面628a和数个终端引线606都涂有成型封装剂630。与部分刻蚀的外围突出物528b相比，尽管外围突出物628b的机械成型较为简单，但这会导致顶面628a的散热面积减少。
图7为本发明的一个典型实施例，其中顶端散热半导体封装700的堆积式互联承载板728机械成型，作为一个变化设计，在紧密互联承载板726的外围底端形成了数个终端引线706a，用于外部电接触。此时，紧密互联承载板726(带有凹坑726a)以及堆积式互联承载板728相继连接在半导体晶粒720的晶粒顶面720a上。半导体晶粒720的底面720b位于引线框702的晶粒焊接区704上。堆积式互联承载板728的顶面728a和数个终端引线706都涂有成型封装剂730。同样地，尽管图中没有给出，堆积式互联承载板的外围底端也可形成用于外部电接触的终端引线。
图8A和图8C分别为本发明半导体封装900中的带有压窝926a和锚定孔926b的紧密互联承载板926与具有外围突出物928b和闭锁扣环928e和928f的堆积式互联承载板928。锚定孔926b的作用是方便紧密互联承载板926的焊锡膏填充，同时与半导体晶粒920的顶端金属化接触区相接触。可以有一个带有凹坑924a的额外的互联承载板924，如栅极晶片，连接半导体晶粒920上的另一个半导体区域与引线906h。锚定孔928的作用是当模塑料增加以及应力释放时，将紧密互联承载板926锚定在适当的位置。显然，闭锁扣环928e和928f的大小适合位于堆积式互联承载板928上，以致于，当堆积式互联承载板连接在紧密互联承载板926上时，它们同附近对应的终端引线906e、906f和906g相啮合，以便将顶端散热半导体封装900的封装过程中产生的半导体晶粒920和紧密互联承载板926的旋转蠕动降至最小。关于它们的结构，闭锁扣环928e和928f可以建立在堆积式互联承载板928上，通过机械冲压形成一个初始空白承载板。出于相同的目的，对于本领域的技术人员，闭锁扣环也可以建立在紧密互联承载板926上。正如图8B所示，堆积式互联承载板928也可以具有顶端凹陷928a，以将紧密互联承载板926闭锁在适当的位置。图8C为完整的带有成型封装剂930的顶端散热半导体封装900、带有顶端凹陷928a的堆积式互联承载板928的裸露顶面以及裸露终端引线906e、906f和906h。
图9A和图9B分别为本发明半导体封装1000，其中堆积式互联承载板1028包括闭锁扣环1028e、1028f，与引线框1002的终端引线1006e、1006f和1006g相啮合。额外的闭锁扣环可以建立在紧密互联承载板1026上，也与引线框1002的终端引线1006e、1006f和1006g相啮合，此处不再赘述。紧密互联承载板将半导体晶粒1020的顶端与终端引线1006e、1006f和1006g电接触。需注意的是，堆积式互联承载板1028的顶面外围被部分刻蚀，以产生数个部分刻蚀的突出物1028k，它们的作用是增强成型封装剂1030在半导体封装1000上的附着。额外的互联承载板1024可以连接在终端引线1006上。通过此示例，这个额外的互联承载板1024可以是一个将半导体晶粒上的栅极区域连接到栅极引线的栅极夹板。图9B为带有成型封装剂1030的完整的顶端散热半导体封装1000、用于散热的堆积式互联承载板1028的裸露顶面以及用于外部电接触的裸露终端引线1006(图9A)、1006e、1006f、1006g和1006h。
至此本领域的技术人员应该清楚，在本发明的范围内，电路基片可以是一个具有数个终端引线的迭片电路，用于外部电接触，而不是一定是引线框。但是，为了保证底部的有效散热，迭片电路应含有许多热通孔。为了将晶粒至终端引线之间的电阻和晶粒对周围环境的热阻降至最小，紧密互联承载板应用导热、导电材料制作。堆积式互联承载板也应用导热、导电材料制作。而且，顶端散热的半导体封装适宜工作于按正常方法(基质在下的)或倒装晶片法(基质在上的)将晶粒定位在电路基片上。另外，无论电路基片是用引线框做出的还是用迭片电路做出的，上述的本发明半导体封装的多个特点也全部体现在相应的封装引脚上，也就是符合行业标准的封装引脚，比如小块集成电路(SOIC)、双平面无引线封装(DFN)、四方扁平无引线封装(QFN)、微无引线封装(MLP)或晶体管外壳(TO)系列等。
关于附图中的图5A和图5B，一种顶端散热的半导体封装方法包括：
a)提供一个带有终端引线506的引线框502，用于外部连接。例如为了实现符合行业标准的封装引脚结构，应使用行业标准引脚引线框。粘合剂涂覆在引线框晶粒焊接区504和终端引线506上。粘合剂可以由焊锡膏、导电/导热的环氧树脂等制作，并且通过热或紫外线干燥的。
b)提供一个带有引线框502的半导体晶粒520。更确切地说，按照标准的晶片固定工序，半导体晶粒520通过焊锡附着在引线框502上。可软焊的顶端金属用在半导体晶粒520上。例如，一个金属氧化物半导体场效应管晶粒的源极和栅极焊接区中的裸露铝，应通过电解镍金进行无电沉积。
c)提供并连接紧密互联承载板526与半导体晶粒520和引线框502的顶端接触区，以便在顶端接触区和终端引线506之间形成电接触。更确切地说，紧密互联承载板526可以通过焊锡晶粒连接在半导体晶粒520上，然后在紧密互联承载板526上涂覆粘合剂。
d)在紧密互联承载板526上，提供并连接堆积式互联承载板528。更确切地说，堆积式互联承载板528可以通过焊锡连接在紧密互联承载板526上。也可选用，导电、导热的环氧树脂将堆积式互联承载板528连接在紧密互联承载板526上。然后通过激活不同的粘合剂处理封装过程，以形成堆积式互联承载板528和紧密互联承载板526之间的稳固连接。封装处理包括使用热量、紫外线等，使焊锡膏回流，以便固化环氧树脂。
e)在封装过程中，形成成型封装剂530，因此堆积式互联承载板528的顶面528a裸露出来，有助于顶端有效散热。
步骤e)可以通过以下步骤实现，以作示例：
e1)在封装过程中，铸型成型封装剂530。
e2)除去成型封装剂530的顶端部分，直到堆积式互联承载板528的顶面528a裸露出来为止，以保证顶端有效散热。更确切地说，可以通过机械碾磨来去除。
随后其他的封装修整步骤，比如通过电镀、封装标记和引线修齐等引线的精整加工本文不再详述。一种变化工艺，可以用以下步骤代替上述的e1)和e2)：
e1)将可拆卸的掩膜(图中没有绘出)置于堆积式互联承载板528的顶面528a上，用于最后的曝光。
e2)在封装过程中，铸型成型封装剂530。
e3)除去成型封装剂530的顶端部分，直到堆积式互联承载板528的顶面528a裸露出来为止，以保证顶端有效散热。
提出了一种带有紧密互联承载板和堆积式互联承载板的顶端散热半导体封装，能够将晶粒到终端的电阻和晶粒对周围环境的热阻降至最小，同时保持较多数量顶端晶粒电极和承载板低洼特征的功效。至此，对于本领域的技术人员应该清楚，本文所介绍的多个实施例可以通过轻松地改良，就可适用于其他特殊应用。上述说明包含多个特殊实施例，这些实施例仅用作说明本发明现有的多个较佳实施例，不能以此限定本发明的范围。譬如，本发明半导体封装系统适用于高端场效应管晶粒和低端场效应管晶粒等多种半导体晶粒的联合封装，用于电力变流器电路。又譬如，除了本文介绍的金属氧化物半导体场效应管晶粒封装之外，本发明还适用于其他不同种类的半导体晶粒的封装，比如绝缘栅双极晶体管(IGBT)以及由SiGe、SiC、GaAs和GaN组成的晶粒等。又譬如，按照与本发明相同的设计思路，本发明可扩展应用到多种紧密互联承载板和多种堆积式互联承载板上。还譬如，本发明可扩展应用到堆积式互联承载板的多层上。
通过说明和图示，我们给出了参考具体装置的多个典型示例。其实只要稍加试验，本领域的技术人员就能实现其他示例的应用，将本发明应用到多个其他结构中。因此，鉴于本专利文件，本发明的保护范围并不仅仅局限于之前提到地具体典型示例，而是在以下的权利要求中限定。基于权利要求的同等含义和范围内，所做出的任何以及所有的修改，都将被认为仍属本发明涵盖的范围。

Claims (26)

1.一种带有堆积式互联承载板的顶端散热半导体封装，包括：
一个带有数个终端引线的电路基片，用于外部电路连接；
至少有一个半导体晶粒的底面连接在电路基片上面；
第一数量个高度匹配的导热和导电的紧密互联承载板，用于将所述的至少一个半导体晶粒的一顶端接触区与所述的电路基片连接和互联在一起，同时三维成型，以适应所述的顶端接触区及与其电连接的所述终端引线之间的高度差；
第二数量个导热的堆积式互联承载板，其每一个堆积连接在所选的紧密互联承载板上，以增加半导体封装的有效顶端散热。
2.根据权利要求1所述的顶端散热半导体封装，还包括一个成型封装剂，其中至少一个堆积式互联承载板上的至少一个顶面裸露，半导体的大部分都通过成型封装剂封装，保持有效顶端散热。
3.根据权利要求2所述的顶端散热半导体封装，其中所述的至少一个半导体晶粒还包括一个高端场效应管晶粒和一个底端场效应管晶粒，用于电力变流器电路。
4.根据权利要求2所述的顶端散热半导体封装，其中所述的至少一个堆积式互联承载板的顶面外围被部分刻蚀，增强成型封装剂在半导体封装上的附着。
5.根据权利要求2所述的顶端散热半导体封装，其中所述的至少一个堆积式互联承载板还包括一个外围突出物，以使散热用的裸露顶面面积最大，不依赖于其他对于所选的紧密互联承载板的区域的约束。
6.根据权利要求5所述的顶端散热半导体封装，其中所述的至少一个堆积式互联承载板外围的底部被部分刻蚀，以生成外围突出物。
7.根据权利要求5所述的顶端散热半导体封装，其中所述的至少一个堆积式互联承载板是三维成型的，以生成外围突出物。
8.根据权利要求5所述的顶端散热半导体封装，其中每一个所选的紧密互联承载板的定型和尺寸设计，并不依赖于它所对应的堆积式互联承载板的顶面裸露量，使相应的在所述的半导体晶粒上的连接区域最大化，以减少其相关扩散电阻。
9.根据权利要求1所述的顶端散热半导体封装，其中至少一个高度匹配的紧密互联承载板还包括数个闭锁扣环，位于与对应的数个终端引线附近相啮合 的位置，以使所述的半导体晶粒在半导体封装过程中产生的旋转蠕动最小。
10.根据权利要求1所述的顶端散热半导体封装，其中至少一个堆积式互联承载板还包括数个闭锁扣环，位于与对应的数个终端引线附近相啮合的位置，以使所述的半导体晶粒在半导体封装过程中产生的旋转蠕动最小。
11.根据权利要求1所述的顶端散热半导体封装，其中至少一个所述的紧密互联承载板还包括位于其上的数个凹陷，用于接触所述的半导体晶粒的顶端金属化接触区。
12.根据权利要求11所述的顶端散热半导体封装，其中至少一个所述的紧密互联承载板还包括位于其上的数个锚定孔，接触所述的半导体晶粒的顶端金属化接触区时，方便焊锡膏涂覆。
13.根据权利要求1所述的顶端散热半导体封装，其中的电路基片为一个引线框。
14.根据权利要求1所述的顶端散热半导体封装，其中的电路基片为含有数个导热通孔的迭片电路，增加底部散热。
15.根据权利要求1所述的顶端散热半导体封装，其中所述的半导体封装符合行业标准封装引脚。
16.根据权利要求15所述的顶端散热半导体封装，其中所述的行业标准封装引脚为小块集成电路(SOIC)、双平面无引线封装(DFN)、四方扁平无引线封装(QFN)、微无引线封装(MLP)或晶体管外壳(TO)系列等。
17.根据权利要求1所述的顶端散热半导体封装，其中半导体晶粒为功率半导体晶粒。
18.一种带有堆积式互联承载板的顶端散热半导体封装包括：
一个具有数个第一种终端引线的电路基片，用于外部电接触；
至少有一个半导体晶粒的底面连接在电路基片上面；
第一数量个高度匹配的导热和导电的紧密互联承载板，用于连接所述的至少一个半导体晶粒的顶端接触区，并形成数个第二种终端引线，用于外部电接触，在三维成型时，适应顶端接触区和电路基片之间的高度差；
第二数量个导热的堆积式互联承载板，其每一个都堆积连接在所选的紧密互联承载板上，以增加半导体封装的有效顶端散热。
19.根据权利要求18所述的顶端散热半导体封装，还包括一个成型封装剂，其中至少一个堆积式互联承载板上的至少一个顶面裸露，半导体的大部分都通过成型封装剂封装，保持有效顶端散热。 
20.根据权利要求19所述的顶端散热半导体封装，其中所述的至少一个半导体晶粒还包括一个高端场效应管晶粒和一个底端场效应管晶粒，用于电力变流器电路。
21.一种与数个高度匹配的紧密互联承载板和高度匹配的堆积式互联承载板相互连接的半导体晶粒的顶端散热半导体封装方法，包括：
a)提供电路基片，并带有数个用于外部电接触的终端引线。
b)提供半导体晶粒，并将其连接在电路基片上。
c)在所述的半导体晶粒的顶端接触区和所述的电路基片上，提供并附上数个紧密互联承载板，以便在所述的顶端接触区和所述的终端引线之间形成电接触。
d)在所选的紧密互联承载板上，提供并附上数个堆积式互联承载板。
22.权利要求21中所述的方法还包括：
e)在封装过程中，使封装剂成型，堆积式互联承载板的顶面裸露出来，保持有效的顶部散热。
23.权利要求22所述的方法中，步骤e)还包括：
e1)在封装过程中，使封装剂成型。
e2)除去成型封装剂的顶端部分，直到堆积式互联承载板的顶面裸露出来为止，以保持有效的顶部散热。
24.权利要求22所述的方法中，步骤e)还包括：
e1)可拆卸的掩膜覆盖在堆积式互联承载板的每一个顶面上，以致最终完全曝光；
e2)在封装过程中，使封装剂成型；
e3)从封装过程中，除去可拆卸的掩膜，以使堆积式互联承载板的顶面裸露，保持有效的顶端散热。
25.权利要求21所述的方法中，其中所述的电路基片为一个引线框，此电路基片还包括在引线框晶粒焊接区和引线框的引线上涂覆粘合剂。
26.权利要求21所述的方法中，其中提供和连接的堆积式互联承载板还包括：
d1)在所选的紧密互联承载板上涂覆粘合剂，以便将其与堆积式互联承载板相连；
d2)在封装过程，处理并激活粘合剂，以便在堆积式互联承载板和所选的紧密互联承载板之间建立稳固连接。 
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