TWI764256B - 智慧功率模組封裝結構 - Google Patents

智慧功率模組封裝結構

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TWI764256B
TWI764256B TW109129435A TW109129435A TWI764256B TW I764256 B TWI764256 B TW I764256B TW 109129435 A TW109129435 A TW 109129435A TW 109129435 A TW109129435 A TW 109129435A TW I764256 B TWI764256 B TW I764256B
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lead frame
control chip
power module
package structure
smart power
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TW109129435A
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TW202209583A (zh
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蔡欣昌
劉敬文
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朋程科技股份有限公司
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Priority to TW109129435A priority Critical patent/TWI764256B/zh
Priority to US17/082,030 priority patent/US11810835B2/en
Priority to JP2021014918A priority patent/JP7170761B2/ja
Publication of TW202209583A publication Critical patent/TW202209583A/zh
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Publication of TWI764256B publication Critical patent/TWI764256B/zh

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Abstract

一種智慧功率模組封裝結構，包括絕緣散熱基板、多個功率元件、控制晶片、導線架以及密封體。絕緣散熱基板具有第一表面與相對於第一表面的第二表面。功率元件配置於第一表面上。控制晶片配置於第一表面上。控制晶片具有驅動多個功率元件的閘極驅動功能以及脈衝寬度調變功能。導線架接合於第一表面上。功率元件與控制晶片與導線架電性連接。密封體至少包覆功率元件、控制晶片與部份導線架，且部份第二表面暴露於密封體外。

Description

智慧功率模組封裝結構
本發明是有關於一種封裝結構，且特別是有關於一種應用於驅動系統的智慧功率模組封裝結構。
在目前的驅動系統中，常需要將多個不同功能的封裝體(如功率元件封裝體、驅動元件封裝體)、模組和控制器元件等分散式地配置於印刷電路板(Printed Circuit Board, PCB)上，系統才能有效地驅動運作。
然而，如此一來，各種不同功能的封裝體、模組和電路元件之間的距離會變得很遠，進而會提升驅動電路的寄生阻抗，降低驅動系統效率，且前述分散式配置的方式也會造成面積占比過大的問題並降低組裝良率。因此，如何有效地降低驅動電路的寄生阻抗，提升驅動系統效率，並解決面積占比過大的問題提升組裝良率已成為挑戰。
本發明提供一種智慧功率模組封裝結構，其可以有效地降低驅動電路的寄生阻抗，提升驅動系統效率，且解決面積占比過大的問題並提升組裝良率。
本發明的一種智慧功率模組封裝結構，包括絕緣散熱基板、多個功率元件、控制晶片、導線架以及密封體。絕緣散熱基板具有第一表面與相對於第一表面的第二表面。功率元件配置於第一表面上。控制晶片配置於第一表面上。控制晶片具有驅動多個功率元件的閘極驅動功能以及脈衝寬度調變功能。導線架接合於第一表面上。功率元件與控制晶片與導線架電性連接。密封體至少包覆功率元件、控制晶片與部份導線架，且全部或部份的第二表面暴露於密封體外。
基於上述，本發明的智慧功率模組封裝結構藉由密封體包覆多個功率元件與控制晶片(包括閘極驅動器與脈波寬度調變控制器)可以將不同功能的元件整合在一個封裝結構中，縮短各元件之間的距離，因此可以有效地降低驅動電路的寄生阻抗，提升驅動系統效率，且解決面積占比過大的問題並提升組裝良率。此外，多個功率元件與控制晶片(具有驅動多個功率元件的閘極驅動功能以及脈衝寬度調變功能)配置於絕緣散熱基板的第一表面上，另一方面，絕緣散熱基板的第二表面全部或部分暴露於密封體外，因此可以提升智慧功率模組封裝結構的散熱效率，而可以達到較佳的性能。
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。
以下將參考圖式來全面地描述本發明的例示性實施例，但本發明還可按照多種不同形式來實施，且不應解釋為限於本文所述的實施例。在圖式中，為了清楚起見，各區域、部位及層的大小與厚度可不按實際比例繪製。為了方便理解，下述說明中相同的元件將以相同之符號標示來說明。
圖1A是依照本發明的一實施例的一種智慧功率模組封裝結構的立體示意圖。圖1B是依照本發明的一實施例的一種智慧功率模組封裝結構的剖面示意圖。
請同時參照圖1A與圖1B，在本實施例中，智慧功率模組封裝結構100包括絕緣散熱基板110、多個功率元件120(圖1A示意的繪示出六個功率元件120)、控制晶片130、導線架140以及密封體150。在一些實施例中，絕緣散熱基板110例如包括直接覆銅陶瓷基板(Direct Bond Copper, DBC)或、絕緣金屬基板(Insulated Metal Substrate, IMS)或印刷電路基板(Printed Circuit Board, PCB)。然而，本發明不限於此，絕緣散熱基板110也可以是其他適宜具有較佳散熱性的絕緣基板，只要後續配置於其上的元件可以有效地將熱經由絕緣散熱基板110傳導出去即可。
在本實施例中，絕緣散熱基板110具有第一表面110a與相對於第一表面110a的第二表面110b，多個功率元件120配置於第一表面110a上。舉例而言，第一表面110a例如是上表面，而第二表面110b例如是下表面。在一些實施例中，功率元件120可以為金屬氧化物半導體場效電晶體(metal-oxide-semiconductor field-effect transistor, MOSFET) 、快速恢復二極體(Fast Recovery Diode, FRD)、絕緣閘極雙極電晶體(Insulated Gate Bipolar Transistor, IGBT)、碳化矽寬能隙半導體電晶體(Silicon Carbide, SiC)、氮化鎵寬能隙半導體電晶體或其組合(Gallium Nitride, GaN)，但本發明不限於此。應說明的是，本發明不限制功率元件120的種類及數量，功率元件120的種類及數量皆可視實際設計上的需求而定。
在一些實施例中，為了提升散熱效率，功率元件120可以是以覆晶(Flip chip)方式配置於第一表面110a上，以縮短功率元件120與功率元件120之間的熱傳導路徑。進一步而言，由於功率元件120以覆晶(即主動面朝下)方式配置於第一表面110a上，功率元件120的主動面會較接近絕緣散熱基板110，因此功率元件120的主動面與絕緣散熱基板110之間具有較短的距離，使功率元件120運作時所產生的熱可以有效地經由絕緣散熱基板110傳導出去。
此外，功率元件120藉由覆晶(即主動面朝下)方式配置於第一表面110a上也可降低熱阻。舉例而言，在一些實施例中，功率元件120主動面朝上配置於絕緣散熱基板110上的熱阻(Thermal resistance)為0.155(℃/W)，而功率元件120主動面朝下配置於絕緣散熱基板110上的熱阻為0.137(℃/W)，因此功率元件120藉由覆晶(即主動面朝下)的配置方式可以有效地降低約15%的熱阻，但本發明不限於此。
在本實施例中，控制晶片130配置於第一表面110a上，以使智慧功率模組封裝結構100中可以搭載不同功能的元件。進一步而言，控制晶片130包括閘極驅動器(gate driver)與脈波寬度調變控制器(Pulse Width Modulation, PWM)，因此控制晶片130可以具有驅動功率元件120的閘極驅動功能以及脈衝寬度調變功能，以使驅動系統可以順利地運作。舉例而言，驅動系統例如是馬達驅動系統，則控制晶片130將包含馬達控制器、閘極驅動器以及脈波寬度調變控制器。然而，本發明不限於此，因應不同驅動系統可以搭配不同功能性的功率元件120與控制晶片130，因此本實施例的智慧功率模組封裝結構100具有較大的使用彈性。此外，在一些實施例中，控制晶片130可以是以黏晶方式(即主動面朝上)配置於第一表面110a上，但本發明不限於此。
在本實施例中，導線架140接合於第一表面110a上，其中功率元件120與控制晶片130與導線架140電性連接。導線架140的材料例如是金、銀、銅或鋁。另一方面，絕緣散熱基板110可以包括靠近第一表面110a的頂部金屬層112。頂部金屬層112的材料例如是金、銀、銅或鋁。
在一些實施例中，為了進一步簡化製程，頂部金屬層112的材料可以與導線架140的材料實質上相同。舉例而言，頂部金屬層112與導線架140可以是由同一電鍍製程所形成，使頂部金屬層112的材料可以與導線架140的材料實質上相同，且頂部金屬層112與導線架140可以為一體成型結構，以減少製程步驟簡化製程。然而，本發明不限於此，在其他實施例中，頂部金屬層112的材料可以與導線架140的材料不同，舉例而言，頂部金屬層112與導線架140可以是在不同製程所形成。
在一些實施例中，功率元件120與控制晶片130可以分別藉由第一內連導線162與第二內連導線164與導線架140電性連接。舉例而言，第一內連導線162與第二內連導線164可以包括導線、金屬夾片或其組合。在本實施例中，第一內連導線162例如是導線，而第二內連導線164例如是銅夾片，在此設計下可以達到快速且低損耗的電力轉換。然而，本發明不限制功率元件120、控制晶片130與導線架140電性連接之間的電性連接方式，只要功率元件120與控制晶片130與導線架140之間具有直接/間接電性連接皆屬於本發明的保護範圍。另一方面，功率元件120與控制晶片130可以分別藉由第一內連導線162與第二內連導線164彼此電性連接。
在本實施例中，密封體150至少包覆多個功率元件120、控制晶片130與部份導線架140，且第二表面110b暴露於密封體150外。本實施例的智慧功率模組封裝結構100藉由密封體150包覆多個功率元件120與控制晶片130(具有驅動多個功率元件120的閘極驅動功能以及脈衝寬度調變功能)可以將不同功能的元件整合在一個封裝結構中，縮短各元件之間的距離，因此可以有效地降低驅動電路的寄生阻抗，提升驅動系統效率，且解決面積占比過大的問題並提升組裝良率。此外，多個功率元件120與控制晶片130(包括閘極驅動器與脈波寬度調變控制器)配置於絕緣散熱基板110的第一表面110a上，另一方面，絕緣散熱基板110的第二表面110b被暴露於密封體150外，因此可以提升智慧功率模組封裝結構100的散熱效率，而可以達到較佳的性能。
在一些實施例中，導線架140可以在密封體150中延伸。舉例而言，導線架140可以由密封體150內延伸出密封體150外，未被密封體150包覆的另一部分導線架140可以作為智慧功率模組封裝結構100的外引腳。另一方面，密封體150例如是覆蓋絕緣散熱基板110的第一表面110a與連接第一表面110a與第二表面110b的側壁110s，以及部份第二表面110b，進而暴露出其餘部份第二表面110b。
在一些實施例中，智慧功率模組封裝結構100還可以包括配置於第一表面110a的被動元件170，且被動元件170可以與導線架140電性連接。舉例而言，被動元件170例如是二極體(diode)、電阻(resistor)及/或其他電容(capacitor)結構。然而，本發明不限於此，智慧功率模組封裝結構100也可不包括被動元件。
綜上所述，本發明的智慧功率模組封裝結構藉由密封體包覆多個功率元件與控制晶片(包括閘極驅動器與脈波寬度調變控制器)可以將不同功能的元件整合在一個封裝結構中，縮短各元件之間的距離，因此可以有效地降低驅動電路的寄生阻抗，提升驅動系統效率，且解決面積占比過大的問題並提升組裝良率。此外，多個功率元件與控制晶片(具有驅動多個功率元件的閘極驅動功能以及脈衝寬度調變功能)配置於絕緣散熱基板的第一表面上，另一方面，絕緣散熱基板的第二表面暴露於密封體外，因此可以提升智慧功率模組封裝結構的散熱效率，而可以達到較佳的性能。
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。
100:智慧功率模組封裝結構 110:絕緣散熱基板 110a:第一表面 110b:第二表面 110s:側壁 112:頂部金屬層 120:功率元件 130:控制晶片 140:導線架 150:密封體 162、164:內連導線 170:被動元件
圖1A是依照本發明的一實施例的一種智慧功率模組封裝結構的立體示意圖。 圖1B是依照本發明的一實施例的一種智慧功率模組封裝結構的剖面示意圖。
100:智慧功率模組封裝結構
110:絕緣散熱基板
112:頂部金屬層
120:功率元件
130:控制晶片
140:導線架
150:密封體
162、164:內連導線
170:被動元件

Claims (9)

  1. 一種智慧功率模組封裝結構，包括：絕緣散熱基板，具有第一表面與相對於所述第一表面的第二表面；多個功率元件，以覆晶方式配置於所述第一表面上；控制晶片，配置於所述第一表面上，其中所述控制晶片具有驅動所述多個功率元件的閘極驅動功能以及脈衝寬度調變功能；導線架，接合於所述第一表面上，其中所述多個功率元件與所述控制晶片與所述導線架電性連接；以及密封體，至少包覆所述多個功率元件、所述控制晶片與部份所述導線架，且部份所述第二表面暴露於所述密封體外。
  2. 如請求項1所述的智慧功率模組封裝結構，其中所述多個功率元件與所述控制晶片分別藉由第一內連導線與第二內連導線與所述導線架電性連接。
  3. 如請求項1所述的智慧功率模組封裝結構，其中所述多個功率元件與所述控制晶片分別藉由第一內連導線與第二內連導線彼此電性連接。
  4. 如請求項2或請求項3所述的智慧功率模組封裝結構，其中所述第一內連導線與所述第二內連導線分別包括導線、金屬夾片或其組合。
  5. 如請求項1所述的智慧功率模組封裝結構，其中所述導線架由所述密封體內延伸出所述密封體外，且其中未被所述密 封體包覆的所述導線架部分作為所述智慧功率模組封裝結構的外引腳。
  6. 如請求項1所述的智慧功率模組封裝結構，其為馬達驅動系統中的智慧功率模組封裝結構，且所述智慧功率模組封裝結構還包括被動元件，配置於所述第一表面並與所述導線架電性連接。
  7. 如請求項6所述的智慧功率模組封裝結構，其中所述控制晶片包括馬達控制器、閘極驅動器以及脈波寬度調變控制器。
  8. 如請求項1所述的智慧功率模組封裝結構，其中所述絕緣散熱基板包括直接覆銅陶瓷基板、絕緣金屬基板或印刷電路基板。
  9. 一種智慧功率模組封裝結構，包括：絕緣散熱基板，具有第一表面與相對於所述第一表面的第二表面，其中所述絕緣散熱基板包括靠近所述第一表面的頂部金屬層；多個功率元件，配置於所述第一表面上；控制晶片，配置於所述第一表面上，其中所述控制晶片具有驅動所述多個功率元件的閘極驅動功能以及脈衝寬度調變功能；導線架，接合於所述第一表面上，其中所述多個功率元件與所述控制晶片與所述導線架電性連接，且所述頂部金屬層與所述導線架為一體成型結構；以及密封體，至少包覆所述多個功率元件、所述控制晶片與部份 所述導線架，且部份所述第二表面暴露於所述密封體外。
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Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116032101A (zh) * 2023-02-27 2023-04-28 合肥惟新数控科技有限公司 一种智能功率模块拓扑驱动控制结构

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200522294A (en) * 2003-12-18 2005-07-01 Siliconware Precision Industries Co Ltd Semiconductor package having stacked chip and a method for fabricating
TW201203476A (en) * 2010-07-08 2012-01-16 Subtron Technology Co Ltd Semiconductor package structure and fabricating method of semiconductor package structure
US20130082334A1 (en) * 2011-09-29 2013-04-04 Renesas Electronics Corporation Semiconductor device
TWM458666U (zh) * 2013-03-27 2013-08-01 Chang Wah Electromaterials Inc 散熱導線架之結構
WO2019244372A1 (ja) * 2018-06-20 2019-12-26 ローム株式会社 半導体装置

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3021480A (en) * 1959-12-14 1962-02-13 Airpax Electronics Voltage compensation
JPS5471572A (en) * 1977-11-18 1979-06-08 Fujitsu Ltd Semiconductor device
JP3941266B2 (ja) * 1998-10-27 2007-07-04 三菱電機株式会社 半導体パワーモジュール
JP2003100986A (ja) * 2001-09-26 2003-04-04 Toshiba Corp 半導体装置
JP4492454B2 (ja) * 2005-06-20 2010-06-30 富士電機システムズ株式会社 パワー半導体モジュール
JP2008545274A (ja) * 2005-06-30 2008-12-11 フェアチャイルド セミコンダクター コーポレイション 半導体ダイ・パッケージ及びその製造方法
JP2008545280A (ja) * 2005-07-01 2008-12-11 オウヤング，キング 単一の表面実装パッケージ中に実装される完全パワーマネージメントシステム
US8120153B1 (en) * 2005-09-16 2012-02-21 University Of Central Florida Research Foundation, Inc. High-temperature, wirebondless, injection-molded, ultra-compact hybrid power module
JP2007250891A (ja) * 2006-03-16 2007-09-27 Fuji Electric Device Technology Co Ltd パワーエレクトロニクス機器
US8354740B2 (en) 2008-12-01 2013-01-15 Alpha & Omega Semiconductor, Inc. Top-side cooled semiconductor package with stacked interconnection plates and method
JP5273095B2 (ja) 2010-05-24 2013-08-28 株式会社デンソー 半導体装置
CN102339818B (zh) * 2010-07-15 2014-04-30 台达电子工业股份有限公司 功率模块及其制造方法
CN102340233B (zh) * 2010-07-15 2014-05-07 台达电子工业股份有限公司 功率模块
CN101964763B (zh) * 2010-09-30 2013-04-24 北京神州泰岳软件股份有限公司 消息处理方法
JP2013041939A (ja) 2011-08-12 2013-02-28 Sanyo Electric Co Ltd 半導体モジュール及びそれを搭載したインバータ
JP5740372B2 (ja) * 2012-09-12 2015-06-24 株式会社東芝 半導体メモリカード
US9171837B2 (en) 2012-12-17 2015-10-27 Nxp B.V. Cascode circuit
DE102014223361A1 (de) * 2014-11-17 2016-05-19 Robert Bosch Gmbh Elektromotor mit einem Leistungsmodul
CN104569460B (zh) * 2014-12-31 2017-01-04 万华普曼生物工程有限公司 全自动便隐血检测分析仪
CN204991696U (zh) * 2015-09-11 2016-01-20 深圳市汇顶科技股份有限公司 传感芯片封装组件和具有该传感芯片封装组件的电子设备
JP2018031590A (ja) * 2016-08-22 2018-03-01 三菱電機株式会社 半導体装置、半導体装置を含むシステム、および、半導体装置の劣化検出方法
US10892210B2 (en) 2016-10-03 2021-01-12 Delta Electronics, Inc. Package structures
DE102016118784A1 (de) * 2016-10-04 2018-04-05 Infineon Technologies Ag Chipträger, konfiguriert zur delaminierungsfreien Kapselung und stabilen Sinterung
US10121742B2 (en) * 2017-03-15 2018-11-06 Amkor Technology, Inc. Method of forming a packaged semiconductor device using ganged conductive connective assembly and structure
JP2019012767A (ja) * 2017-06-30 2019-01-24 ルネサスエレクトロニクス株式会社 半導体モジュールの製造方法および半導体モジュール
US10074590B1 (en) * 2017-07-02 2018-09-11 Infineon Technologies Ag Molded package with chip carrier comprising brazed electrically conductive layers
TWI677155B (zh) 2018-10-02 2019-11-11 新唐科技股份有限公司 功率驅動晶片及方法
CN209356888U (zh) * 2019-02-18 2019-09-06 上海鑫国动力科技有限公司 一种基于cpld的电机控制器电路模块
JP7322654B2 (ja) * 2019-10-15 2023-08-08 富士電機株式会社 半導体モジュール
CN210956665U (zh) * 2020-01-09 2020-07-07 珠海零边界集成电路有限公司 智能功率模块及电子设备
CN114695333A (zh) * 2020-12-30 2022-07-01 广东美的制冷设备有限公司 智能功率模块及其制作方法、变频器以及空调器

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200522294A (en) * 2003-12-18 2005-07-01 Siliconware Precision Industries Co Ltd Semiconductor package having stacked chip and a method for fabricating
TW201203476A (en) * 2010-07-08 2012-01-16 Subtron Technology Co Ltd Semiconductor package structure and fabricating method of semiconductor package structure
US20130082334A1 (en) * 2011-09-29 2013-04-04 Renesas Electronics Corporation Semiconductor device
TWM458666U (zh) * 2013-03-27 2013-08-01 Chang Wah Electromaterials Inc 散熱導線架之結構
WO2019244372A1 (ja) * 2018-06-20 2019-12-26 ローム株式会社 半導体装置

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US20220068754A1 (en) 2022-03-03
US11810835B2 (en) 2023-11-07

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