SG181205A1 - Semiconductor device and method offorming flipchip interconnect structure - Google Patents

Semiconductor device and method offorming flipchip interconnect structure Download PDF

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Publication number
SG181205A1
SG181205A1 SG2011003712A SG2011003712A SG181205A1 SG 181205 A1 SG181205 A1 SG 181205A1 SG 2011003712 A SG2011003712 A SG 2011003712A SG 2011003712 A SG2011003712 A SG 2011003712A SG 181205 A1 SG181205 A1 SG 181205A1
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SG
Singapore
Prior art keywords
interconnect
bump
substrate
semiconductor die
sites
Prior art date
Application number
SG2011003712A
Other languages
English (en)
Inventor
Rajendra D Pendse
Original Assignee
Stats Chippac Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stats Chippac Ltd filed Critical Stats Chippac Ltd
Publication of SG181205A1 publication Critical patent/SG181205A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/016—Manufacture or treatment using moulds
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
    • H05K3/325—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by abutting or pinching; Mechanical auxiliary parts therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01221—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition
    • H10W72/01225—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using local deposition in solid form, e.g. by using a powder or by stud bumping
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/013—Manufacture or treatment of die-attach connectors
    • H10W72/01308—Manufacture or treatment of die-attach connectors using permanent auxiliary members, e.g. using alignment marks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07221—Aligning
    • H10W72/07227—Aligning involving guiding structures, e.g. spacers or supporting members
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H10W72/07252—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in structures or sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H10W72/07253—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting changes in shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07331—Connecting techniques
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/231—Shapes
    • H10W72/234—Cross-sectional shape, i.e. in side view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
SG2011003712A 2010-11-16 2011-01-19 Semiconductor device and method offorming flipchip interconnect structure SG181205A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US12/947,414 US10388626B2 (en) 2000-03-10 2010-11-16 Semiconductor device and method of forming flipchip interconnect structure

Publications (1)

Publication Number Publication Date
SG181205A1 true SG181205A1 (en) 2012-06-28

Family

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Family Applications (3)

Application Number Title Priority Date Filing Date
SG2011003712A SG181205A1 (en) 2010-11-16 2011-01-19 Semiconductor device and method offorming flipchip interconnect structure
SG10201402214VA SG10201402214VA (en) 2010-11-16 2011-01-19 Semiconductor device and method offorming flipchip interconnect structure
SG10201809052TA SG10201809052TA (en) 2010-11-16 2011-01-19 Semiconductor device and method offorming flipchip interconnect structure

Family Applications After (2)

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SG10201402214VA SG10201402214VA (en) 2010-11-16 2011-01-19 Semiconductor device and method offorming flipchip interconnect structure
SG10201809052TA SG10201809052TA (en) 2010-11-16 2011-01-19 Semiconductor device and method offorming flipchip interconnect structure

Country Status (6)

Country Link
US (1) US10388626B2 (enExample)
JP (1) JP5952523B2 (enExample)
KR (1) KR101785729B1 (enExample)
CN (1) CN102468197B (enExample)
SG (3) SG181205A1 (enExample)
TW (1) TWI541916B (enExample)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9029196B2 (en) * 2003-11-10 2015-05-12 Stats Chippac, Ltd. Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask
US9142533B2 (en) 2010-05-20 2015-09-22 Taiwan Semiconductor Manufacturing Company, Ltd. Substrate interconnections having different sizes
US9659893B2 (en) 2011-12-21 2017-05-23 Mediatek Inc. Semiconductor package
US8633588B2 (en) 2011-12-21 2014-01-21 Mediatek Inc. Semiconductor package
US9425136B2 (en) 2012-04-17 2016-08-23 Taiwan Semiconductor Manufacturing Company, Ltd. Conical-shaped or tier-shaped pillar connections
US9299674B2 (en) 2012-04-18 2016-03-29 Taiwan Semiconductor Manufacturing Company, Ltd. Bump-on-trace interconnect
KR101492603B1 (ko) * 2012-07-25 2015-02-12 모글루(주) 전자문서 제작 시스템과 그 제어 방법
US9461008B2 (en) 2012-08-16 2016-10-04 Qualcomm Incorporated Solder on trace technology for interconnect attachment
US9111817B2 (en) 2012-09-18 2015-08-18 Taiwan Semiconductor Manufacturing Company, Ltd. Bump structure and method of forming same
CN104599978B (zh) * 2014-12-31 2017-08-01 广州兴森快捷电路科技有限公司 一种在倒装芯片基板上小间距之间制备高凸点锡球的制备方法
DE102015105752B4 (de) * 2015-04-15 2021-08-05 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung Halbleiteranordnung mit Reservoir für Markermaterial
WO2017008254A1 (en) * 2015-07-14 2017-01-19 Goertek. Inc Transferring method, manufacturing method, device and electronic apparatus of micro-led
US20170271175A1 (en) * 2016-03-16 2017-09-21 Qualcomm Incorporated Exposed die mold underfill (muf) with fine pitch copper (cu) pillar assembly and bump density
TWI641097B (zh) * 2016-08-12 2018-11-11 Chipmos Technologies Inc. 半導體封裝
US10050021B1 (en) * 2017-02-16 2018-08-14 Nanya Technology Corporation Die device, semiconductor device and method for making the same
KR102446203B1 (ko) 2017-12-12 2022-09-23 삼성디스플레이 주식회사 구동칩 및 이를 포함하는 표시 장치
TW202042359A (zh) * 2019-05-02 2020-11-16 南茂科技股份有限公司 薄膜覆晶封裝結構
US12159850B2 (en) 2020-12-25 2024-12-03 Yibu Semiconductor Co., Ltd. Semiconductor packaging method, semiconductor assembly and electronic device comprising semiconductor assembly
CN112687629B (zh) * 2020-12-25 2024-02-23 上海易卜半导体有限公司 半导体封装方法、半导体组件以及包含其的电子设备
CN114679143A (zh) * 2020-12-25 2022-06-28 苏州固锝电子股份有限公司 适用于声表面滤波器的低成本封装工艺
US12154884B2 (en) 2021-02-01 2024-11-26 Yibu Semiconductor Co., Ltd. Semiconductor packaging method, semiconductor assembly and electronic device comprising semiconductor assembly
US12500203B2 (en) 2021-02-22 2025-12-16 Yibu Semiconductor Co., Ltd. Semiconductor packaging method, semiconductor assembly and electronic device comprising semiconductor assembly
KR102722385B1 (ko) * 2021-11-04 2024-10-25 주식회사 웨이브피아 알에프 칩 패키지

Family Cites Families (134)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3665590A (en) * 1970-01-19 1972-05-30 Ncr Co Semiconductor flip-chip soldering method
JPS54105774A (en) * 1978-02-08 1979-08-20 Hitachi Ltd Method of forming pattern on thin film hybrid integrated circuit
US4813129A (en) 1987-06-19 1989-03-21 Hewlett-Packard Company Interconnect structure for PC boards and integrated circuits
JPH01226160A (ja) 1988-03-07 1989-09-08 Nippon Telegr & Teleph Corp <Ntt> 電子部品接続用の端子装置および端子の製造方法
US5323035A (en) 1992-10-13 1994-06-21 Glenn Leedy Interconnection structure for integrated circuits and method for making same
US4937653A (en) 1988-07-21 1990-06-26 American Telephone And Telegraph Company Semiconductor integrated circuit chip-to-chip interconnection scheme
US5634267A (en) * 1991-06-04 1997-06-03 Micron Technology, Inc. Method and apparatus for manufacturing known good semiconductor die
JPH0797597B2 (ja) 1989-06-02 1995-10-18 松下電器産業株式会社 半導体装置
JPH0429338A (ja) * 1990-05-24 1992-01-31 Nippon Mektron Ltd Icの搭載用回路基板及びその搭載方法
US5011066A (en) 1990-07-27 1991-04-30 Motorola, Inc. Enhanced collapse solder interconnection
JPH04355933A (ja) 1991-02-07 1992-12-09 Nitto Denko Corp フリツプチツプの実装構造
US5865365A (en) * 1991-02-19 1999-02-02 Hitachi, Ltd. Method of fabricating an electronic circuit device
US5686317A (en) * 1991-06-04 1997-11-11 Micron Technology, Inc. Method for forming an interconnect having a penetration limited contact structure for establishing a temporary electrical connection with a semiconductor die
JP3225062B2 (ja) * 1991-08-05 2001-11-05 ローム株式会社 熱硬化性樹脂シート及びそれを用いた半導体素子の実装方法
US5219117A (en) * 1991-11-01 1993-06-15 Motorola, Inc. Method of transferring solder balls onto a semiconductor device
JP2678958B2 (ja) * 1992-03-02 1997-11-19 カシオ計算機株式会社 フィルム配線基板およびその製造方法
US5314651A (en) * 1992-05-29 1994-05-24 Texas Instruments Incorporated Fine-grain pyroelectric detector material and method
JP3086081B2 (ja) 1992-08-20 2000-09-11 日本特殊陶業株式会社 配線基板とその製造方法
US5346857A (en) * 1992-09-28 1994-09-13 Motorola, Inc. Method for forming a flip-chip bond from a gold-tin eutectic
JP2518508B2 (ja) 1993-04-14 1996-07-24 日本電気株式会社 半導体装置
US5386624A (en) * 1993-07-06 1995-02-07 Motorola, Inc. Method for underencapsulating components on circuit supporting substrates
US5592736A (en) * 1993-09-03 1997-01-14 Micron Technology, Inc. Fabricating an interconnect for testing unpackaged semiconductor dice having raised bond pads
US5326428A (en) 1993-09-03 1994-07-05 Micron Semiconductor, Inc. Method for testing semiconductor circuitry for operability and method of forming apparatus for testing semiconductor circuitry for operability
JP3283977B2 (ja) 1993-10-18 2002-05-20 三菱電機株式会社 半導体装置およびその製造方法
JPH07122846A (ja) 1993-10-21 1995-05-12 Advantest Corp 微小表面実装部品のハンダ付け方法
US5508561A (en) * 1993-11-15 1996-04-16 Nec Corporation Apparatus for forming a double-bump structure used for flip-chip mounting
JPH07142488A (ja) 1993-11-15 1995-06-02 Nec Corp バンプ構造及びその製造方法並びにフリップチップ実装 構造
US6835898B2 (en) * 1993-11-16 2004-12-28 Formfactor, Inc. Electrical contact structures formed by configuring a flexible wire to have a springable shape and overcoating the wire with at least one layer of a resilient conductive material, methods of mounting the contact structures to electronic components, and applications for employing the contact structures
JPH07201917A (ja) 1993-12-28 1995-08-04 Matsushita Electric Ind Co Ltd 回路形成基板とその製造方法
JP2664878B2 (ja) * 1994-01-31 1997-10-22 インターナショナル・ビジネス・マシーンズ・コーポレイション 半導体チップパッケージおよびその製造方法
JP2830734B2 (ja) 1994-04-04 1998-12-02 松下電器産業株式会社 配線基板とその製造方法
US5802699A (en) * 1994-06-07 1998-09-08 Tessera, Inc. Methods of assembling microelectronic assembly with socket for engaging bump leads
US5519580A (en) * 1994-09-09 1996-05-21 Intel Corporation Method of controlling solder ball size of BGA IC components
FR2726397B1 (fr) * 1994-10-28 1996-11-22 Commissariat Energie Atomique Film conducteur anisotrope pour la microconnectique
DE19524739A1 (de) * 1994-11-17 1996-05-23 Fraunhofer Ges Forschung Kernmetall-Lothöcker für die Flip-Chip-Technik
JP3353508B2 (ja) * 1994-12-20 2002-12-03 ソニー株式会社 プリント配線板とこれを用いた電子装置
JPH08236654A (ja) * 1995-02-23 1996-09-13 Matsushita Electric Ind Co Ltd チップキャリアとその製造方法
JP3209875B2 (ja) * 1995-03-23 2001-09-17 株式会社日立製作所 基板の製造方法及び基板
JP2796070B2 (ja) * 1995-04-28 1998-09-10 松下電器産業株式会社 プローブカードの製造方法
US5650595A (en) * 1995-05-25 1997-07-22 International Business Machines Corporation Electronic module with multiple solder dams in soldermask window
JP2770821B2 (ja) 1995-07-27 1998-07-02 日本電気株式会社 半導体装置の実装方法および実装構造
US5874780A (en) * 1995-07-27 1999-02-23 Nec Corporation Method of mounting a semiconductor device to a substrate and a mounted structure
DE19527661C2 (de) * 1995-07-28 1998-02-19 Optrex Europ Gmbh Elektrische Leiter aufweisender Träger mit einem elektronischen Bauteil und Verfahen zum Kontaktieren von Leitern eines Substrates mit Kontaktwarzen eines elektronischen Bauteils
US5872051A (en) * 1995-08-02 1999-02-16 International Business Machines Corporation Process for transferring material to semiconductor chip conductive pads using a transfer substrate
JPH11510649A (ja) * 1995-08-29 1999-09-14 ミネソタ・マイニング・アンド・マニュファクチャリング・カンパニー 接着剤接合した電子デバイス用の変形可能な基板アセンブリ
US5710071A (en) * 1995-12-04 1998-01-20 Motorola, Inc. Process for underfilling a flip-chip semiconductor device
KR0182073B1 (ko) * 1995-12-22 1999-03-20 황인길 반도체 칩 스케일 반도체 패키지 및 그 제조방법
JP3558459B2 (ja) 1996-02-08 2004-08-25 沖電気工業株式会社 インナーリード接続方法
US5889326A (en) * 1996-02-27 1999-03-30 Nec Corporation Structure for bonding semiconductor device to substrate
JPH09237802A (ja) 1996-02-28 1997-09-09 Fujitsu Ltd 電子部品
JPH09260552A (ja) * 1996-03-22 1997-10-03 Nec Corp 半導体チップの実装構造
KR100216839B1 (ko) * 1996-04-01 1999-09-01 김규현 Bga 반도체 패키지의 솔더 볼 랜드 메탈 구조
US5940729A (en) * 1996-04-17 1999-08-17 International Business Machines Corp. Method of planarizing a curved substrate and resulting structure
JP2828021B2 (ja) * 1996-04-22 1998-11-25 日本電気株式会社 ベアチップ実装構造及び製造方法
US5755909A (en) * 1996-06-26 1998-05-26 Spectra, Inc. Electroding of ceramic piezoelectric transducers
JP2870497B2 (ja) 1996-08-01 1999-03-17 日本電気株式会社 半導体素子の実装方法
JPH1098075A (ja) 1996-09-20 1998-04-14 Toshiba Corp 半導体実装方法、半導体実装装置および半導体実装構造
US5729896A (en) * 1996-10-31 1998-03-24 International Business Machines Corporation Method for attaching a flip chip on flexible circuit carrier using chip with metallic cap on solder
US5796590A (en) 1996-11-05 1998-08-18 Micron Electronics, Inc. Assembly aid for mounting packaged integrated circuit devices to printed circuit boards
JP2924830B2 (ja) * 1996-11-15 1999-07-26 日本電気株式会社 半導体装置及びその製造方法
US5952840A (en) * 1996-12-31 1999-09-14 Micron Technology, Inc. Apparatus for testing semiconductor wafers
US5931371A (en) * 1997-01-16 1999-08-03 Ford Motor Company Standoff controlled interconnection
JPH10233413A (ja) * 1997-02-21 1998-09-02 Nec Kansai Ltd 半導体装置およびその製造方法並びに配線基板
JP3500032B2 (ja) 1997-03-13 2004-02-23 日本特殊陶業株式会社 配線基板及びその製造方法
JP3346263B2 (ja) * 1997-04-11 2002-11-18 イビデン株式会社 プリント配線板及びその製造方法
JP3070514B2 (ja) * 1997-04-28 2000-07-31 日本電気株式会社 突起電極を有する半導体装置、半導体装置の実装方法およびその実装構造
JPH10303252A (ja) * 1997-04-28 1998-11-13 Nec Kansai Ltd 半導体装置
WO1999000842A1 (fr) * 1997-06-26 1999-01-07 Hitachi Chemical Company, Ltd. Substrat pour montage de plaquettes a semi-conducteur
JPH1126919A (ja) * 1997-06-30 1999-01-29 Fuji Photo Film Co Ltd プリント配線板
US6337522B1 (en) * 1997-07-10 2002-01-08 International Business Machines Corporation Structure employing electrically conductive adhesives
US6335571B1 (en) * 1997-07-21 2002-01-01 Miguel Albert Capote Semiconductor flip-chip package and method for the fabrication thereof
WO1999004430A1 (en) * 1997-07-21 1999-01-28 Aguila Technologies, Inc. Semiconductor flip-chip package and method for the fabrication thereof
US5985456A (en) * 1997-07-21 1999-11-16 Miguel Albert Capote Carboxyl-containing polyunsaturated fluxing adhesive for attaching integrated circuits
JP3028791B2 (ja) 1997-08-06 2000-04-04 日本電気株式会社 チップ部品の実装方法
US6121143A (en) * 1997-09-19 2000-09-19 3M Innovative Properties Company Abrasive articles comprising a fluorochemical agent for wafer surface modification
US6448665B1 (en) * 1997-10-15 2002-09-10 Kabushiki Kaisha Toshiba Semiconductor package and manufacturing method thereof
SG71734A1 (en) * 1997-11-21 2000-04-18 Inst Materials Research & Eng Area array stud bump flip chip and assembly process
JP3381593B2 (ja) 1997-12-22 2003-03-04 松下電器産業株式会社 バンプ付電子部品の実装方法
JP3819576B2 (ja) * 1997-12-25 2006-09-13 沖電気工業株式会社 半導体装置及びその製造方法
JPH11204913A (ja) 1998-01-09 1999-07-30 Sony Corp 回路基板及び実装方法並びにプリント配線板
US6200143B1 (en) 1998-01-09 2001-03-13 Tessera, Inc. Low insertion force connector for microelectronic elements
US6037192A (en) * 1998-01-22 2000-03-14 Nortel Networks Corporation Process of assembling an integrated circuit and a terminal substrate using solder reflow and adhesive cure
US6426636B1 (en) * 1998-02-11 2002-07-30 International Business Machines Corporation Wafer probe interface arrangement with nonresilient probe elements and support structure
US5953814A (en) * 1998-02-27 1999-09-21 Delco Electronics Corp. Process for producing flip chip circuit board assembly exhibiting enhanced reliability
US6324754B1 (en) * 1998-03-25 2001-12-04 Tessera, Inc. Method for fabricating microelectronic assemblies
US6329605B1 (en) * 1998-03-26 2001-12-11 Tessera, Inc. Components with conductive solder mask layers
JP2000031204A (ja) 1998-07-07 2000-01-28 Ricoh Co Ltd 半導体パッケージの製造方法
US6189208B1 (en) * 1998-09-11 2001-02-20 Polymer Flip Chip Corp. Flip chip mounting technique
JP2000133672A (ja) * 1998-10-28 2000-05-12 Seiko Epson Corp 半導体装置及びその製造方法、回路基板並びに電子機器
JP3346320B2 (ja) * 1999-02-03 2002-11-18 カシオ計算機株式会社 半導体装置及びその製造方法
SG88747A1 (en) * 1999-03-01 2002-05-21 Motorola Inc A method and machine for underfilling an assembly to form a semiconductor package
US6483195B1 (en) * 1999-03-16 2002-11-19 Sumitomo Bakelite Company Limited Transfer bump street, semiconductor flip chip and method of producing same
US6225206B1 (en) * 1999-05-10 2001-05-01 International Business Machines Corporation Flip chip C4 extension structure and process
US6181569B1 (en) * 1999-06-07 2001-01-30 Kishore K. Chakravorty Low cost chip size package and method of fabricating the same
US6173887B1 (en) * 1999-06-24 2001-01-16 International Business Machines Corporation Method of making electrically conductive contacts on substrates
JP2001068836A (ja) * 1999-08-27 2001-03-16 Mitsubishi Electric Corp プリント配線基板及び半導体モジュール並びに半導体モジュールの製造方法
TW429492B (en) * 1999-10-21 2001-04-11 Siliconware Precision Industries Co Ltd Ball grid array package and its fabricating method
WO2001068311A1 (en) * 2000-03-10 2001-09-20 Chippac, Inc. Flip chip interconnection structure
JP2001339011A (ja) * 2000-03-24 2001-12-07 Shinko Electric Ind Co Ltd 半導体装置およびその製造方法
EP1223612A4 (en) * 2000-05-12 2005-06-29 Matsushita Electric Industrial Co Ltd PRINTED CIRCUIT BOARD FOR MOUNTING A SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, AND METHOD FOR MANUFACTURING THE MOUNTING STRUCTURE THEREOF
US6573610B1 (en) * 2000-06-02 2003-06-03 Siliconware Precision Industries Co., Ltd. Substrate of semiconductor package for flip chip package
US6201305B1 (en) * 2000-06-09 2001-03-13 Amkor Technology, Inc. Making solder ball mounting pads on substrates
JP3554533B2 (ja) * 2000-10-13 2004-08-18 シャープ株式会社 チップオンフィルム用テープおよび半導体装置
JP2002134541A (ja) 2000-10-23 2002-05-10 Citizen Watch Co Ltd 半導体装置とその製造方法ならびに半導体装置の実装構造
US8158508B2 (en) * 2001-03-05 2012-04-17 Megica Corporation Structure and manufacturing method of a chip scale package
US7242099B2 (en) * 2001-03-05 2007-07-10 Megica Corporation Chip package with multiple chips connected by bumps
US6818545B2 (en) * 2001-03-05 2004-11-16 Megic Corporation Low fabrication cost, fine pitch and high reliability solder bump
US6808958B2 (en) * 2001-03-07 2004-10-26 Tessera, Inc. Methods of bonding microelectronic elements
US6893901B2 (en) * 2001-05-14 2005-05-17 Fairchild Semiconductor Corporation Carrier with metal bumps for semiconductor die packages
JP4663165B2 (ja) * 2001-06-27 2011-03-30 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP3787295B2 (ja) 2001-10-23 2006-06-21 ローム株式会社 半導体装置
TW507341B (en) * 2001-11-01 2002-10-21 Siliconware Precision Industries Co Ltd Substrate capable of preventing delamination of chip and semiconductor encapsulation having such a substrate
US6952047B2 (en) * 2002-07-01 2005-10-04 Tessera, Inc. Assemblies having stacked semiconductor chips and methods of making same
US6969914B2 (en) * 2002-08-29 2005-11-29 Micron Technology, Inc. Electronic device package
JP4114483B2 (ja) 2003-01-10 2008-07-09 セイコーエプソン株式会社 半導体チップの実装方法、半導体実装基板、電子デバイスおよび電子機器
US7271497B2 (en) 2003-03-10 2007-09-18 Fairchild Semiconductor Corporation Dual metal stud bumping for flip chip applications
US7005751B2 (en) * 2003-04-10 2006-02-28 Formfactor, Inc. Layered microelectronic contact and method for fabricating same
US7758351B2 (en) * 2003-04-11 2010-07-20 Neoconix, Inc. Method and system for batch manufacturing of spring elements
TWI225701B (en) * 2003-09-17 2004-12-21 Advanced Semiconductor Eng Process for forming bumps in adhesive layer in wafer level package
US20060216860A1 (en) 2005-03-25 2006-09-28 Stats Chippac, Ltd. Flip chip interconnection having narrow interconnection sites on the substrate
TWI534915B (zh) 2003-11-10 2016-05-21 恰巴克有限公司 引線上凸塊之倒裝晶片互連
US20070145548A1 (en) * 2003-12-22 2007-06-28 Amkor Technology, Inc. Stack-type semiconductor package and manufacturing method thereof
US7368695B2 (en) * 2004-05-03 2008-05-06 Tessera, Inc. Image sensor package and fabrication method
US7576427B2 (en) * 2004-05-28 2009-08-18 Stellar Micro Devices Cold weld hermetic MEMS package and method of manufacture
JP2007064841A (ja) 2005-08-31 2007-03-15 Advantest Corp 電子部品試験装置用のキャリブレーションボード
KR100691443B1 (ko) 2005-11-16 2007-03-09 삼성전기주식회사 플립칩 패키지 및 그 제조방법
JP2007214230A (ja) 2006-02-08 2007-08-23 Cmk Corp プリント配線板
US7829998B2 (en) 2007-05-04 2010-11-09 Stats Chippac, Ltd. Semiconductor wafer having through-hole vias on saw streets with backside redistribution layer
CN101690434B (zh) * 2007-06-26 2011-08-17 株式会社村田制作所 元器件内置基板的制造方法
JP5550102B2 (ja) 2008-01-17 2014-07-16 株式会社村田製作所 電子部品
JP2009177061A (ja) * 2008-01-28 2009-08-06 Nec Electronics Corp 半導体装置及び半導体装置の製造方法
JP2010141055A (ja) 2008-12-10 2010-06-24 Sanyo Electric Co Ltd 半導体モジュール、半導体モジュールの製造方法および携帯機器
US8338945B2 (en) * 2010-10-26 2012-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Molded chip interposer structure and methods
US9599665B2 (en) 2013-05-21 2017-03-21 Advantest Corporation Low overdrive probes with high overdrive substrate

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