KR980011502A - 불휘발성 반도체 기억장치 및 라이트방법 - Google Patents

불휘발성 반도체 기억장치 및 라이트방법 Download PDF

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Publication number
KR980011502A
KR980011502A KR1019970030562A KR19970030562A KR980011502A KR 980011502 A KR980011502 A KR 980011502A KR 1019970030562 A KR1019970030562 A KR 1019970030562A KR 19970030562 A KR19970030562 A KR 19970030562A KR 980011502 A KR980011502 A KR 980011502A
Authority
KR
South Korea
Prior art keywords
data
memory cell
threshold value
threshold
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1019970030562A
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English (en)
Korean (ko)
Inventor
게이이치 요시다
쇼지 구보노
Original Assignee
가나이 츠토무
히다치세사쿠쇼 주식회사
스즈키 진이치로
히다치초엘에스아이 엔지니어링 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 가나이 츠토무, 히다치세사쿠쇼 주식회사, 스즈키 진이치로, 히다치초엘에스아이 엔지니어링 주식회사 filed Critical 가나이 츠토무
Publication of KR980011502A publication Critical patent/KR980011502A/ko
Withdrawn legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G11C11/5635—Erasing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Non-Volatile Memory (AREA)
KR1019970030562A 1996-07-10 1997-07-02 불휘발성 반도체 기억장치 및 라이트방법 Withdrawn KR980011502A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP18085996A JP3062730B2 (ja) 1996-07-10 1996-07-10 不揮発性半導体記憶装置および書込み方法
JP96-180859 1996-07-10

Publications (1)

Publication Number Publication Date
KR980011502A true KR980011502A (ko) 1998-04-30

Family

ID=16090611

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019970030562A Withdrawn KR980011502A (ko) 1996-07-10 1997-07-02 불휘발성 반도체 기억장치 및 라이트방법

Country Status (4)

Country Link
US (2) US5959882A (enExample)
JP (2) JP3062730B2 (enExample)
KR (1) KR980011502A (enExample)
TW (2) TW350048B (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100476930B1 (ko) * 2002-09-04 2005-03-16 삼성전자주식회사 피이크전류를 줄이는 플래쉬메모리
KR100550963B1 (ko) * 1998-06-02 2006-02-13 가부시키가이샤 히타치세이사쿠쇼 메모리 카드, 기억 장치 및 기억 시스템
KR20190035269A (ko) * 2017-09-26 2019-04-03 에스케이하이닉스 주식회사 불휘발성 메모리 장치, 불휘발성 메모리 장치의 동작 방법 및 불휘발성 메모리 장치를 포함하는 데이터 저장 장치

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US5978270A (en) * 1995-08-31 1999-11-02 Hitachi, Ltd. Semiconductor non-volatile memory device and computer system using the same
JP3062730B2 (ja) * 1996-07-10 2000-07-12 株式会社日立製作所 不揮発性半導体記憶装置および書込み方法
JP2000021185A (ja) 1998-06-30 2000-01-21 Sharp Corp 不揮発性半導体メモリの書込み方法
JP4023953B2 (ja) 1999-06-22 2007-12-19 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
USRE40110E1 (en) 1999-09-20 2008-02-26 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device for storing multivalued data
JP2001093288A (ja) 1999-09-20 2001-04-06 Toshiba Corp 不揮発性半導体記憶装置
JP2001126490A (ja) 1999-10-25 2001-05-11 Hitachi Ltd 不揮発性半導体多値記憶装置の書込み方法
JP4299428B2 (ja) * 2000-01-19 2009-07-22 三星電子株式会社 可変容量半導体記憶装置
KR100343285B1 (ko) * 2000-02-11 2002-07-15 윤종용 프로그램 시간을 단축시킬 수 있는 플래시 메모리 장치의프로그램 방법
US6343033B1 (en) 2000-02-25 2002-01-29 Advanced Micro Devices, Inc. Variable pulse width memory programming
US6219276B1 (en) * 2000-02-25 2001-04-17 Advanced Micro Devices, Inc. Multilevel cell programming
US6240015B1 (en) * 2000-04-07 2001-05-29 Taiwan Semiconductor Manufacturing Corporation Method for reading 2-bit ETOX cells using gate induced drain leakage current
JP4503142B2 (ja) * 2000-06-14 2010-07-14 株式会社ルネサステクノロジ 半導体記憶装置
JP4641338B2 (ja) * 2000-08-29 2011-03-02 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置及びシステム
JP3922516B2 (ja) 2000-09-28 2007-05-30 株式会社ルネサステクノロジ 不揮発性メモリと不揮発性メモリの書き込み方法
JP4082482B2 (ja) 2000-12-11 2008-04-30 株式会社ルネサステクノロジ 記憶システムおよびデータ処理システム
US6556481B1 (en) 2001-02-21 2003-04-29 Aplus Flash Technology, Inc. 3-step write operation nonvolatile semiconductor one-transistor, nor-type flash EEPROM memory cell
US6620682B1 (en) 2001-02-27 2003-09-16 Aplus Flash Technology, Inc. Set of three level concurrent word line bias conditions for a nor type flash memory array
JP2002269065A (ja) * 2001-03-08 2002-09-20 Mitsubishi Electric Corp プログラム可能な不揮発性メモリを内蔵したマイクロコンピュータ
KR100390959B1 (ko) * 2001-06-29 2003-07-12 주식회사 하이닉스반도체 센싱회로를 이용한 멀티레벨 플래시 메모리 프로그램/리드방법
JP3850791B2 (ja) * 2001-12-20 2006-11-29 株式会社東芝 不揮発性半導体記憶装置
JP4012151B2 (ja) * 2002-02-28 2007-11-21 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
JP2003346485A (ja) * 2002-05-23 2003-12-05 Fujitsu Ltd 不揮発性半導体記憶装置及び不揮発性半導体記憶装置の書き込み方法
US6862223B1 (en) * 2002-07-05 2005-03-01 Aplus Flash Technology, Inc. Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout
JP2004171686A (ja) 2002-11-20 2004-06-17 Renesas Technology Corp 不揮発性半導体記憶装置およびそのデータ消去方法
EP1473739A1 (en) * 2003-04-29 2004-11-03 Dialog Semiconductor GmbH Flash memory with pre-detection for data loss
JP4637512B2 (ja) 2003-11-13 2011-02-23 ルネサスエレクトロニクス株式会社 半導体集積回路装置
JP2007149291A (ja) * 2005-11-30 2007-06-14 Sharp Corp 不揮発性半導体記憶装置及び書き込み方法
JP4233563B2 (ja) * 2005-12-28 2009-03-04 パナソニック株式会社 多値データを記憶する不揮発性半導体記憶装置
KR100719381B1 (ko) * 2006-03-31 2007-05-18 삼성전자주식회사 어드레스 설정 플래그를 갖는 멀티 레벨 셀 낸드형 플래시메모리
JP4750655B2 (ja) 2006-09-12 2011-08-17 Ｏｋｉセミコンダクタ株式会社 半導体不揮発性メモリ、データ書き込み方法、半導体不揮発性メモリの製造方法、及びデータ書き込みプログラム
JP2008085196A (ja) 2006-09-28 2008-04-10 Oki Electric Ind Co Ltd 半導体不揮発性メモリ、データ書き込み方法、半導体不揮発性メモリの製造方法、及びデータ書き込みプログラム
US7609548B2 (en) 2006-09-29 2009-10-27 Hynix Semiconductor Inc. Method of programming a multi level cell
KR100908518B1 (ko) * 2006-09-29 2009-07-20 주식회사 하이닉스반도체 멀티 레벨 셀의 프로그램 방법
US8189396B2 (en) 2006-12-14 2012-05-29 Mosaid Technologies Incorporated Word line driver in a hierarchical NOR flash memory
JP4524486B2 (ja) * 2007-06-01 2010-08-18 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
US7489543B1 (en) * 2007-07-25 2009-02-10 Micron Technology, Inc. Programming multilevel cell memory arrays
US8565019B2 (en) * 2007-11-20 2013-10-22 Kabushiki Kaisha Toshiba Method for controlling threshold value in nonvolatile semiconductor memory device
JP5363154B2 (ja) 2009-03-19 2013-12-11 ラピスセミコンダクタ株式会社 半導体不揮発性メモリ、半導体不揮発性メモリの電荷蓄積方法、及び電荷蓄積プログラム
JP2011070717A (ja) * 2009-09-24 2011-04-07 Toshiba Corp 不揮発性半導体記憶装置
US8429335B2 (en) * 2009-10-13 2013-04-23 Macronix International Co., Ltd. Memory device and operation method to selectively invert data
JP5426600B2 (ja) * 2011-03-30 2014-02-26 株式会社東芝 半導体メモリ

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100550963B1 (ko) * 1998-06-02 2006-02-13 가부시키가이샤 히타치세이사쿠쇼 메모리 카드, 기억 장치 및 기억 시스템
KR100476930B1 (ko) * 2002-09-04 2005-03-16 삼성전자주식회사 피이크전류를 줄이는 플래쉬메모리
KR20190035269A (ko) * 2017-09-26 2019-04-03 에스케이하이닉스 주식회사 불휘발성 메모리 장치, 불휘발성 메모리 장치의 동작 방법 및 불휘발성 메모리 장치를 포함하는 데이터 저장 장치

Also Published As

Publication number Publication date
TW350048B (en) 1999-01-11
JP3062730B2 (ja) 2000-07-12
JPH1027486A (ja) 1998-01-27
US6525960B2 (en) 2003-02-25
JP3993323B2 (ja) 2007-10-17
TW381224B (en) 2000-02-01
JPH11195299A (ja) 1999-07-21
US20020181279A1 (en) 2002-12-05
US5959882A (en) 1999-09-28

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PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 19970702

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