KR940022932A - 발광다이오드 제조방법, 발광다이오드 반도체소자 및 발광다이오드 적층방법 - Google Patents

발광다이오드 제조방법, 발광다이오드 반도체소자 및 발광다이오드 적층방법 Download PDF

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KR940022932A
KR940022932A KR1019940005398A KR19940005398A KR940022932A KR 940022932 A KR940022932 A KR 940022932A KR 1019940005398 A KR1019940005398 A KR 1019940005398A KR 19940005398 A KR19940005398 A KR 19940005398A KR 940022932 A KR940022932 A KR 940022932A
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에이. 키쉬 프레드
엠. 로빈스 버지니아
엠. 스테란카 프랭크
우에빙 존
씨. 데페버 데니스
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휴렛트-팩카드 캄파니
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    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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Abstract

발광다이오드(LED) 제조방법은 원하는 기계적인 특성를 가지는 발광다이오드층의 제조에 적합하도록 선택된 일시적성장기판은 제공하는 단계를 포함한다. 예를들면 격자정합은 중요한 고려사항이다. 그런 다음 발광다이오드층을 일시적성장기판 위에 성장시켜, 높은 크리스탈품질을 얻는다. 다음에 일시적성장기판은 제거될 수 있다. 다음 제2기판을 웨이퍼결합 기법을 이용하여 발광다이오드층에 결합한다. 제2기판은 기계적인 특성보다는 오히려 광학적인 특성을 위해 선택한다. 제2기판은 광학적투과성이고 전기적전도성인 것이 바람직하다. 웨이퍼결합 기법은 상기 제2기판과 발광다이오드층 사이의 낮은 저항접속을 위해 실행된다. 또한 웨이퍼결합은 표면안정화 및 광반사를 제공하거나 전류흐름을 규정하기 위해 시행될수 있다.

Description

발광다이오드 제조방법, 발광다이오드 반도체소자 및 발광다이오드 적층방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제4도는 본 발명에 따라서 일시적 성장기판을 가지는 이중 이종반도체 발광다이오드 소자에 대한 측면도. 제5도는 제4도에서 성장기판을 제거한 발광다이오드 구조의 측면도. 제6도는 웨이퍼결합 기법을 이용해 영구적인 기판을 부착한 제5도의 발광다이오드 구조의 측변도.

Claims (37)

  1. 원하는 기계적 특성을 가지는 발광다이오드층 제조에 적합한 특성을 가지는 제1물질을 선택하는 제1물질 선택단계와; 상기 선택된 제1물질로 만들어진 제1기판을 제공하는 제1기판 제공단계와; 상기 제1기판위에 상기 발광다이오드층를 제조하여 발광다이오드구조를 형성하는 발광다이오드구조 형성단계와; 상기 발광다이오드구조의 성능향상에 적합한 광학적 투과성물질을 선택하는 광학적 트과성물질 선택단계와; 상기 발광다이오드층에 대해 상기 선택된 광학적 투과성물질의 투과성층을 웨이퍼결합하는 투과성 웨이퍼결합단계를 포함하는 발광다이오드 제조방법.
  2. 제1항에 있어서, 상기 발광다이오드 구조 형성단계는 상기 제1기판위에 다수의 층을 에피택시얼성장 시키는 단계이고, 상기 제1물질은 상기 다수의 층을 엑피택시얼성장시키는데 적합한 격자를 제공하기 위해 선택된 물질인 발광다이오드 제조방법.
  3. 제1항에 있어서, 상기 제1기판을 제거하는 단계를 더 포함하는 발광다이오드 제조방법.
  4. 제3항에 있어서, 상기 제1기판을 제거하는 단계는 상기 투과성층을 웨이퍼결합하는 단계에 앞서 수행하는 단계이고, 상기 웨이퍼결합단계는 상기 제1기판이 제거될 상기 발광다이오드구조의 면에 투과성기판을 웨이퍼결합하는 단계인 발광다이오드 제조방법.
  5. 제1항에 있어서, 상기 발광다이오드구조에 상기 투과성층을 웨이퍼결합하는 상기 투과성 웨이퍼결합단계는 낮은 저항전기적접속이 제공되게 고온에서 수행되는 단계이며, 웨이퍼결합하려고 하는 상기 층들의 연화를 위해 온도를 상승시키는 것을 포함하는 발광다이오드 제조방법.
  6. 제5항에 있어서, 상기 투과성 웨이퍼결합단계는 웨이퍼결합하려는 상기 층들의 부합을 위해 웨이퍼결합하려는 상기 층들에 압력을 인가하는 것을 포함하는 단계인 발광다이오드 제조방법.
  7. 제1항에 있어서, 상기 발광다이오드구조 형성단계와 상기 광학적 투과성물질 선택단계중의 적어도 한 단계는 웨이퍼결합하려는 상기 층들의 접속부에 대해 In함유 화합물, Hg함유 화합물, Cd함유 화합물 그리고 Zn함유 화합물의 하나를 선택하는 단계인 발광다이오드 제조방법.
  8. 에피택시얼성장 발광다이오드층에 적합한 격자를 가지는 일시적성장기판을 제공하는 일시적성장기판제공단계와; 제1면을 가지고 상기 성장기판으로 일시적성장지지며을 형성하기 위한 에피택시얼성장단계와; 상기 일시적성장지지면을 상기 성장기판에 비하여 증가된 광학적 투과성과 더욱 높은 전기적전도성 중의 적어도 하나를 가지는 영구적기판으로 대체하는 일시적성장지지면 대체단계를 포함하며; 상기 일시적성장지지면 대체단계는 상기 발광다이오드층의 상기 제1및 제2면들의 한 면에 상기 영구적기판과 상기 발광다이오드층 상이의 낮은 저항접속을 위해 상기 영구적기판과 상기 발광다이오드층간 접속부의 온도를 상승시키는 것을 포함하는 발광다이오드 제조방법.
  9. 제8항에 있어서, 상기 일시적성장지지면 대체단계는 상기 발광다이오드층의 상기 제1면에 상기 영구적기판을 웨이퍼결합한 후에 상기 일시적성장기판을 제거하는 것을 포함하는 발광다이오드 제조방법.
  10. 제8항에 있어서, 상기 일시적성장지지면 대체단계는 상기 발광다이오드층의 상기 제2면에 상기 영구적기판을 웨이퍼결합기에 앞서 상기 일시적성장기판을 제거하는 것을 포함하는 발광다이오드 제조방법.
  11. 제8항에 있어서, 상기 발광다이오드층 위에 제2의 전기적전도성의 광학적 투과성기판을 웨이퍼결합하는 것을 더 포함하며, 상기 영구적기판은 전기적으로 전도성이고 광학적으로 투과성인 것이어서, 상기 투과성기판들 사이에 상기 발광다이오드층이 샌트위치되는 발광다이오드 제조방법.
  12. 제8항에 있어서, 상기 웨이퍼결합 접속부의 캐리어농도를 증가시키기 위해 상기 영구적기판의 상기 웨이퍼결합단계동안 도우펀트가스를 흘리는 단계를 더 포함하는 발광다이오드 제조방법.
  13. 제8항에 있어서, 상기 일시적성장지지면을 상기 영구적기판으로 대체하는 단계에 앞서 산화를 더디게 하기 위해 상기 영구적기판과 상기 발광다이오드층중의 적어도 하나의 캡(Cap)물질을 입히는 단계와; 상기 발광다이오드층에 대한 상기 영구적기판의 상기 웨이퍼결합을 위해 사익 영구적기판과 상기 발광다이오드층들중의 적어도 하나가 분리되도록 열을 가하는 단계를 더 포함하는 발광다이오드 제조방법.
  14. 전류 전도에 응답하여 광을 발생하기 위한 반도체층과; 상기 반도체층에 결합된 광학적 투과성 웨이퍼결합층과; 전류를 상기 반도체층에 인가하기 위한 전극수단을 포함하며; 상기 웨이퍼결합층과 상기 반도체층의 접속부는 웨이퍼결합이 행해지는 층들의 특성을 나타내는 발광반도체소자.
  15. 제14항에 있어서, 상기 반도체층은 에피택시얼층이고 상기 웨이퍼결합층은 반도체기판인 발광반도체소자.
  16. 제14항에 있어서, 상기 웨이퍼결합층과는 반대쪽에 있는 상기 반도체층의 면위에 투과성 웨이퍼결합 기판을 더 포함하는 발광반도체소자.
  17. 제14항에 있어서, 상기 반도체층은 발광다이오드구조를 형성하는 발광반도체소자.
  18. 제14항에 있어서, 상기 웨이퍼결합층은 상기 반도체층에 대해 낮은 저항전기적접속을 이루는 상기 발광반도체소자.
  19. 제14항에 있어서, 상기 웨이퍼결합층은 8mil보다 두꺼운 두께를 가지는 투과성기판이고, 상기 투과성기판은 상기 반도체웨이퍼에 웨이퍼결합되는 발광반도체소자.
  20. 제14항에 있어서, 상기 반도체층은 방출에너지를 가지는 활성층을 포함하고, 상기 웨이퍼결합층은 상기 방출에너지 보다 큰 에너지 갭을 가지는 전기적전도성기판인 발광반도체소자.
  21. 제14항에 있어서, 상기 반도체층에 결합된 제2광학적 투과성 웨이퍼결합층을 더 포함하는 발광반도체소자.
  22. 제1기판을 제공하는 단계와; 전류 전도에 응답하여 광을 발생기키기 위해 활성 p-n접합층을 포함하며 적어도 하나의 층이 알루미늄함유 반도체층을 포함하는 다수의 층을 에피택시얼성장시키는 단계와; 상기 알루미늄함유 반도체층내에서의 가수분해 발생을 더디게 하기 위해 상기 알루미늄함유 반도체층 위헤 광학적 투과성 표면안정화층의 웨이퍼결합을 포함하는 발광다이오드(LED) 제조방법.
  23. 제22항에 있어서, 상기 웨이퍼결합은 표면안정화층과 상기 알루미늄함유 반도체층의 접속부에 원하는 저항성특성을 나타내기 위해 수행되는 단계인 발광다이오드 제조방법.
  24. 발광다이오드층의 제조를 위한 격자정합에 적합할 성장기펀의 선택을 포함하는 일시적성정기판의 제공단계와; 제1면을 가지고 상기 성장기판에 결합된 제2면을 가지는 발광다이오드층을 상기 성장기판 위에 성장시키는 단계와; 상기 미러쪽으로 방사된 광을 반사하기 위해 상기 발광다이오드층의 상기 제1및 제2면의 한 면에 전기적전도성 미러를 웨이퍼결합하는 단계를 포함하며; 상기 웨이퍼결합단계는 낮은 저항접속이 이루어지게 웨이퍼결합동안 상기 미러와 상기 발광다이오드층의 온도를 상승시키는 것을 포함하는 발광다이오드(LED) 제조방법.
  25. 제24항에 있어서, 상기 발광다이오드층의 상기 제2면에 상기 미러를 웨이퍼결합하는 상기 웨이퍼결합단계에 앞서 상기 성장기판을 제거하는 단계를 더 포함하는 발광다이오드 제조방법.
  26. 제24항에 있어서, 상기 미러는 제2기판위에 지지되는 발광다이오드 제조방법.
  27. 제1발광다이오드구조를 형성하기 위해 제1발광당이오드층을 에피택시얼성장시키는 단계와; 제2발광다이오드구조를 형성하기 위해 제2발광다이오드층을 에피택시얼성장시키는 단계와; 상기 제2발광다이오드구조 위에 상기 제1발광다이오드구조를 적층시키는 단계와; 상기 제2발광다이오드구조에 상기 제1발광다이오드구조를 웨이퍼결합하는 단계를 포함하는 발광다이오드 적층방법.
  28. 제27항에 있어서, 상기 제1발광다이오드층은 일시적성장기판위에 성장되고, 상기 방법은 상기 일시적성장기판을 제거하는 단계를 더 포함하는 발광다이오드 적층방법.
  29. 제27항에 있어서, 상기 웨이퍼결합단계는 상기 제1 및 제2발광다이오드구조가 동일한 극성을 갖도록 제1 및 제2발광다이오드구조를 정렬시키는 것을 포함하는 발광다이오드 적층방법.
  30. 제27항에 있어서, 상기 제1발광다이오드구조와 제2발광다이오드구조 사이에, 상기 제1 및 제2 발광다이오드구조와 반대극성을 가지는 터널접합을 제공하는 단계를 더 포함하는 발광다이오드 적층방법.
  31. 인접한 제1 및 제2층이 서로 접속되는 다수의 층을 가지는 발광다이오드를 형성하는 방법으로서, 광학적 및 전기적특성 중의 적어도 한 특성이 상기 제1층과 제2층의 접속부를 따라 선택적으로 변화하게끔 상기 제1층의 제1표면을 패턴화하는 단계와; 상기 제2층에 상기 제1층의 상기 제1표면을 웨이퍼결합하는 단계를 포함하는 발광다이오드 제조방법.
  32. 제31항에 있어서, 상기 방법은 발광다이오드층들을 에피택시얼성장시키는 단계를 더 포함하며; 상기 제1층의 제1표면을 패턴화하는 단계는 상기 에피택시얼성장된 발광다이오드층에 대해 원하는 전기적 전류 경로를 규정하기 위한 패턴을 선택하는 단계를 포함하는 발광다이오드 제조방법.
  33. 제31항에 있어서, 상기 제1층의 상기 제1표면을 패턴화하는 단계는 상기 제1표면을 따라 함몰부를 형성하기 위해 상기 제1층의으로부터 물질을 제거하는 단계를 포함하는 발광다이오드 제조방법.
  34. 제33항에 있어서, 상기 방법은 전압을 인가하기 위해 상기 함몰부와 정렬된 전극을 형성하는 단계를 더 포함하며, 상기 전극은 제2층과 반대쪽에 있는 상기 제1층의 면에 위치되는 발광다이오드 제조방법.
  35. 제31항에 있어서, 상기 제1층은 전류확산 윈도우층을 형성하기 위해 선택된 물질로 형성되는 발광다이오드 제조방법.
  36. 제31항에 있어서, 상기 제1표면을 패턴화는 단계는 상기 발광다이오드에 의해 발생된 광에 대한 광반사패턴을 규정하기 위한 패턴을 선택하는 것을 포함하는 발광다이오드 제조방법.
  37. 제1기판을 제공하는 단계와; 상기 제1기판 위에 Ⅱ-Ⅳ발광다이오드구조를 제공하는 단계와; 상기 Ⅱ-Ⅳ발광다이오드구조의 안정성 향상을 위해 상기 Ⅱ-Ⅳ발광다이오드구조에 Ⅲ-Ⅴ반도체기판과 Sic기판 중의 한 기판을 웨이퍼결합하는 단계를 포함하는 발광다이오드 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
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JP3532953B2 (ja) 2004-05-31
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