KR100817646B1 - 플립칩 상호연결 구조물 - Google Patents

플립칩 상호연결 구조물 Download PDF

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Publication number
KR100817646B1
KR100817646B1 KR1020027011617A KR20027011617A KR100817646B1 KR 100817646 B1 KR100817646 B1 KR 100817646B1 KR 1020027011617 A KR1020027011617 A KR 1020027011617A KR 20027011617 A KR20027011617 A KR 20027011617A KR 100817646 B1 KR100817646 B1 KR 100817646B1
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South Korea
Prior art keywords
bumps
deformable material
interconnect
substrate
semiconductor die
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KR1020027011617A
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English (en)
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KR20020089379A (ko
Inventor
라젠드라 펜즈
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스태츠 칩팩, 엘티디.
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Publication of KR20020089379A publication Critical patent/KR20020089379A/ko
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Publication of KR100817646B1 publication Critical patent/KR100817646B1/ko

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Abstract

제 1 요소(12)와 제 2 요소(14)의 접합 표면을 기계적으로 맞물리게 함으로서 플립칩 구조물(10)이 형성된다. 제 1 요소(12)는 집적 회로 칩 상의 범프일 수 있으며 파괴에 대해 높은 신장도를 보이고 낮은 항복강도를 지닌 부드럽고 변형가능한 물질을 포함한다. 제 2 요소(14)의 표면은 기판 패드일 수 있으며, 기계적 맞물림 형성을 위한 압력 하에서 제 1 요소(12)가 플라스틱 변형을 일으키는 기준이 되는 거친부분(16)이 제 2 요소(14)의 표면에 제공된다.

Description

플립칩 상호연결 구조물{FLIP CHIP INTERCONNECTION STRUCTURE}
본 발명은 플립칩 상호연결 구조에 관한 것으로서, 특히, 결합할 표면간 꺼칠꺼칠한 맞물림과 기계적 변형에 의해 형성되는 상호연결 구조에 관한 것이다.
집적회로(IC) 칩과 기판간의 플립칩 상호연결은 전자 패키지 장치에서 흔히 실행된다. 이러한 상호연결의 가장 흔한 형태로, 범프 물질이 녹음으로서 기판에 형성되는 패드에 IC 칩 상의 범프가 야금학적으로 결합된다. 이 접근법이 견고한 연결을 제공하지만, 용융 및 고체화 과정 중 브리징(bridging; 즉, 인접 연결간의 쇼트) 위험으로 인해 상호연결의 피치를 감소시키는 것이 어렵다.
대안의 실시예에서는 미립 박막이나 페이스트를 이용하여 부착물이 만들어지고, 수지의 수축힘과 함께 페이스트나 박막의 전도성 입자들이 전기적 연결을 이행한다. 이 접근법은 상호연결 피치를 감소시키는 데 적합하지만, 시간에 따라 미립 상호연결이 퇴화될 수 있기 때문에 장기적 관점에서 신뢰도의 문제점을 지닌다.
일반적으로 발명은 아래의 단계들에 의해 플립칩 상호연결 구조를 형성하는 방법을 특징으로 한다. 즉, 첫 번째로, IC칩에 제 1 부재를, 기판에 제 2 부재를 제공한다. 이때 제 1 부재는 낮은 항복 강도, 높은 신장도의 변형가능한 물질을, 제 2 부재는 제 1 부재와 결합할 부분에 꺼칠꺼칠한 표면을 가진다. 두 번째로, 제 2 부재의 꺼칠꺼칠함에 부합하도록 제 1 부재 일부의 플라스틱 변형을 일으키기에 충분히 큰 힘을 이용하여 제 1, 2 부재를 서로에 대해 가압한다. 일부 실시예에서, 제 1 부재는 IC칩 상에 형성되는 범프이며 통상적으로 이러한 범프 세트 중 하나이다. 일부 유용한 실시예에서 제 1 부재의 변형가능한 물질은 금을 포함한다. 일부 실시예에서, 제 2 부재는 기판 위 패드나 리드이거나, 또는 바이어 구멍이다. 일부 실시예에서, 제 2 부재는 종래의 플레이트식 표면 말단을 가진 표면 패드이며, 그 위에 발명에 따른 거칠은 면이 제공된다.
또다른 일반적 태양에서, 발명은 발명의 방법에 의해 제작되는 플립칩 상호연결 구조를 특징으로 한다.
또다른 일반적 태양에서, 발명은 칩에 부착된 제 1 부재와 기판에 부착된 제 2 부재를 포함하는 플립칩 상호연결 구조를 특징으로 하고, 이 경우에 제 1 부재는 변형가능한 물질이고 제 1, 2 부재는 제 1 부재의 변형가능한 물질을 거칠은 제 2 부재 표면과 기계적으로 맞물림으로서 결합된다.
도 1A, 1B는 발명에 따른 칩 상호연결 구조를 지닌 장치의 제작 단계에서 발명에 따른 실시예를 도시하는 단면도.
도 2A, 2B는 발명에 따른 칩 상호연결 구조를 지닌 장치의 제작 단계에서 발명에 따른 제 2 실시예를 도시하는 단면도.
도 3A, 3B는 발명에 따른 칩 상호연결 구조를 지닌 장치의 제작 단계에서 발 명에 따른 제 3 실시예를 도시하는 단면도.
도 4A, 4B는 발명에 따른 칩 상호연결 구조를 지닌 장치의 제작 단계에서 발명에 따른 제 4 실시예를 도시하는 단면도.
도 5는 발명에 따라 유용한 상호연결 범프에 대한 대안의 모양을 도시하는 단면도.
도 6은 발명에 따라 유용한 상호연결 범프에 대한 대안의 모양을 도시하는 단면도.
도 1A와 1B에서, 플립칩 상호연결 구조(flip chip interconnection structure)(10)가 제 1 부재(12)와 제 2 부재(14)를 포함하는 형태로 도시된다. 제 1 부재(12)는 IC 칩 상에 형성되는 범프(bump)이며(선호됨), 제 2 부재(14)는 기판에 형성되는 리드(lead)나 패드(pad)이다(선호됨). 제 1 부재(12)는 낮은 항복강도와 파괴에 대해 높은 신장도(elongation)를 지닌 부드럽고 변형가능한 물질을 포함한다(선호됨). 제 2 부재(14)는 종래의 플레이트식 표면 말단을 지닌 기판 패드를 포함하는 것이 선호되며, 거친부분(16)을 가지는 특징을 띤다. 거친부분(16)의 크기는 1~25미크론 수준이다. 범프는 일반적으로 유연한 물질이다. 즉, 약 250그램의 수직 하중과 동등한 힘 하에서 약 25미크론보다 큰 플라스틱 변형을 나타내는 물질이다. 발명에 따른 범프로서 금이 특히 유용한 물질이 될 수 있다.
상호연결은 제 1 부재(12)와 제 2 부재(14)를 서로에 대해 압착함으로서 달성되며, 그래서 제 1 부재(12)가 거친부분(16)에 부합하도록 플라스틱 변형을 나타 낼 수 있다. 제 1 부재(12)의 높이와 부드러운 특성은 연결이 실행된 이후에도 상당한 변형을 일으키고, 따라서 평탄도가 낮은 다른 범프/패드 쌍도 역시 마찬가지로 성공적으로 결합되게 한다. 상호연결 실행에 필요한 힘 및 온도는 짝지은 물질의 야금학적 확산을 필요로하는 종래의 고온-압축 결합에 필요한 것보다 훨씬 낮다. 힘 및 온도의 이러한 감소는 그렇지 않을 경우 칩에 발생할 수 있는 손상을 감소시키고, 특히 동시에 실행되는 연결의 수가 클 때 특히 그러하다.
두 번째 실시예가 도 2A, 2B에 도시된다. 맞물림 구조(20)는 제 2 부재(또는 트레이스)(28)의 변부(26)와 측벽(24) 주위로 제 1 부재(22)의 물질이 플라스틱 변형됨으로서 형성된다. 제 1 부재(22)의 물질 변형은 측벽(24) 주변부를 따르는 것이 선호되며, 물질이 인접 트레이스 사이의 영역 내로 변형되어 들어가지 않고 동일 평면 내에서 수직인 방향으로 변형되어 들어간다. 맞물림 구조(20)는 결합력을 크게 증가시키지 않으면서 맞물린 표면의 면적을 증가시켜서, 보다 견고한 연결을 제공한다. 게다가, 칩표면에 수직인 추가적 변위는 다중 접합면의 낮은 동평면성에 대해 높은 허용한계를 제공한다. 마지막으로, 칩표면에 평행한 일상적 맞물림에 부가하여 칩표면에 수직인 평면을 따라 맞물리는 것은 다이와 기판 사이에서 수직 방향의 상대적 움직임에 대한 보호를 제공한다.
도 3A와 3B에 상호연결(30)을 포함하는 세 번째 실시예가 도시된다. 상호연결(30)은 제 2 부재(34) 주위로 제 1 부재(32) 물질을 플라스틱 변형시킴으로서 형성된다. 이때, 제 2 부재(34)의 폭이 제 1 부재(32)보다 좁으며, 제 1 부재(32)는 제 2 부재(34)의 양 측부(36, 38)를 따라 제 1 부재(32) 물질을 플라스틱 변형시킨 다.
상호연결(40)을 포함하는 네 번째 실시예가 도 4A, 4B에 도시된다. 제 2 요소(42)의 리드 형태는 쐐기 형태로서, 감소방식 에칭법에 의해 제작되는 실제 기판에서 가장 전형적인 "잘려나간(undercut)" 리드 형태를 나타낸다. 상호연결(40)은 제 2 요소(42) 주변에 제 1 요소(44)의 물질을 플라스틱 변형시킴으로서 형성된다. 도시되는 형태는 최소의 트레이스 폭 제한을 제거하며, 특히, 종래 도선 결합 장치에 필요한 평면(46)의 최소폭의 제한을 제거한다. 상호연결(40)은 바이어 패드에 직접 결합시킴으로서 형성될 수 있고, 또는 바이어 구멍을 통해 기판 위 다음 낮은 층으로 결합함으로서 형성될 수도 있다.
도 2A, 2B, 3A, 3B, 4A, 4B를 참고하여 앞서 설명한 실시예에서, 거시적 맞물림 구조는 도 1A, 1B를 참고하여 앞서 설명한 실시예에 비해 작은 힘, 가령 2배만큼 작은 힘을 이용하여 상호연결을 형성시킬 수 있다. 작은 압력을 이용함으로서 제작 중에 칩에 손상이 줄어드는 효과가 있다.
선호되는 실시예에서, 처리된 수지에 의해 공급되는 압축력이 전기 연결의 장기적 유지관리를 개선시킬 수 있도록, 칩과 기판 사이 공간에 접착성 수지가 공급된다. 접착성 수지는 접합면들이 결합되기 전에 공급되는 것이 선호되며, 상호연결 형성과 동시에 처리된다. 상호연결 힘을 가함으로서, 접합면들로부터 수지 물질을 멀리 떨어지게 할 수 있고, 기계적으로 맞물린 연결을 형성시킬 수 있다. 대안으로, 덜채운 처리과정(underfill process)을 이용한 상호연결 후 수지가 공급될 수도 있다.
공개된 선호 실시예에서, 제 1 부재(12, 22, 32, 44) 물질로는 Cu, 전자없는 NiAu, 또는 Au가 선호된다. 기판 물질로는 단일-변의 FR5 래미네이트, 또는, 두-변의 BT-수지 래미네이트가 선호된다.
범프는 압축 및 변형 이전에 일반적으로 장방형인 단면을 지닌 앞서 제시된 실시예들과는 다른 여러 구조를 취할 수 있다. 즉, 도 5와 6에 두개의 특히 유용한 범프 구조들이 도시된다. 도 5는 계단식 형태를 도시하며, 여기서 칩에 인접한 범프 부분(베이스)의 폭이 기판 위 패드에 대해 압축되는 부분(팁)의 폭보다 넓다. 도 6은 "덩어리 범프(stud bump)" 구조로서, 베이스는 팁의 폭보다 넓은 둥근 형태를 취한다. 이 구조물들 각각은 팁의 폭이 더 얇기 때문에 기판 위 거친 부분에 범프가 더 쉽게 결합되게 하며(순응되게 하며), 베이스 형태 폭이 더 넓기 때문에 구조적 안정성이 향상된다.
제 2 부재는 앞서 언급한 바와 같이 리드나 패드일 수 있고, 바이어 구멍에 전기적 연결되는 종래의 납땜 패드에 범프가 상호연결될 수 있다. 그러나 일부 실시예에서, 제 2 부재는 그 자체로 바이어 구멍을 포함한다. 발명의 본 실시예에 따라, 바이어 구멍으로부터 얼마간 떨어진 위치에 형성되는 납땜 패드같은 패드에 범프를 압축하는 것보다, 바이어 구멍의 테두리와 그 안에 전도 물질에 대해 직접 범프를 압축함으로서 범프와 바이어 구멍간에 직접 상호연결 구조가 형성될 수 있다. 이는 칩 위의 면적을 보다 효율적으로 이용하게 한다. 바이어 구멍 내의 구멍이 범프의 팁보다 작은 경우에(일반적 경우), 범프는 바이어 구멍에 직접 가압될 수 있고, 상호연결 형성을 위해 바이어 구멍 내로 변형된다. 실제로, 바이어 구멍은 구 조물 내에서 거친부분으로 작용한다. 범프가 바이어 구멍보다 작은 경우에, 바이어 구멍의 변두리 부분에 결합이 형성되도록 범프가 옮겨질 수 있다.

Claims (17)

  1. 선형 측벽을 가지는 복수의 범프를 포함하며, 변형가능한 물질로 형성된 반도체 다이와; 그리고
    복수의 상호연결 패드를 가지는 기판을 포함하되,
    상기 상호연결 패드 각각이 거칠거칠한 표면을 형성하도록 플레이트식 표면으로부터 확장한 복수의 거친부분(asperities)을 가지는 플레이트식 표면을 포함하고,
    상기 범프의 변형가능한 물질이 상기 상호연결 패드의 거친부분에 기계적으로 맞물림으로써, 상기 반도체 다이와 기판을 전기적으로 연결하도록 상기 범프와 상호연결 패드가 함께 부착되며,
    상기 범프의 상기 선형 측벽을 유지하면서, 인접한 범프 사이의 피치(pitch)를 줄이도록, 상기 범프가 플라스틱 변형하여 상기 상호연결 패드의 거친부분이 상기 범프의 변형가능한 물질에 결합하는 것을 특징으로 하는 플립칩 반도체 장치.
  2. 제 1 항에 있어서,
    상기 복수의 거친부분이 각각 상기 상호연결 패드의 플레이트식 표면으로부터 1-25 마이크로미터 확장하는 것을 특징으로 하는 플립칩 반도체 장치.
  3. 제 1 항에 있어서,
    상기 범프가 25 마이크로미터 이상의 플라스틱 변형을 하는 것을 특징으로 하는 플립칩 반도체 장치.
  4. 제 1 항에 있어서,
    상기 플라스틱 변형이 상기 범프의 측벽을 따라 이루어지는 것을 특징으로 하는 플립칩 반도체 장치.
  5. 제 1 항에 있어서,
    상기 범프의 변형가능한 물질이, 금, 구리 그리고 니켈로 구성된 그룹으로부터 선택된 물질로 형성되는 것을 특징으로 하는 플립칩 반도체 장치.
  6. 제 1 항에 있어서,
    상기 반도체 다이와 기판 사이에 배치된 레진(resin)을 더 포함하는 것을 특징으로 하는 플립칩 반도체 장치.
  7. 변형가능한 물질로 형성된 복수의 범프를 포함하는 반도체 다이와; 그리고
    복수의 상호연결 패드를 가지는 기판을 포함하되,
    상기 상호연결 패드는, 불규칙한 표면을 형성하는 플레이트식 표면으로부터 확장하는 복수의 거친부분을 가지는 플레이트식 표면을 각각 포함하고,
    상기 범프의 변형가능한 물질이 상기 상호연결 패드의 거친부분에 기계적으로 맞물림으로써, 상기 반도체 다이와 기판을 전기적으로 연결되도록, 상기 범프와 상호연결 패드가 함께 부착되고,
    상기 상호연결 패드의 거친부분이 상기 범프의 변형가능한 물질에 결합하도록 상기 범프가 플라스틱 변형하는 것을 특징으로 하는 반도체 장치.
  8. 제 7 항에 있어서,
    상기 범프가 선형 측벽을 가지는 것을 특징으로 하는 반도체 장치.
  9. 제 8 항에 있어서,
    인접한 범프 사이의 피치를 줄이기 위한 플라스틱 변형 중에 상기 범프가 상기 선형 측벽을 유지하는 것을 특징으로 하는 반도체 장치.
  10. 제 7 항에 있어서,
    상기 범프의 변형가능한 물질이, 금, 구리 그리고 니켈로 구성된 그룹으로부터 선택된 물질로 형성되는 것을 특징으로 하는 반도체 장치.
  11. 제 7 항에 있어서,
    상기 반도체 다이와 기판 사이에 배치된 레진을 더 포함하는 것을 특징으로 하는 반도체 장치.
  12. 제 7 항에 있어서,
    상기 범프의 측벽을 따라 상기 플라스틱 변형이 이루어지는 것을 특징으로 하는 반도체 장치.
  13. 제 7 항에 있어서,
    상기 복수의 거친부분 각각이, 상기 상호연결 패드의 플레이트식 표면으로부터 1-25 마이크로미터 확장하는 것을 특징으로 하는 반도체 장치.
  14. 제 7 항에 있어서,
    상기 범프가 25 마이크로미터 이상의 플라스틱 변형을 하는 것을 특징으로 하는 반도체 장치.
  15. 삭제
  16. 삭제
  17. 삭제
KR1020027011617A 2000-03-10 2001-03-09 플립칩 상호연결 구조물 KR100817646B1 (ko)

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