KR100440188B1 - 반도체 메모리 장치 - Google Patents
반도체 메모리 장치 Download PDFInfo
- Publication number
- KR100440188B1 KR100440188B1 KR10-2001-0069942A KR20010069942A KR100440188B1 KR 100440188 B1 KR100440188 B1 KR 100440188B1 KR 20010069942 A KR20010069942 A KR 20010069942A KR 100440188 B1 KR100440188 B1 KR 100440188B1
- Authority
- KR
- South Korea
- Prior art keywords
- channel body
- gate
- misfet
- auxiliary gate
- source region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/021—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in voltage or current generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
- G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/33—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor extending under the transistor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/34—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the transistor being at least partially in a trench in the substrate
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/50—Peripheral circuit region structures
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/711—Insulated-gate field-effect transistors [IGFET] having floating bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C2029/1202—Word line control
Landscapes
- Semiconductor Memories (AREA)
- Dram (AREA)
- Non-Volatile Memory (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001220461A JP2003031693A (ja) | 2001-07-19 | 2001-07-19 | 半導体メモリ装置 |
| JPJP-P-2001-00220461 | 2001-07-19 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20030011512A KR20030011512A (ko) | 2003-02-11 |
| KR100440188B1 true KR100440188B1 (ko) | 2004-07-14 |
Family
ID=19054277
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR10-2001-0069942A Expired - Fee Related KR100440188B1 (ko) | 2001-07-19 | 2001-11-10 | 반도체 메모리 장치 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US6617651B2 (enExample) |
| EP (1) | EP1280205A3 (enExample) |
| JP (1) | JP2003031693A (enExample) |
| KR (1) | KR100440188B1 (enExample) |
| CN (1) | CN1217415C (enExample) |
| TW (1) | TW519751B (enExample) |
Families Citing this family (146)
| Publication number | Priority date | Publication date | Assignee | Title |
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| EP1355316B1 (en) | 2002-04-18 | 2007-02-21 | Innovative Silicon SA | Data storage device and refreshing method for use with such device |
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| US7710771B2 (en) * | 2002-11-20 | 2010-05-04 | The Regents Of The University Of California | Method and apparatus for capacitorless double-gate storage |
| JP4850387B2 (ja) * | 2002-12-09 | 2012-01-11 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP2004297048A (ja) * | 2003-03-11 | 2004-10-21 | Semiconductor Energy Lab Co Ltd | 集積回路、該集積回路を有する半導体表示装置及び集積回路の駆動方法 |
| US7541614B2 (en) * | 2003-03-11 | 2009-06-02 | Semiconductor Energy Laboratory Co., Ltd. | Integrated circuit, semiconductor device comprising the same, electronic device having the same, and driving method of the same |
| US7085153B2 (en) | 2003-05-13 | 2006-08-01 | Innovative Silicon S.A. | Semiconductor memory cell, array, architecture and device, and method of operating same |
| US6912150B2 (en) | 2003-05-13 | 2005-06-28 | Lionel Portman | Reference current generator, and method of programming, adjusting and/or operating same |
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| JP4282388B2 (ja) | 2003-06-30 | 2009-06-17 | 株式会社東芝 | 半導体記憶装置 |
| FR2857150A1 (fr) * | 2003-07-01 | 2005-01-07 | St Microelectronics Sa | Element integre de memoire dynamique a acces aleatoire, matrice et procede de fabrication de tels elements |
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| US7184298B2 (en) | 2003-09-24 | 2007-02-27 | Innovative Silicon S.A. | Low power programming technique for a floating body memory transistor, memory cell, and memory array |
| JP4443886B2 (ja) * | 2003-09-30 | 2010-03-31 | 株式会社東芝 | 半導体記憶装置 |
| JP4044510B2 (ja) | 2003-10-30 | 2008-02-06 | 株式会社東芝 | 半導体集積回路装置 |
| JP4058403B2 (ja) | 2003-11-21 | 2008-03-12 | 株式会社東芝 | 半導体装置 |
| US7002842B2 (en) * | 2003-11-26 | 2006-02-21 | Intel Corporation | Floating-body dynamic random access memory with purge line |
| JP4559728B2 (ja) * | 2003-12-26 | 2010-10-13 | 株式会社東芝 | 半導体記憶装置 |
| JP4342970B2 (ja) | 2004-02-02 | 2009-10-14 | 株式会社東芝 | 半導体メモリ装置及びその製造方法 |
| JP4028499B2 (ja) * | 2004-03-01 | 2007-12-26 | 株式会社東芝 | 半導体記憶装置 |
| JP4002900B2 (ja) | 2004-03-02 | 2007-11-07 | 東芝マイクロエレクトロニクス株式会社 | 半導体記憶装置 |
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| JP3962729B2 (ja) | 2004-06-03 | 2007-08-22 | 株式会社東芝 | 半導体装置 |
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| JPH07321332A (ja) * | 1994-05-21 | 1995-12-08 | Sony Corp | Mis型半導体装置及びその製造方法 |
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| JP2001051292A (ja) * | 1998-06-12 | 2001-02-23 | Semiconductor Energy Lab Co Ltd | 半導体装置および半導体表示装置 |
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| US6686630B2 (en) * | 2001-02-07 | 2004-02-03 | International Business Machines Corporation | Damascene double-gate MOSFET structure and its fabrication method |
-
2001
- 2001-07-19 JP JP2001220461A patent/JP2003031693A/ja active Pending
- 2001-09-28 US US09/964,851 patent/US6617651B2/en not_active Expired - Lifetime
- 2001-10-01 EP EP01123208A patent/EP1280205A3/en not_active Withdrawn
- 2001-10-29 TW TW090126711A patent/TW519751B/zh not_active IP Right Cessation
- 2001-11-10 KR KR10-2001-0069942A patent/KR100440188B1/ko not_active Expired - Fee Related
- 2001-12-11 CN CN011435461A patent/CN1217415C/zh not_active Expired - Fee Related
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2003
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Also Published As
| Publication number | Publication date |
|---|---|
| US6897531B2 (en) | 2005-05-24 |
| US6617651B2 (en) | 2003-09-09 |
| JP2003031693A (ja) | 2003-01-31 |
| CN1399340A (zh) | 2003-02-26 |
| KR20030011512A (ko) | 2003-02-11 |
| CN1217415C (zh) | 2005-08-31 |
| EP1280205A3 (en) | 2009-10-07 |
| EP1280205A2 (en) | 2003-01-29 |
| TW519751B (en) | 2003-02-01 |
| US20040026749A1 (en) | 2004-02-12 |
| US20030015757A1 (en) | 2003-01-23 |
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