JP6280265B2 - パワーモジュール半導体装置 - Google Patents
パワーモジュール半導体装置 Download PDFInfo
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- JP6280265B2 JP6280265B2 JP2017076563A JP2017076563A JP6280265B2 JP 6280265 B2 JP6280265 B2 JP 6280265B2 JP 2017076563 A JP2017076563 A JP 2017076563A JP 2017076563 A JP2017076563 A JP 2017076563A JP 6280265 B2 JP6280265 B2 JP 6280265B2
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- semiconductor device
- power module
- electrode
- module semiconductor
- surface plate
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Description
(半導体装置の構成)
第1の実施の形態に係るパワーモジュール半導体装置1であって、ツーインワンモジュール(2 in 1 Module)の模式的鳥瞰構成は、図1に示すように表される。
第1の実施の形態に係るパワーモジュール半導体装置1に適用する半導体デバイス100(Q1・Q4)の例として、SiC MOSFETの模式的断面構造は、図13に示すように、n-高抵抗層からなる半導体基板26と、半導体基板26の表面側に形成されたpベース領域28と、pベース領域28の表面に形成されたソース領域30と、pベース領域28間の半導体基板26の表面上に配置されたゲート絶縁膜32と、ゲート絶縁膜32上に配置されたゲート電極38と、ソース領域30およびpベース領域28に接続されたソース電極34と、半導体基板26の表面と反対側の裏面に配置されたn+ドレイン領域24と、n+ドレイン領域24に接続されたドレインパッド電極36とを備える。
次に、図15を参照して、第1の実施の形態に係るパワーモジュール半導体装置1を用いて構成した3相交流インバータについて説明する。
第2の実施の形態に係るパワーモジュール半導体装置2であって、ワンインワンモジュール(1 in 1 Module)の模式的回路表現は、図19に示すように表される。また、第2の実施の形態に係るパワーモジュール半導体装置2であって、ワンインワンモジュールの詳細回路表現は、図20に示すように表される。
第3の実施の形態に係るパワーモジュール半導体装置の模式的断面構造は、図27(a)に示すように表され、図27(a)の上面板電極部分の模式的鳥瞰構成は、図27(b)に示すように表される。
比較例の上面板電極22の平面パターン構成は、図30(a)に示すように表され、第3の実施の形態に係るパワーモジュール半導体装置に適用可能な上面板電極の構成例および別の構成例は、図30(b)および図30(c)に示すように表される。
第3の実施の形態に係るパワーモジュール半導体装置において、トランスファモールド樹脂を注入するため治具400内にデバイスを配置し、樹脂封入する工程を説明する側面構成は、図31に示すように表される。
図34は、第3の実施の形態の変形例1に係るパワーモジュール半導体装置において、トランスファモールド樹脂を注入するため治具400内にデバイスを配置し、樹脂封入する工程を説明する正断面構成図である。
図35は、第3の実施の形態の変形例2に係るパワーモジュール半導体装置において、トランスファモールド樹脂を注入するため治具400内にデバイスを配置し、樹脂封入する工程を説明する正断面構成図である。
図36は、第3の実施の形態の変形例3に係るパワーモジュール半導体装置において、トランスファモールド樹脂で樹脂封止した側断面構成図である。
図37は、第3の実施の形態の変形例4に係るパワーモジュール半導体装置において、トランスファモールド樹脂で樹脂封止した側断面構成図である。
第4の実施の形態に係るパワーモジュール半導体装置は、図38および図39に示すように表される。
第5の実施の形態に係るパワーモジュール半導体装置は、図42〜図45に示すように表される。
第6の実施の形態に係るパワーモジュール半導体装置は、図46〜図48に示すように表される。
上記のように、第1〜第6の実施の形態によって記載したが、この開示の一部をなす論述および図面は例示的なものであり、この発明を限定するものであると理解すべきではない。この開示から当業者には様々な代替実施の形態、実施例および運用技術が明らかとなろう。
3a、3b…半田層
10…セラミック基板
10a、10b…銅プレート層
12…樹脂層
18o、18n、18p、18n…柱状接続電極
20、201、204…柱状電極
22、221、224…上面板電極
22T…案内溝
22Ta…拡散用の溝
22S…凸状部
24…n+ドレイン領域
25…柱状延長電極
26…半導体基板
28…pベース領域
30…ソース領域
32…ゲート絶縁膜
34…ソース電極
36…ドレイン電極
38…ゲート電極
44…層間絶縁膜
46…蓄電池(E)
48…コンバータ
50…ゲートドライブ部
52…パワーモジュール部
54…三相モータ部
100、Q、Q1〜Q6…半導体デバイス(SiC MOSFET、半導体チップ)
D1〜D6、DI…ダイオード
400…治具
420…導入孔
430…排気孔
500…キャビティ
GP…ゲートパッド電極
SP…ソースパッド電極
P…正側電源入力端子(第2電源入力端子)
N…負側電源入力端子(第1電源入力端子)
DT…ドレイン端子(第2電源入力端子)
ST…ソース端子(第1電源入力端子)
O、U、V、W…出力端子
G、G1、G4…ゲート信号端子
S1、S4、SS…ソースセンス端子
CS、T1、T4…電流センス端子
B1、B2…サーミスタ接続端子
A1、A4…アノード電極
K1、K4…カソード電極
D、D(K1)、D(K4)…ドレイン電極パターン
EP…接地パターン
Claims (26)
- セラミック基板と、
前記セラミック基板の表面上に配置された第1銅プレート層の第1パターンと、
前記第1パターン上に配置された第1半導体デバイスと、
前記第1パターン上に配置された第1柱状接続電極と、
前記第1柱状接続電極に接続された出力端子と、
前記第1半導体デバイス上に配置された第1柱状電極と、
前記第1パターン上に前記第1半導体デバイスに隣接して配置された第1ダイオードと、
前記第1ダイオード上に配置された第3柱状電極と、
前記第1柱状電極上および前記第3柱状電極上に配置された第1上面板電極と
を備え、
前記出力端子の厚みは、前記第1半導体デバイスと、前記第1柱状電極と、前記第1上面板電極と、前記第1柱状電極を前記第1上面板電極に接合する半田層との厚みの和と略同じであることを特徴とするパワーモジュール半導体装置。 - 前記第1銅プレート層の第2パターンと、
前記第2パターン上に配置された第2柱状接続電極と、
前記第2柱状接続電極に接続された第1電源入力端子と
を備え、前記第2柱状接続電極上に前記第1上面板電極が接続されていることを特徴とする請求項1に記載のパワーモジュール半導体装置。 - 前記第1柱状接続電極は、前記第1パターン上に配置された柱状延長電極を備えることを特徴とする請求項1に記載のパワーモジュール半導体装置。
- 前記第1銅プレート層の第3パターン上に配置された第2半導体デバイスを備えることを特徴とする請求項2に記載のパワーモジュール半導体装置。
- 前記第1パターン上に前記第2半導体デバイスに隣接して配置された第2ダイオードを備えることを特徴とする請求項2に記載のパワーモジュール半導体装置。
- 前記第2半導体デバイス上に配置された第2柱状電極を備えることを特徴とする請求項4または5に記載のパワーモジュール半導体装置。
- 前記第2柱状電極上に配置され、かつ前記第2ダイオード上に配置された第4柱状電極上に配置され、前記第2柱状電極および前記第4柱状電極に接続された第2上面板電極を備えることを特徴とする請求項6に記載のパワーモジュール半導体装置。
- 前記第1上面板電極および前記第2上面板電極は、平面視で内側の角部に湾曲凹状のL字構造を有することを特徴とする請求項7に記載のパワーモジュール半導体装置。
- 前記第3パターンに接続された第2電源入力端子を備えることを特徴とする請求項8に記載のパワーモジュール半導体装置。
- 前記セラミック基板の第1辺に配置され、前記第1半導体デバイスに第1ボンディングワイヤ群を介して接続された第1信号端子群と、
前記セラミック基板の第1辺に対向する第2辺に配置され、前記第2半導体デバイスに第2ボンディングワイヤ群を介して接続された第2信号端子群と
を備え、前記第1信号端子群と前記第2信号端子群は、互い違いに配置されることを特徴とする請求項8に記載のパワーモジュール半導体装置。 - 前記第1信号端子群および前記第2信号端子群は、L字状の形状を有するとともに、前記第1電源入力端子および前記第2電源入力端子が延出する方向とは異なる方向に延出することを特徴とする請求項10に記載のパワーモジュール半導体装置。
- 前記セラミック基板の厚み方向から見た平面視で、前記第1上面板電極は、前記第1半導体デバイスから延伸した前記第1ボンディングワイヤ群の直上には覆い被さらないように配置され、前記第2上面板電極は、前記第2半導体デバイスから延伸した前記第2ボンディングワイヤ群の直上には覆い被さらないように配置されることを特徴とする請求項10または11に記載のパワーモジュール半導体装置。
- 前記第1半導体デバイス、前記第1ダイオード、前記第1上面板電極および前記第1信号端子群と、前記第2半導体デバイス、前記第2ダイオード、前記第2上面板電極および前記第2信号端子群は、前記セラミック基板の厚み方向から見た平面視で、前記セラミック基板の中心に対して点対称に配置することを特徴とする請求項12に記載のパワーモジュール半導体装置。
- 前記出力端子、前記第1電源入力端子、前記第1上面板電極および前記第2上面板電極は、面一に配置されることを特徴とする請求項7に記載のパワーモジュール半導体装置。
- 前記第1電源入力端子、前記出力端子、前記第2電源入力端子の内、少なくともいずれか1つは折り曲げたことを特徴とする請求項9に記載のパワーモジュール半導体装置。
- 前記第1信号端子群および前記第2信号端子群は、前記セラミック基板の厚み方向に折り曲げたことを特徴とする請求項10に記載のパワーモジュール半導体装置。
- 前記パワーモジュール半導体装置は、複数個並列に配置されたことを特徴とする請求項16に記載のパワーモジュール半導体装置。
- 前記セラミック基板は、Al2O3、AlN、SiN、AlSiC、若しくは少なくとも表面が絶縁性のSiCあることを特徴とする請求項1〜17のいずれか1項に記載のパワーモジュール半導体装置。
- 前記第1柱状電極および前記第2柱状電極は、CuMo若しくはCuであることを特徴とする請求項7に記載のパワーモジュール半導体装置。
- 前記第1上面板電極および前記第2上面板電極は、CuMo若しくはCuであることを特徴とする請求項7に記載のパワーモジュール半導体装置。
- 前記パワーモジュール半導体装置は、樹脂層により被覆されることを特徴とする請求項1〜20のいずれか1項に記載のパワーモジュール半導体装置。
- 前記第1半導体デバイスは、SiC系、GaN系、若しくはAlN系のいずれかのパワーデバイスであることを特徴とする請求項1〜21のいずれか1項に記載のパワーモジュール半導体装置。
- 前記第1上面板電極および前記第2上面板電極の少なくとも一方の表面には、複数の溝が形成されていることを特徴とする請求項7に記載のパワーモジュール半導体装置。
- 前記第1上面板電極および前記第2上面板電極の他方の面には、前記第1上面板電極および前記第2上面板電極から離間する方向に延設され前記樹脂層から突出する突出部が形成されていることを特徴とする請求項21に記載のパワーモジュール半導体装置。
- 前記第1柱状接続電極の厚みは、前記第1半導体デバイスと前記第1柱状電極との厚みの和と略同じであることを特徴とする請求項1に記載のパワーモジュール半導体装置。
- 前記第1ダイオードに隣接する前記第1半導体デバイスは、前記第1ダイオードから略等しく離れた位置に配置されていることを特徴とする請求項1に記載のパワーモジュール半導体装置。
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