ITMI921000A0 - Dispositivo di memoria non volatile a semiconduttori e relativo metodo di programmazione ottimizzato. - Google Patents

Dispositivo di memoria non volatile a semiconduttori e relativo metodo di programmazione ottimizzato.

Info

Publication number
ITMI921000A0
ITMI921000A0 IT92MI1000A ITMI921000A ITMI921000A0 IT MI921000 A0 ITMI921000 A0 IT MI921000A0 IT 92MI1000 A IT92MI1000 A IT 92MI1000A IT MI921000 A ITMI921000 A IT MI921000A IT MI921000 A0 ITMI921000 A0 IT MI921000A0
Authority
IT
Italy
Prior art keywords
memory device
semiconductor memory
volatile semiconductor
programming method
optimized programming
Prior art date
Application number
IT92MI1000A
Other languages
English (en)
Inventor
Jin-Ki Kim
Kang-Deog Suh
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI921000A0 publication Critical patent/ITMI921000A0/it
Publication of ITMI921000A1 publication Critical patent/ITMI921000A1/it
Application granted granted Critical
Publication of IT1255108B publication Critical patent/IT1255108B/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3486—Circuits or methods to prevent overprogramming of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate programming
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3468—Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
    • G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
    • G11C2216/14—Circuits or methods to write a page or sector of information simultaneously into a nonvolatile memory, typically a complete row or word line in flash memory
ITMI921000A 1992-02-21 1992-04-28 Dispositivo di memoria non volatile a semiconduttori e relativo metodo di programmazione ottimizzato IT1255108B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920002689A KR950000273B1 (ko) 1992-02-21 1992-02-21 불휘발성 반도체 메모리장치 및 그 최적화 기입방법

Publications (3)

Publication Number Publication Date
ITMI921000A0 true ITMI921000A0 (it) 1992-04-28
ITMI921000A1 ITMI921000A1 (it) 1993-10-28
IT1255108B IT1255108B (it) 1995-10-20

Family

ID=19329334

Family Applications (1)

Application Number Title Priority Date Filing Date
ITMI921000A IT1255108B (it) 1992-02-21 1992-04-28 Dispositivo di memoria non volatile a semiconduttori e relativo metodo di programmazione ottimizzato

Country Status (10)

Country Link
US (1) US5299162A (it)
JP (2) JP2872484B2 (it)
KR (1) KR950000273B1 (it)
CN (1) CN1032283C (it)
DE (1) DE4213731C2 (it)
FR (1) FR2687828B1 (it)
GB (1) GB2264578B (it)
IT (1) IT1255108B (it)
RU (1) RU2097842C1 (it)
TW (1) TW204415B (it)

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JP6757447B1 (ja) 2019-06-12 2020-09-16 力晶積成電子製造股▲ふん▼有限公司Ｐｏｗｅｒｃｈｉｐ Ｓｅｍｉｃｏｎｄｕｃｔｏｒ Ｍａｎｕｆａｃｔｕｒｉｎｇ Ｃｏｒｐｏｒａｔｉｏｎ フェイルビット数計数回路及び不揮発性半導体記憶装置
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GB2264578A (en) 1993-09-01
KR930018589A (ko) 1993-09-22
GB9209426D0 (en) 1992-06-17
DE4213731A1 (de) 1993-08-26
CN1032283C (zh) 1996-07-10
JPH09147582A (ja) 1997-06-06
US5299162A (en) 1994-03-29
KR950000273B1 (ko) 1995-01-12
DE4213731C2 (de) 2002-05-08
GB2264578B (en) 1996-01-03
JP2872484B2 (ja) 1999-03-17
IT1255108B (it) 1995-10-20
JP3228711B2 (ja) 2001-11-12
JPH1186577A (ja) 1999-03-30
FR2687828A1 (fr) 1993-08-27
FR2687828B1 (fr) 1994-04-29
GB2264578A8 (en) 1995-09-18
CN1075572A (zh) 1993-08-25
ITMI921000A1 (it) 1993-10-28
RU2097842C1 (ru) 1997-11-27
TW204415B (en) 1993-04-21

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