CN1337065A - 半导体器件及其制造方法 - Google Patents
半导体器件及其制造方法 Download PDFInfo
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- CN1337065A CN1337065A CN00802618A CN00802618A CN1337065A CN 1337065 A CN1337065 A CN 1337065A CN 00802618 A CN00802618 A CN 00802618A CN 00802618 A CN00802618 A CN 00802618A CN 1337065 A CN1337065 A CN 1337065A
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- 238000000034 method Methods 0.000 title claims description 24
- 238000005520 cutting process Methods 0.000 claims description 21
- 238000004519 manufacturing process Methods 0.000 claims description 13
- 238000007789 sealing Methods 0.000 claims description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 abstract description 56
- 239000010703 silicon Substances 0.000 abstract description 56
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 45
- 239000000758 substrate Substances 0.000 abstract description 10
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- 238000003199 nucleic acid amplification method Methods 0.000 description 20
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- 238000004299 exfoliation Methods 0.000 description 2
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- 238000007254 oxidation reaction Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- 239000011265 semifinished product Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000000853 adhesive Substances 0.000 description 1
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- 230000003064 anti-oxidating effect Effects 0.000 description 1
- 238000002507 cathodic stripping potentiometry Methods 0.000 description 1
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- 239000011347 resin Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004381 surface treatment Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/568—Temporary substrate used as encapsulation process aid
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68363—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving transfer directly from an origin substrate to a target substrate without use of an intermediate handle substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/023—Redistribution layers [RDL] for bonding areas
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/93—Batch processes
- H01L2224/94—Batch processes at wafer-level, i.e. with connecting carried out on a wafer comprising a plurality of undiced individual devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01057—Lanthanum [La]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Dicing (AREA)
- Pressure Sensors (AREA)
- Wire Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
Claims (16)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP321416/1999 | 1999-11-11 | ||
JP32141699A JP3455762B2 (ja) | 1999-11-11 | 1999-11-11 | 半導体装置およびその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1337065A true CN1337065A (zh) | 2002-02-20 |
CN1206726C CN1206726C (zh) | 2005-06-15 |
Family
ID=18132313
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB008026181A Expired - Lifetime CN1206726C (zh) | 1999-11-11 | 2000-10-31 | 半导体器件的制造方法 |
Country Status (9)
Country | Link |
---|---|
US (1) | US6607970B1 (zh) |
EP (1) | EP1145310A1 (zh) |
JP (1) | JP3455762B2 (zh) |
KR (1) | KR100434974B1 (zh) |
CN (1) | CN1206726C (zh) |
AU (1) | AU7964700A (zh) |
CA (1) | CA2356938C (zh) |
TW (1) | TW484194B (zh) |
WO (1) | WO2001035461A1 (zh) |
Cited By (13)
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CN100365799C (zh) * | 2004-07-12 | 2008-01-30 | 精工爱普生株式会社 | 切割薄片及其制造方法、半导体装置的制造方法 |
CN100416768C (zh) * | 2002-09-11 | 2008-09-03 | 飞思卡尔半导体公司 | 晶片涂敷和分切方法 |
CN101569010B (zh) * | 2007-09-21 | 2011-04-27 | 卡西欧计算机株式会社 | 具有低介电性绝缘膜的半导体器件及其制造方法 |
CN102403236A (zh) * | 2010-09-07 | 2012-04-04 | 万国半导体(开曼)股份有限公司 | 芯片外露的半导体器件及其生产方法 |
CN102709198A (zh) * | 2011-03-28 | 2012-10-03 | 华东科技股份有限公司 | 防止基板周边外露的模封阵列处理方法 |
CN102176433B (zh) * | 2006-05-19 | 2013-03-20 | 兆装微股份有限公司 | 具有低介电性绝缘膜的半导体器件及其制造方法 |
CN104658925A (zh) * | 2015-03-02 | 2015-05-27 | 山东盛品电子技术有限公司 | 一种封装管壳产品在切单后避免型腔清洗的方法 |
CN105374783A (zh) * | 2014-08-15 | 2016-03-02 | 美国博通公司 | 半导体边界保护密封剂 |
CN105895583A (zh) * | 2015-02-13 | 2016-08-24 | 台湾积体电路制造股份有限公司 | 半导体器件和方法 |
CN106415817A (zh) * | 2014-05-28 | 2017-02-15 | ams有限公司 | 用于晶片级封装的切割方法和具有适于晶片级封装的切割结构的半导体芯片 |
CN107611091A (zh) * | 2017-10-13 | 2018-01-19 | 中芯长电半导体(江阴)有限公司 | 晶圆级芯片封装结构及其制备方法 |
CN110098131A (zh) * | 2019-04-18 | 2019-08-06 | 电子科技大学 | 一种功率mos型器件与集成电路晶圆级重构封装方法 |
CN112530816A (zh) * | 2019-09-17 | 2021-03-19 | 铠侠股份有限公司 | 半导体装置的制造方法 |
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US6506681B2 (en) * | 2000-12-06 | 2003-01-14 | Micron Technology, Inc. | Thin flip—chip method |
JP2002373958A (ja) * | 2001-06-15 | 2002-12-26 | Casio Micronics Co Ltd | 半導体チップの実装構造及び半導体チップの実装方法 |
US6686225B2 (en) * | 2001-07-27 | 2004-02-03 | Texas Instruments Incorporated | Method of separating semiconductor dies from a wafer |
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US6818475B2 (en) * | 2001-10-22 | 2004-11-16 | Wen-Kun Yang | Wafer level package and the process of the same |
JP3706573B2 (ja) * | 2001-11-22 | 2005-10-12 | 株式会社ルネサステクノロジ | 半導体パッケージ及び半導体パッケージの製造方法 |
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US6908784B1 (en) * | 2002-03-06 | 2005-06-21 | Micron Technology, Inc. | Method for fabricating encapsulated semiconductor components |
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US6881610B2 (en) * | 2003-01-02 | 2005-04-19 | Intel Corporation | Method and apparatus for preparing a plurality of dice in wafers |
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JP3830497B2 (ja) * | 2004-06-11 | 2006-10-04 | シャープ株式会社 | 半導体ウエハの製造方法及び半導体装置の製造方法 |
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-
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- 2000-10-31 AU AU79647/00A patent/AU7964700A/en not_active Abandoned
- 2000-10-31 EP EP00970234A patent/EP1145310A1/en not_active Withdrawn
- 2000-10-31 WO PCT/JP2000/007659 patent/WO2001035461A1/en not_active Application Discontinuation
- 2000-10-31 CA CA002356938A patent/CA2356938C/en not_active Expired - Fee Related
- 2000-10-31 KR KR10-2001-7008239A patent/KR100434974B1/ko not_active IP Right Cessation
- 2000-11-01 US US09/704,156 patent/US6607970B1/en not_active Expired - Lifetime
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Also Published As
Publication number | Publication date |
---|---|
JP3455762B2 (ja) | 2003-10-14 |
CN1206726C (zh) | 2005-06-15 |
JP2001144121A (ja) | 2001-05-25 |
AU7964700A (en) | 2001-06-06 |
CA2356938C (en) | 2006-03-21 |
CA2356938A1 (en) | 2001-05-17 |
KR20010089726A (ko) | 2001-10-08 |
WO2001035461A1 (en) | 2001-05-17 |
US6607970B1 (en) | 2003-08-19 |
KR100434974B1 (ko) | 2004-06-09 |
EP1145310A1 (en) | 2001-10-17 |
TW484194B (en) | 2002-04-21 |
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