JP6636377B2 - パッケージウェーハの製造方法及びデバイスチップの製造方法 - Google Patents
パッケージウェーハの製造方法及びデバイスチップの製造方法 Download PDFInfo
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- JP6636377B2 JP6636377B2 JP2016077833A JP2016077833A JP6636377B2 JP 6636377 B2 JP6636377 B2 JP 6636377B2 JP 2016077833 A JP2016077833 A JP 2016077833A JP 2016077833 A JP2016077833 A JP 2016077833A JP 6636377 B2 JP6636377 B2 JP 6636377B2
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- 238000004519 manufacturing process Methods 0.000 title claims description 32
- 239000011347 resin Substances 0.000 claims description 87
- 229920005989 resin Polymers 0.000 claims description 87
- 230000002093 peripheral effect Effects 0.000 claims description 54
- 238000000465 moulding Methods 0.000 claims description 13
- 238000000034 method Methods 0.000 claims description 12
- 238000004806 packaging method and process Methods 0.000 description 8
- 230000000052 comparative effect Effects 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 5
- 230000001681 protective effect Effects 0.000 description 4
- 238000005498 polishing Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000009966 trimming Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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- H—ELECTRICITY
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B28—WORKING CEMENT, CLAY, OR STONE
- B28D—WORKING STONE OR STONE-LIKE MATERIALS
- B28D5/00—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor
- B28D5/04—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by tools other than rotary type, e.g. reciprocating tools
- B28D5/042—Fine working of gems, jewels, crystals, e.g. of semiconductor material; apparatus or devices therefor by tools other than rotary type, e.g. reciprocating tools by cutting with blades or wires mounted in a reciprocating frame
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/561—Batch processing
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/565—Moulds
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67126—Apparatus for sealing, encapsulating, glassing, decapsulating or the like
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/6715—Apparatus for applying a liquid, a resin, an ink or the like
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/782—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, each consisting of a single circuit element
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3178—Coating or filling in grooves made in the semiconductor body
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Mechanical Engineering (AREA)
- Dicing (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Description
12 溝
13 段部
14 段部底面
15 外周切削溝
16 デバイス領域の凸状部分
18 金型とウェーハの間の空間
19 切削溝
36 金型
A1 デバイス領域
A2 外周余剰領域
D デバイス
L 分割予定ライン
M モールド樹脂
PW パッケージウェーハ
W ウェーハ
Claims (3)
- 格子状の分割予定ラインによって区画され表面にバンプを備えたデバイスが形成されたデバイス領域と外周側面に形成された面取り部とを備えるウェーハの表面側から該分割予定ラインに沿って仕上げ厚さ以上の深さの溝を形成する溝形成ステップと、
該面取り部に切削ブレードを該溝よりも深く切り込み、該面取り部を除去する面取り部除去ステップと、
該溝形成ステップ及び該面取り部除去ステップを実施した後に、該面取り部除去後の凸形状のデバイス領域に係合する凹形状の成形装置の金型を、デバイス領域の表面と空間をもって且つ該面取り部を除去した段部底面に当接させ係合させて載置し、該金型と該デバイス領域の表面との該空間内にモールド樹脂を充填するモールド樹脂充填ステップと、を備え、
該デバイス領域の表面にモールド樹脂が被覆され該溝にモールド樹脂が埋設されたパッケージウェーハを製造するパッケージウェーハの製造方法。 - 該面取り部除去ステップを実施する前又は後に、該面取り部を除去した段部底面上における少なくとも一つの該分割予定ラインの延長線上の外周両端に切削ブレードで切り込み外周切削溝を形成する外周切削溝形成ステップを備え、
該外周切削溝形成ステップ後のステップにおいて該外周切削溝で位置合わせを行うこと、を特徴とする請求項1記載のパッケージウェーハの製造方法。 - 請求項2記載のパッケージウェーハの製造方法により製造されたパッケージウェーハの該外周切削溝を基準に位置合わせを行い、切削ブレードにて該分割予定ラインに沿ってパッケージウェーハ表面側から仕上げ厚さよりも深く切り込み、該モールド樹脂が充填された該溝の中心に切削溝を形成する切削溝形成ステップと、
該切削溝形成ステップを実施した後に、パッケージウェーハ裏面を該仕上げ厚さまで研削して該切削溝を表出させ、パッケージウェーハを該モールド樹脂によって囲繞された外周を有する個々のデバイスチップに分割する分割ステップと、を含むデバイスチップの製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016077833A JP6636377B2 (ja) | 2016-04-08 | 2016-04-08 | パッケージウェーハの製造方法及びデバイスチップの製造方法 |
TW106106381A TWI708289B (zh) | 2016-04-08 | 2017-02-24 | 封裝晶圓的製造方法及元件晶片的製造方法 |
KR1020170039974A KR102254618B1 (ko) | 2016-04-08 | 2017-03-29 | 패키지 웨이퍼의 제조 방법 및 디바이스 칩의 제조 방법 |
CN201710217141.2A CN107275234B (zh) | 2016-04-08 | 2017-04-05 | 封装晶片的制造方法和器件芯片的制造方法 |
US15/481,709 US9892986B2 (en) | 2016-04-08 | 2017-04-07 | Packaged wafer manufacturing method and device chip manufacturing method |
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JP2016077833A JP6636377B2 (ja) | 2016-04-08 | 2016-04-08 | パッケージウェーハの製造方法及びデバイスチップの製造方法 |
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JP2017188610A JP2017188610A (ja) | 2017-10-12 |
JP6636377B2 true JP6636377B2 (ja) | 2020-01-29 |
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US (1) | US9892986B2 (ja) |
JP (1) | JP6636377B2 (ja) |
KR (1) | KR102254618B1 (ja) |
CN (1) | CN107275234B (ja) |
TW (1) | TWI708289B (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
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US10861761B2 (en) * | 2017-09-29 | 2020-12-08 | Taiwan Semiconductor Manufacturing Company Ltd. | Semiconductor packaged wafer and method for forming the same |
KR102072994B1 (ko) | 2017-12-06 | 2020-02-04 | 엘비세미콘 주식회사 | 사이드 몰딩을 이용한 반도체 패키지의 제조방법 |
JP7187115B2 (ja) * | 2018-12-04 | 2022-12-12 | 株式会社ディスコ | ウェーハの加工方法 |
CN111477563B (zh) * | 2019-01-24 | 2022-04-22 | 中国电子科技集团公司第二十四研究所 | 用于半导体器件熔封的对位工装 |
JP2020181876A (ja) * | 2019-04-24 | 2020-11-05 | 株式会社ディスコ | デバイスパッケージの製造方法 |
JP7334063B2 (ja) * | 2019-05-24 | 2023-08-28 | 株式会社ディスコ | モールドチップの製造方法 |
CN110223909B (zh) * | 2019-05-29 | 2024-03-26 | 浙江荷清柔性电子技术有限公司 | 一种晶圆边缘处理方法及晶圆组件 |
US12100686B2 (en) * | 2020-10-30 | 2024-09-24 | Advanced Semiconductor Engineering, Inc. | Method for manufacturing semiconductor package structure and semiconductor manufacturing apparatus |
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- 2017-04-05 CN CN201710217141.2A patent/CN107275234B/zh active Active
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Publication number | Publication date |
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CN107275234A (zh) | 2017-10-20 |
CN107275234B (zh) | 2022-01-28 |
KR102254618B1 (ko) | 2021-05-20 |
KR20170115950A (ko) | 2017-10-18 |
TWI708289B (zh) | 2020-10-21 |
JP2017188610A (ja) | 2017-10-12 |
US20170294364A1 (en) | 2017-10-12 |
TW201737367A (zh) | 2017-10-16 |
US9892986B2 (en) | 2018-02-13 |
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