CN102543767B - 一种在晶圆级封装的塑封工序中避免晶圆破损的方法 - Google Patents
一种在晶圆级封装的塑封工序中避免晶圆破损的方法 Download PDFInfo
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Abstract
Description
Claims (9)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
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CN201010590130.7A CN102543767B (zh) | 2010-12-07 | 2010-12-07 | 一种在晶圆级封装的塑封工序中避免晶圆破损的方法 |
US13/045,522 US20120142165A1 (en) | 2010-12-07 | 2011-03-10 | Method of Avoiding Resin Outflow from the Wafer Scribe line in WLCSP |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN201010590130.7A CN102543767B (zh) | 2010-12-07 | 2010-12-07 | 一种在晶圆级封装的塑封工序中避免晶圆破损的方法 |
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CN102543767A CN102543767A (zh) | 2012-07-04 |
CN102543767B true CN102543767B (zh) | 2015-04-08 |
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CN201010590130.7A Active CN102543767B (zh) | 2010-12-07 | 2010-12-07 | 一种在晶圆级封装的塑封工序中避免晶圆破损的方法 |
Country Status (2)
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US (1) | US20120142165A1 (zh) |
CN (1) | CN102543767B (zh) |
Families Citing this family (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9064770B2 (en) * | 2012-07-17 | 2015-06-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods for minimizing edge peeling in the manufacturing of BSI chips |
KR102084540B1 (ko) | 2013-10-16 | 2020-03-04 | 삼성전자주식회사 | 반도체 패키지 및 그 제조방법 |
US9508623B2 (en) | 2014-06-08 | 2016-11-29 | UTAC Headquarters Pte. Ltd. | Semiconductor packages and methods of packaging semiconductor devices |
US20150371956A1 (en) * | 2014-06-19 | 2015-12-24 | Globalfoundries Inc. | Crackstops for bulk semiconductor wafers |
US9847317B2 (en) * | 2014-07-08 | 2017-12-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Methods of packaging semiconductor devices and packaged semiconductor devices |
CN105984837A (zh) * | 2015-02-17 | 2016-10-05 | 中芯国际集成电路制造(上海)有限公司 | 堆叠结构的晶圆及其减薄方法 |
CN105070665A (zh) * | 2015-07-16 | 2015-11-18 | 北京工业大学 | 一种晶圆级薄片封装工艺 |
KR20180118656A (ko) | 2016-03-01 | 2018-10-31 | 인피니언 테크놀로지스 아게 | 복합 웨이퍼, 반도체 디바이스, 전자 컴포넌트 및 반도체 디바이스의 제조 방법 |
JP6598723B2 (ja) * | 2016-04-06 | 2019-10-30 | 株式会社ディスコ | パッケージウェーハの製造方法 |
JP6636377B2 (ja) * | 2016-04-08 | 2020-01-29 | 株式会社ディスコ | パッケージウェーハの製造方法及びデバイスチップの製造方法 |
DE102016109693B4 (de) | 2016-05-25 | 2022-10-27 | Infineon Technologies Ag | Verfahren zum Trennen von Halbleiterdies von einem Halbleitersubstrat und Halbleitersubstratanordnung |
JP6512454B2 (ja) * | 2016-12-06 | 2019-05-15 | パナソニックIpマネジメント株式会社 | 素子チップの製造方法 |
US10529671B2 (en) | 2016-12-13 | 2020-01-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package structure and method for forming the same |
US10522440B2 (en) * | 2017-11-07 | 2019-12-31 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package structure and method of manufacturing the same |
CN109830445B (zh) * | 2019-01-02 | 2021-04-13 | 长江存储科技有限责任公司 | 一种芯片制备方法以及芯片结构 |
CN110246814B (zh) * | 2019-05-30 | 2021-07-06 | 全球能源互联网研究院有限公司 | 功率芯片预封装、封装方法及其结构、晶圆预封装结构 |
US11367657B2 (en) * | 2019-08-01 | 2022-06-21 | Semiconductor Components Industries, Llc | Process of forming an electronic device including a polymer support layer |
CN111312600A (zh) * | 2020-02-26 | 2020-06-19 | 南通通富微电子有限公司 | 一种扇出型封装方法、扇出型封装器件及扇出型封装体 |
CN111312598B (zh) * | 2020-02-26 | 2022-10-28 | 南通通富微电子有限公司 | 一种扇出型封装方法、扇出型封装器件及扇出型封装体 |
CN111446158B (zh) * | 2020-03-05 | 2023-02-03 | 绍兴同芯成集成电路有限公司 | 一种晶圆背面切割后金属沉积工艺 |
CN111446162B (zh) * | 2020-03-11 | 2023-02-24 | 绍兴同芯成集成电路有限公司 | 一种正面切割两次减薄的晶粒生产方法 |
CN112992655B (zh) * | 2021-02-05 | 2022-08-16 | 华虹半导体(无锡)有限公司 | 控制Taiko晶圆断差的方法 |
CN112959211B (zh) * | 2021-02-22 | 2021-12-31 | 长江存储科技有限责任公司 | 晶圆处理装置和处理方法 |
DE102021211642A1 (de) * | 2021-10-14 | 2023-04-20 | Robert Bosch Gesellschaft mit beschränkter Haftung | Leistungshalbleiter, Mold-Modul und Verfahren |
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JP3455762B2 (ja) * | 1999-11-11 | 2003-10-14 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
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JP4750523B2 (ja) * | 2005-09-27 | 2011-08-17 | Okiセミコンダクタ株式会社 | 半導体装置の製造方法 |
TWI313050B (en) * | 2006-10-18 | 2009-08-01 | Advanced Semiconductor Eng | Semiconductor chip package manufacturing method and structure thereof |
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- 2010-12-07 CN CN201010590130.7A patent/CN102543767B/zh active Active
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2011
- 2011-03-10 US US13/045,522 patent/US20120142165A1/en not_active Abandoned
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US6107164A (en) * | 1998-08-18 | 2000-08-22 | Oki Electric Industry Co., Ltd. | Using grooves as alignment marks when dicing an encapsulated semiconductor wafer |
CN101127311A (zh) * | 2006-08-16 | 2008-02-20 | 台湾积体电路制造股份有限公司 | 半导体装置的制造方法 |
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