CN1195324C - 半导体集成电路 - Google Patents
半导体集成电路 Download PDFInfo
- Publication number
- CN1195324C CN1195324C CNB988126702A CN98812670A CN1195324C CN 1195324 C CN1195324 C CN 1195324C CN B988126702 A CNB988126702 A CN B988126702A CN 98812670 A CN98812670 A CN 98812670A CN 1195324 C CN1195324 C CN 1195324C
- Authority
- CN
- China
- Prior art keywords
- power supply
- circuit
- voltage
- semiconductor integrated
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/145—Applications of charge pumps; Boosted voltage circuits; Clamp circuits therefor
- G11C5/146—Substrate bias generators
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/14—Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
- G11C5/147—Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
- H03K19/0016—Arrangements for reducing power consumption by using a control or a clock signal, e.g. in order to apply power supply
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/859—Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/903—Masterslice integrated circuits comprising field effect technology
- H10D84/907—CMOS gate arrays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP359271/1997 | 1997-12-26 | ||
| JP35927197A JP4109340B2 (ja) | 1997-12-26 | 1997-12-26 | 半導体集積回路装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1283308A CN1283308A (zh) | 2001-02-07 |
| CN1195324C true CN1195324C (zh) | 2005-03-30 |
Family
ID=18463648
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB988126702A Expired - Fee Related CN1195324C (zh) | 1997-12-26 | 1998-12-21 | 半导体集成电路 |
Country Status (9)
| Country | Link |
|---|---|
| US (8) | US6483374B1 (enExample) |
| EP (1) | EP1043774B1 (enExample) |
| JP (1) | JP4109340B2 (enExample) |
| KR (1) | KR100625153B1 (enExample) |
| CN (1) | CN1195324C (enExample) |
| DE (1) | DE69824972T2 (enExample) |
| MY (1) | MY118314A (enExample) |
| TW (1) | TW426988B (enExample) |
| WO (1) | WO1999034445A1 (enExample) |
Families Citing this family (91)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
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| JP2002313937A (ja) * | 2001-04-16 | 2002-10-25 | Sony Corp | 集積回路装置 |
| US7941675B2 (en) * | 2002-12-31 | 2011-05-10 | Burr James B | Adaptive power control |
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| JP4401621B2 (ja) * | 2002-05-07 | 2010-01-20 | 株式会社日立製作所 | 半導体集積回路装置 |
| US6933744B2 (en) * | 2002-06-11 | 2005-08-23 | The Regents Of The University Of Michigan | Low-leakage integrated circuits and dynamic logic circuits |
| US6864539B2 (en) * | 2002-07-19 | 2005-03-08 | Semiconductor Technology Academic Research Center | Semiconductor integrated circuit device having body biasing circuit for generating forward well bias voltage of suitable level by using simple circuitry |
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| US7228242B2 (en) | 2002-12-31 | 2007-06-05 | Transmeta Corporation | Adaptive power control based on pre package characterization of integrated circuits |
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| JP4708716B2 (ja) * | 2003-02-27 | 2011-06-22 | ルネサスエレクトロニクス株式会社 | 半導体集積回路装置、半導体集積回路装置の設計方法 |
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| JP2005109179A (ja) * | 2003-09-30 | 2005-04-21 | National Institute Of Advanced Industrial & Technology | 高速低消費電力論理装置 |
| US7692477B1 (en) | 2003-12-23 | 2010-04-06 | Tien-Min Chen | Precise control component for a substrate potential regulation circuit |
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| DE69530773D1 (de) * | 1995-10-30 | 2003-06-18 | St Microelectronics Srl | Interface-Schaltung zum Steuern von elektronischen Schaltern mit Signalen erhöhter Spannung |
| EP0772282B1 (en) * | 1995-10-31 | 2000-03-15 | STMicroelectronics S.r.l. | Negative charge pump circuit for electrically erasable semiconductor memory devices |
| KR970028938A (ko) * | 1995-11-28 | 1997-06-26 | 김광호 | 외부 리셋 회로를 구비한 모뎀 장치 |
| JPH09293789A (ja) * | 1996-04-24 | 1997-11-11 | Mitsubishi Electric Corp | 半導体集積回路 |
| KR100223770B1 (ko) * | 1996-06-29 | 1999-10-15 | 김영환 | 반도체 장치의 문턱전압 제어회로 |
| US5786724A (en) * | 1996-12-17 | 1998-07-28 | Texas Instruments Incorporated | Control of body effect in MOS transistors by switching source-to-body bias |
| JP3732914B2 (ja) * | 1997-02-28 | 2006-01-11 | 株式会社ルネサステクノロジ | 半導体装置 |
| KR100273208B1 (ko) * | 1997-04-02 | 2000-12-15 | 김영환 | 반도체메모리장치의고효율전하펌프회로 |
| JP3814385B2 (ja) * | 1997-10-14 | 2006-08-30 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| JP4109340B2 (ja) * | 1997-12-26 | 2008-07-02 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| US6191615B1 (en) * | 1998-03-30 | 2001-02-20 | Nec Corporation | Logic circuit having reduced power consumption |
| JP4390304B2 (ja) * | 1998-05-26 | 2009-12-24 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| TW453032B (en) * | 1998-09-09 | 2001-09-01 | Hitachi Ltd | Semiconductor integrated circuit apparatus |
| US6198340B1 (en) * | 1999-02-08 | 2001-03-06 | Etron Technology, Inc. | High efficiency CMOS pump circuit |
-
1997
- 1997-12-26 JP JP35927197A patent/JP4109340B2/ja not_active Expired - Lifetime
-
1998
- 1998-12-09 TW TW087120452A patent/TW426988B/zh not_active IP Right Cessation
- 1998-12-19 MY MYPI98005761A patent/MY118314A/en unknown
- 1998-12-21 DE DE69824972T patent/DE69824972T2/de not_active Expired - Lifetime
- 1998-12-21 WO PCT/JP1998/005770 patent/WO1999034445A1/ja not_active Ceased
- 1998-12-21 CN CNB988126702A patent/CN1195324C/zh not_active Expired - Fee Related
- 1998-12-21 US US09/582,485 patent/US6483374B1/en not_active Expired - Lifetime
- 1998-12-21 EP EP98961441A patent/EP1043774B1/en not_active Expired - Lifetime
- 1998-12-21 KR KR1020007007127A patent/KR100625153B1/ko not_active Expired - Fee Related
-
2000
- 2000-01-27 US US09/492,506 patent/US6337593B1/en not_active Expired - Lifetime
-
2002
- 2002-09-20 US US10/247,525 patent/US6600360B2/en not_active Expired - Lifetime
-
2003
- 2003-05-22 US US10/443,018 patent/US6707334B2/en not_active Expired - Lifetime
-
2004
- 2004-01-29 US US10/765,923 patent/US6987415B2/en not_active Expired - Lifetime
-
2005
- 2005-06-06 US US11/144,695 patent/US7046075B2/en not_active Expired - Lifetime
-
2006
- 2006-04-04 US US11/396,543 patent/US7321252B2/en not_active Expired - Fee Related
-
2007
- 2007-11-27 US US11/987,073 patent/US7598796B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US20030016076A1 (en) | 2003-01-23 |
| EP1043774A4 (en) | 2002-01-02 |
| US20050218965A1 (en) | 2005-10-06 |
| US6337593B1 (en) | 2002-01-08 |
| DE69824972T2 (de) | 2005-07-14 |
| US7321252B2 (en) | 2008-01-22 |
| US20060176101A1 (en) | 2006-08-10 |
| US6987415B2 (en) | 2006-01-17 |
| CN1283308A (zh) | 2001-02-07 |
| US6707334B2 (en) | 2004-03-16 |
| EP1043774A1 (en) | 2000-10-11 |
| KR20010033614A (ko) | 2001-04-25 |
| JP4109340B2 (ja) | 2008-07-02 |
| US6600360B2 (en) | 2003-07-29 |
| US20080136502A1 (en) | 2008-06-12 |
| JPH11191611A (ja) | 1999-07-13 |
| TW426988B (en) | 2001-03-21 |
| MY118314A (en) | 2004-09-30 |
| US7046075B2 (en) | 2006-05-16 |
| EP1043774B1 (en) | 2004-07-07 |
| US20040183585A1 (en) | 2004-09-23 |
| US6483374B1 (en) | 2002-11-19 |
| KR100625153B1 (ko) | 2006-09-20 |
| US20030206049A1 (en) | 2003-11-06 |
| WO1999034445A1 (fr) | 1999-07-08 |
| US7598796B2 (en) | 2009-10-06 |
| DE69824972D1 (de) | 2004-08-12 |
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