CN110537253B - 带有具有用于上部封装的激光钻孔的开口的模制基底的堆叠电路封装 - Google Patents

带有具有用于上部封装的激光钻孔的开口的模制基底的堆叠电路封装 Download PDF

Info

Publication number
CN110537253B
CN110537253B CN201980000486.XA CN201980000486A CN110537253B CN 110537253 B CN110537253 B CN 110537253B CN 201980000486 A CN201980000486 A CN 201980000486A CN 110537253 B CN110537253 B CN 110537253B
Authority
CN
China
Prior art keywords
substrate
package
top surface
circuit
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201980000486.XA
Other languages
English (en)
Other versions
CN110537253A (zh
Inventor
约翰·D·布拉兹尔
弗雷德里克·E·贝维尔
大卫·R·Ng
迈克尔·J·安德森
应玉成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Analog Equipment International Co ltd
Original Assignee
Analog Devices International ULC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Analog Devices International ULC filed Critical Analog Devices International ULC
Publication of CN110537253A publication Critical patent/CN110537253A/zh
Application granted granted Critical
Publication of CN110537253B publication Critical patent/CN110537253B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/28—Coils; Windings; Conductive connections
    • H01F27/29—Terminals; Tapping arrangements for signal inductances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Dc-Dc Converters (AREA)

Abstract

描述了堆叠的封装配置，包括底部封装和上部封装。底部封装包括基板，该基板具有带有第一电路的顶部表面以及金属第一焊盘。然后在基板上方形成模制层。然后通过模制层的孔经过激光钻孔以暴露第一焊盘。孔和第一焊盘与上部封装的引线对齐，后者包含更多的电路组件。然后用焊膏部分填充孔。在模制层和上部封装之间施加热环氧树脂。然后将上部封装的引线插入孔中，并将焊膏回流以电、热和机械连接上部封装到底部封装。回流热还可以固化环氧树脂。然后在基板的底部形成球栅阵列。

Description

带有具有用于上部封装的激光钻孔的开口的模制基底的堆叠 电路封装
相关申请的交叉引用
本申请基于并要求2018年3月27日由John D.Brazzle等人提交的美国临时专利申请序列号62/648,835的优先权，该申请通过引用结合在此。
技术领域
本发明涉及电子元件的包装，尤其涉及一种具有基础封装和互连的上部封装的叠层封装结构。
背景技术
通常在具有标准化端子配置的单个密封封装中提供集成电路或由分立元件形成的电路(例如，球栅阵列、直列引脚、表面安装引线等)。然后通常将封装的端子与其他封装和组件一起焊接到印刷电路板上。
封装设计中的相关因素包括尺寸、端子数、散热、电流/电压要求以及电/磁干扰问题。
为了减小电气系统的尺寸，已知将封装堆叠在彼此之上，其中底部封装包括底部端子，用于焊接到印刷电路板，以及顶部端子用于焊接到上部的端子封装。底部封装具有通孔，从其顶部端子通向内部电路或底部封装的底部端子。这也称为三维封装。
对于某些应用，例如高功率应用，堆叠封装需要更坚固的结构。对于诸如20A-100A开关电压调节器之类的高功率应用，希望提供非常低阻抗的电流路径以最小化热量和电压降，以及提供到空气和金属芯印刷电路板的良好热路径。此外，某些元件，如电感器和变压器，应与其他电路分开，以尽量减少磁耦合和噪声。
因此，需要一种更坚固的封装，其解决了传统堆叠封装技术的一些现有问题。
发明概述
在本发明的一个实施方案中，电路由包括在底部封装和上部封装中的部件形成。底部封装可包括用于高功率开关电压调节器的开关晶体管和控制电路。底部封装包括在其顶部表面电路上具有用于互连电路的金属迹线的基板，以及连接到电路的金属焊盘。金属焊盘与上部封装的引线对齐。底部封装的底部表面可包括用于焊接到传统金属芯印刷电路板的球栅阵列。
然后用模制的热塑料封装底部封装上的电路，以形成具有顶部平面表面的矩形封装。
然后控制编程的激光器以在模制塑料中钻出开口，该开口向下延伸到基板上的金属焊盘。然后用焊料、焊膏或其他导电材料部分填充孔。激光不仅可以钻孔，还可以清洁基板上的金属焊盘。
接下来，上部封装，例如包含用于开关调节器的相对大的平滑电感器，定位在底部封装上方。上部封装具有底部端子，例如支柱或钉头型引线，其延伸穿过孔并电接触通过孔暴露的焊盘。
优选地，在上部封装的引线的端部与形成在底部封装的基板上的刚性金属焊盘之间存在小的间隙，因此上部封装可以根据需要倾斜，以具有顶部平坦表面，无论上部封装的引线的非平面性如何，都与底部封装的底部表面精确平行。这确保了上部封装的顶部将与印刷电路板上的其他上部封装的顶部共面，例如用于使单个散热器与平坦表面接触。间隙预先填充有焊膏、焊料或其他合适的导电材料，其在回流期间熔化并允许上部封装的顶部倾斜以与底部封装的底部精确平行。
然后对堆叠结构进行回流以熔化并固化任何焊膏、焊料或其他导电材料，使得上部封装与底部封装电连接、热连接和机械连接。上部封装也可以使用热环氧树脂环氧化到底部封装的顶部，热环氧树脂在回流期间固化。
然后可以在底部封装的底部形成用于球栅阵列的焊料球并回流。上部封装和底部封装之间的固化环氧树脂确保上部封装在球栅阵列回流期间不会改变其位置。
如果上部封装是用于开关稳压器的平滑电感器，并且底部封装包含开关稳压器电路的其余部分，则电感器和金属芯印刷电路板之间将具有极好的热传递，因为电感器的引线是直接连接到底部封装基板上的金属焊盘。而且，电感器与其余电路垂直分离，并且可以与底部电路磁隔离。
尽管在该示例中已经使用了具有电感器的规则切换，但是该技术可以用于形成任何其他电路。例如，上部封装可以包括变压器。
上部封装不需要是电气元件。上部器件可以是具有坚固突片的金属散热器，所述突片延伸穿过底部封装中的孔并且与底部封装的基板上的金属焊盘热接触。上部器件还可以提供RF屏蔽，例如作为接地板，或提供任何其他功能。
可以在分割封装之前同时形成堆叠封装的阵列，例如通过锯切。
附图简述
图1是基板的横截面透视图，其中电路安装在基板的顶部上，并且导电的通孔与基板的底部焊盘电接触。还示出了在基板顶部上的相对大的金属焊盘，其将与上部封装的引线接触。
图2示出了在热塑料模制在基板顶部上以封装电路并提供平面顶部表面之后的图1的基板。
图3示出了热塑料中的编程激光钻孔，以暴露基板上的焊盘。
图4示出了封装的底部，示出了用于焊接到印刷电路板的球栅阵列配置。
图5示出了一种类型的上部封装，其金属支柱穿过底部封装中的孔插入，以电接触形成在基板上的焊盘。
图6示出了图5的上部封装以及透明底部封装。
图7示出了图6的替代方案，其中多余的焊料或其他导电材料沉积在孔中并且在熔化时芯吸柱以实现稳固的电连接。
图8示出了完整的堆叠封装，其中上部封装使用围绕上部封装的周边的钉头型引线，并且其中钉头型引线插入底部封装中的激光钻孔槽中并且在底部封装电接触基板上的金属焊盘。
图9示出了具有透明底部封装的图8的堆叠封装。
图10示出了安装在单个底部封装上的多个上部封装，其中所有上部封装的顶部是共面的。
图11示出了金属散热器，其具有插入底部封装中的孔的突片，所述突片热连接到底部封装的基板上的金属焊盘。
发明详述
尽管堆叠封装可以用于任何类型的电路，但是将提供具有堆叠变压器或电感器的高功率开关调节器的示例。由于所描述的特定设计，调节器可以向负载提供高达100A的输出电流。
图1是用于底部封装的起始基板10的横截面图。基板10可以是传统的印刷电路板材料或模制的热塑料。在一个实施例中，基板10的厚度约为0.3mm。基板10具有导电通孔12，导电通孔12可以与基板10的表面顶部上的金属迹线接触，该金属迹线互连电路元件14。元件14可以包括集成电路和分立元件。通孔12终止于底部金属焊盘中，例如用于球栅阵列。
还示出了相对大的顶部焊盘16，其与上部封装的引线对准。一些通孔12可以终止于顶部焊盘16。焊盘16可以互连到基板10上的其他电路。通孔12可以用于将热量从上部封装传导到金属芯印刷电路板。一些通孔12可以连接在一起用于并联传导路径。
在该示例中，电路形成开关晶体管和用于开关电压调节器的控制电路。
图2示出了在基板10上模制以封装电路的热塑料18。塑料18的顶部是平面的。塑料18是非常好的导热体并且是电介质。
在图3中，编程激光器20烧蚀塑料18中的孔21(任何形状)以暴露基板10上的焊盘16。在一个实施例中，焊盘16形成为具有焊料层以便更好地芯吸到上部封装的金属引线。激光钻孔自动停在焊料/焊盘表面，可以清洁表面。所得到的结构是用于堆叠封装结构的底部封装22。
图4示出了底部封装22的可能的底部表面，示出了用于球栅阵列的小金属焊盘24。
然后将诸如焊料、焊膏或导电环氧树脂的导电材料分配到每个孔21中，并且将用于将上部封装的引线电连接到焊盘16，同时不需要引线直接邻接焊盘16。填充引线和焊盘16之间的间隙的这种导电材料允许上部封装在回流步骤期间倾斜，即使引线不是平面的，也要精确地平行于底部封装22。
图5示出了上部封装26，其具有形成为矩形支柱28的引线。底部封装22中的孔21与支柱28的图案对准。上部封装26的底部表面不需要接触底部封装22的顶部表面，并且可以在回流期间调节上部封装26的角度，以实现上部封装26与底部封装22的精确对准。在一个实施例中，上部封装26包含变压器。
图6示出了图5的结构，但底部封装22是透明的。如果支柱28或焊盘16不是共面的，则支柱28的端部将不会全部邻接基板10上的焊盘16。
如图7所示，为了解决这种共面性的缺陷，在将支柱28插入孔21之前，底部封装22中的孔部分地填充有导电材料32，例如焊料、焊膏或允许上部封装26与底部封装22精确平行地定位的其他导电材料。导电材料32可以用针分配或者挤压到孔21中。因此，希望形成比支柱28明显更宽的孔21，使得导电材料32不会被支柱28推出。
上部封装26的底部表面可以可选地使用热环氧树脂固定到底部封装22的顶部，以在回流步骤之后将上部封装26的位置牢固地设定在底部封装22上。在回流期间，导电材料32将熔化并芯吸到支柱28和焊盘16以实现良好的电气、热和机械连接，而上部封装26使用对准工具与底部封装22精确对准。在回流期间，热量也固化热环氧树脂。
示出了基板10上的导电迹线29互连电路元件14和焊盘16。
在将上部封装26的支柱28焊接到焊盘16之后，可以翻转该结构并将焊球放置在底部封装22的底部焊盘24(图4)上以形成球栅阵列。回流步骤使焊料熔化在焊盘24上。如果上部封装26被环氧化到底部封装22，则这种回流步骤不会影响上部封装26的位置。
图8-10示出了用于上部封装40的不同类型的引线，称为钉头引线42。钉头引线是细而宽的引线，是高电流和高热量的良导体。当上部封装40是用于开关调节器的高功率电感器时是特别期望的。在一个实施例中，电感器被包裹在高导热的铁氧体材料中。
除了焊盘和激光钻孔43的位置和形状之外，底部封装44可以与图3的底部封装相同。
图9示出了底部封装44是透明的并且示出了钉头引线42如何延伸穿过底部封装44中的激光钻孔43(图8)并且可以或可以不邻接形成在底部封装44的基板48上的金属焊盘46。如前所述，在形成孔43之后，它们部分地填充有导电材料45，导电材料45回流并芯吸到焊盘46和钉头引线42，以实现良好的电气、热和机械连接。
上部封装40的底部可以使用热环氧树脂环氧树脂到底部封装44的顶部，以在回流步骤期间操纵其对准。环氧树脂在回流步骤中固化。
图10示出了多个上部封装50-53如何安装在单个底部封装56上。上部封装50-53各自具有四个钉头引线42，其插入底部封装56中的激光钻孔58中并与形成在基板60上的焊盘电连接。底部表面可以是球栅阵列。可以使用任何其他类型的终端配置。
重要的是，在回流步骤期间使每个上部封装50-53相对于底部封装56并且彼此对准的能力使得所有上部封装50-53的顶部表面精确地共面。因此，具有平坦表面的单个散热器可以定位在上部封装50-53上方并且均等地接触所有顶部表面。
图11示出了安装在底部封装66上方的散热器64。散热器64可以由铜或其他导热材料形成。散热器64具有坚固的突出部68，突出部68延伸到激光钻入底部封装66的模制塑料中的孔70(槽)中。沿着散热器64的底部可以存在分布的突出部68，或者突出部68可以仅沿着散热器64的两侧或更多侧。
底部封装66的基板72具有坚固的金属焊盘，类似于图9中所示的焊盘46，其热耦合到接头68。在一个实施例中，在安装散热器64之前，焊膏、导电环氧树脂、可烧结材料或一些其他导热材料部分地填充孔70，并且散热片68插入孔70中。导热材料填充突片68和焊盘之间的任何间隙。在回流时，导热材料流动然后硬化，导致散热器64与底部封装66的良好的热和机械连接。散热器64的底部表面可以热环氧树脂到底部封装66的顶部表面，以进行额外的热接触。在回流步骤期间，即使突片68不是共面的，散热器64也可以与底部封装66精确对准，因为突片68不直接邻接基板72上的金属焊盘。
基板72上的金属焊盘可以接地。焊盘也可以延伸穿过基板72，以终止于图4所示的底部焊盘24中。然后，这种底部焊盘24可以热接触金属芯印刷电路板中的金属层，以进行额外的散热。
散热器64本身包含新颖的特征。使用常规技术机加工一系列分段金属柱76，以提供用于空气冷却的大表面积。提供具有平坦顶部的较大中心突起78，以允许机器人臂或吸力夹持突起78并在自动机器拾取和放置步骤中将散热器64精确地安装在底部封装66上。
在其他实施例中，上部封装或其他上部组件可以提供频率隔离和/或屏蔽RF、IF或其他辐射信号。
可以同时形成多个封装结构，然后将封装分割，例如通过锯切。
在另一个实施例中，可以使用上述技术垂直堆叠两个以上的封装，其中每个上部封装具有延伸到在其下层封装中形成的激光钻孔的引线。
所描述的技术通过在封装之间提供接地屏蔽或通过在相关部件之间提供足够的间隔来实现上部封装和底部封装之间的任何程度的磁场隔离。
代替对孔进行激光钻孔，可以通过任何其他合适的方法形成孔，例如在底部封装或机械钻孔或化学蚀刻的模制期间。
虽然已经示出和描述了本发明的特定实施例，但是对于本领域技术人员来说显而易见的是，在不脱离本发明的更广泛方面的情况下可以进行改变和修改，因此，所附权利要求在其范围内包含在本发明的真实精神和范围内的所有这些变化和修改。

Claims (23)

1.一种电路封装结构，包括：
底部封装，包括：
基板，具有其上安装第一电路的顶部表面和具有在所述基板的顶部表面上的金属第一焊盘；
在所述基板的顶部表面上方的模制层，封装所述第一电路，所述模制层具有顶部表面；和
通过所述模制层的顶部表面形成的孔，允许进入所述基板上的第一焊盘；
上部器件，包括：
具有钉头引线的至少一个组件，所述钉头引线与所述孔对齐并延伸穿过所述孔，以电接触或热接触所述基板上的第一焊盘，其中所述钉头引线具有厚度和大于该厚度的宽度。
2.权利要求1所述的结构，其中所述上部器件包括：
上部封装，至少包含连接到底部封装中的第一电路的电路组件；和
其中所述钉头引线包括电引线，其与所述孔对齐并延伸穿过所述孔以电接触所述基板上的第一焊盘。
3.权利要求2所述的结构，还包括导电材料，该导电材料部分地填充所述孔，用于将所述上部封装的钉头引线电连接到所述基板上的第一焊盘，而不需要所有钉头引线同时邻接所述第一焊盘。
4.权利要求2所述的结构，其中所述第一电路包括开关调节器的至少一部分，并且所述上部封装中的至少一个电路组件包括变压器。
5.权利要求2所述的结构，其中所述第一电路包括开关调节器的至少一部分，并且所述上部封装中的至少一个电路组件包括电感器。
6.权利要求1所述的结构，其中所述基板具有底部表面，在该底部表面上形成电端子。
7.权利要求6所述的结构，其中所述电端子包括球栅阵列。
8.权利要求1所述的结构，其中所述孔是激光钻孔的。
9.权利要求1所述的结构，其中所述上部器件包括具有所述钉头引线的散热器，所述钉头引线与所述孔对齐并延伸穿过所述孔以与所述基板上的第一焊盘热接触，以从所述基板移除热量。
10.权利要求9所述的结构，其中所述散热器在其顶部表面上有分段列。
11.权利要求9所述的结构，其中所述散热器在其顶部表面上具有突起，用于在拾取和放置过程中通过机器人臂保持所述散热器。
12.一种形成封装结构的方法，包括：
形成具有顶部表面的基板；
在所述基板的顶部表面上安装第一电路，并在所述基板的顶部表面上形成金属第一焊盘；
在封装所述第一电路的基板的顶部表面上方模制模制层，所述模制层具有顶部表面；
通过所述模制层的顶部表面形成的孔，允许进入所述基板上的第一焊盘，所述基板和所述模制层形成底部封装；
提供上部器件，包括具有与孔对齐的钉头引线的至少一个部件，其中所述钉头引线具有厚度和大于该厚度的宽度；和
将所述钉头引线插入所述孔中以电接触或热接触所述基板上的第一焊盘。
13.权利要求12所述的方法，其中提供上部器件的步骤包括在上部封装中提供至少一个电路组件用于连接所述底部封装中的第一电路，并且其中插入钉头引线的步骤包括通过孔插入所述上部封装的电引线以电接触所述基板上的第一焊盘。
14.权利要求12所述的方法，还包括在将钉头引线穿过孔之前使用导电材料至少部分地填充所述孔。
15.权利要求14所述的方法，还包括加热所述导电材料以使所述导电材料流动到所述上部器件的钉头引线的芯部和所述基板的第一焊盘。
16.权利要求14所述的方法，其中所述导电材料包括焊膏。
17.权利要求12所述的方法，其中形成孔的步骤包括对所述孔进行激光钻孔。
18.权利要求12所述的方法，还包括在模制步骤之前使用焊料润湿所述第一焊盘。
19.权利要求12所述的方法，还包括在所述基板的底部表面上形成球栅阵列。
20.权利要求12所述的方法，其中所述第一电路包括开关调节器的至少一部分，并且所述上部器件包括变压器。
21.权利要求12所述的方法，其中所述第一电路包括开关调节器的至少一部分，并且所述上部器件包括电感器。
22.权利要求12所述的方法，其中所述上部器件包括散热器，该散热器具有所述钉头引线，所述钉头引线与所述孔对齐并延伸穿过所述孔以热接触所述基板上的第一焊盘，从而从所述基板移除热量。
23.权利要求22所述的方法，其中所述散热器在其顶部表面上具有突起，该方法还包括在拾取和放置过程中通过机器人臂保持所述突起以将所述散热器定位在所述底部封装上。
CN201980000486.XA 2018-03-27 2019-03-12 带有具有用于上部封装的激光钻孔的开口的模制基底的堆叠电路封装 Active CN110537253B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201862648835P 2018-03-27 2018-03-27
US62/648,835 2018-03-27
US16/152,182 US10497635B2 (en) 2018-03-27 2018-10-04 Stacked circuit package with molded base having laser drilled openings for upper package
US16/152,182 2018-10-04
PCT/US2019/021908 WO2019190741A1 (en) 2018-03-27 2019-03-12 Stacked circuit package with molded base having laser drilled openings for upper package

Publications (2)

Publication Number Publication Date
CN110537253A CN110537253A (zh) 2019-12-03
CN110537253B true CN110537253B (zh) 2024-02-06

Family

ID=68053836

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980000486.XA Active CN110537253B (zh) 2018-03-27 2019-03-12 带有具有用于上部封装的激光钻孔的开口的模制基底的堆叠电路封装

Country Status (5)

Country Link
US (2) US10497635B2 (zh)
KR (1) KR20200133739A (zh)
CN (1) CN110537253B (zh)
TW (1) TWI753238B (zh)
WO (1) WO2019190741A1 (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109075151B (zh) 2016-04-26 2023-06-27 亚德诺半导体国际无限责任公司 用于组件封装电路的机械配合、和电及热传导的引线框架
US10497635B2 (en) 2018-03-27 2019-12-03 Linear Technology Holding Llc Stacked circuit package with molded base having laser drilled openings for upper package
US11410977B2 (en) 2018-11-13 2022-08-09 Analog Devices International Unlimited Company Electronic module for high power applications
US11616027B2 (en) * 2019-12-17 2023-03-28 Analog Devices International Unlimited Company Integrated circuit packages to minimize stress on a semiconductor die
US11270986B2 (en) 2020-05-18 2022-03-08 Analog Devices, Inc. Package with overhang inductor
US11844178B2 (en) 2020-06-02 2023-12-12 Analog Devices International Unlimited Company Electronic component

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101800523A (zh) * 2009-02-10 2010-08-11 日本电波工业株式会社 具有底座的晶体振荡器装置
CN102088241A (zh) * 2009-12-07 2011-06-08 英特赛尔美国股份有限公司 层叠电感器-电子封装组件及其制造技术
CN106793564A (zh) * 2016-12-30 2017-05-31 东莞联桥电子有限公司 一种多层pcb盲孔的插件方法
CN107170718A (zh) * 2016-03-08 2017-09-15 Abb瑞士股份有限公司 半导体模块

Family Cites Families (325)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4089041A (en) 1975-08-07 1978-05-09 Amp Incorporated Circuit programming device
JPS59155154A (ja) 1983-02-23 1984-09-04 Nec Corp 半導体装置
US4862246A (en) 1984-09-26 1989-08-29 Hitachi, Ltd. Semiconductor device lead frame with etched through holes
US4801912A (en) 1985-06-07 1989-01-31 American Precision Industries Inc. Surface mountable electronic device
JPS6273650A (ja) 1985-09-27 1987-04-04 Hitachi Ltd 電気部品
US4914259A (en) 1987-09-08 1990-04-03 The Furukawa Electric Co., Ltd. Molded circuit board
JPH0513666A (ja) 1991-06-29 1993-01-22 Sony Corp 複合半導体装置
US5535101A (en) * 1992-11-03 1996-07-09 Motorola, Inc. Leadless integrated circuit package
US5485037A (en) 1993-04-12 1996-01-16 Amkor Electronics, Inc. Semiconductor device having a thermal dissipator and electromagnetic shielding
US5647124A (en) 1994-04-25 1997-07-15 Texas Instruments Incorporated Method of attachment of a semiconductor slotted lead to a substrate
US6727579B1 (en) * 1994-11-16 2004-04-27 Formfactor, Inc. Electrical contact structures formed by configuring a flexible wire to have a springable shape and overcoating the wire with at least one layer of a resilient conductive material, methods of mounting the contact structures to electronic components, and applications for employing the contact structures
US5514907A (en) 1995-03-21 1996-05-07 Simple Technology Incorporated Apparatus for stacking semiconductor chips
KR0148082B1 (ko) 1995-08-16 1998-08-01 김광호 지지 바를 사용한 적층형 반도체 패키지 및 적층형 패키지 소켓
JP3400634B2 (ja) 1996-02-28 2003-04-28 富士通株式会社 プリント基板の配線パターン改造方法およびプリント基板の配線パターンの切断方法
JP2861956B2 (ja) 1996-07-24 1999-02-24 日本電気株式会社 高周波デバイスパッケージ及びその製造方法
US5804880A (en) 1996-11-04 1998-09-08 National Semiconductor Corporation Solder isolating lead frame
JP3874062B2 (ja) 2000-09-05 2007-01-31 セイコーエプソン株式会社 半導体装置
EP1215724B1 (en) 2000-11-20 2012-10-31 Texas Instruments Incorporated Wire bonded semiconductor device with low capacitance coupling
US6803650B2 (en) * 2001-02-23 2004-10-12 Silicon Bandwidth Inc. Semiconductor die package having mesh power and ground planes
TWI279080B (en) 2001-09-20 2007-04-11 Nec Corp Shielded strip line device and method of manufacture thereof
US20040124505A1 (en) 2002-12-27 2004-07-01 Mahle Richard L. Semiconductor device package with leadframe-to-plastic lock
US6914506B2 (en) 2003-01-21 2005-07-05 Coilcraft, Incorporated Inductive component and method of manufacturing same
US6867481B2 (en) 2003-04-11 2005-03-15 Fairchild Semiconductor Corporation Lead frame structure with aperture or groove for flip chip in a leaded molded package
KR20050001159A (ko) 2003-06-27 2005-01-06 삼성전자주식회사 복수개의 플립 칩들을 갖는 멀티칩 패키지 및 그 제조방법
US20050085016A1 (en) 2003-09-26 2005-04-21 Tessera, Inc. Structure and method of making capped chips using sacrificial layer
JP4700332B2 (ja) 2003-12-05 2011-06-15 イビデン株式会社 多層プリント配線板
JP2006100385A (ja) * 2004-09-28 2006-04-13 Rohm Co Ltd 半導体装置
US7939934B2 (en) * 2005-03-16 2011-05-10 Tessera, Inc. Microelectronic packages and methods therefor
WO2007036994A1 (ja) 2005-09-28 2007-04-05 Spansion Llc 半導体装置およびその製造方法並びにフィルムの製造方法
US7285849B2 (en) 2005-11-18 2007-10-23 Fairchild Semiconductor Corporation Semiconductor die package using leadframe and clip and method of manufacturing
US7663212B2 (en) 2006-03-21 2010-02-16 Infineon Technologies Ag Electronic component having exposed surfaces
US7859098B2 (en) 2006-04-19 2010-12-28 Stats Chippac Ltd. Embedded integrated circuit package system
JP2009535835A (ja) 2006-05-02 2009-10-01 エヌエックスピー ビー ヴィ 改良された電極を備える電気デバイス
US7569920B2 (en) 2006-05-10 2009-08-04 Infineon Technologies Ag Electronic component having at least one vertical semiconductor power transistor
US7714453B2 (en) 2006-05-12 2010-05-11 Broadcom Corporation Interconnect structure and formation for package stacking of molded plastic area array package
US8581381B2 (en) 2006-06-20 2013-11-12 Broadcom Corporation Integrated circuit (IC) package stacking and IC packages formed by same
US7977773B1 (en) 2006-07-17 2011-07-12 Marvell International Ltd. Leadframe including die paddle apertures for reducing delamination
US20080036566A1 (en) 2006-08-09 2008-02-14 Andrzej Klesyk Electronic Component And Methods Relating To Same
US9847309B2 (en) 2006-09-22 2017-12-19 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming vertical interconnect structure between semiconductor die and substrate
US8193034B2 (en) 2006-11-10 2012-06-05 Stats Chippac, Ltd. Semiconductor device and method of forming vertical interconnect structure using stud bumps
US20080122049A1 (en) 2006-11-28 2008-05-29 Texas Instruments Incorporated Leadframe finger design to ensure lead-locking for enhanced fatigue life of bonding wire in an overmolded package
US20080128890A1 (en) 2006-11-30 2008-06-05 Advanced Semiconductor Engineering, Inc. Chip package and fabricating process thereof
KR100818518B1 (ko) 2007-03-14 2008-03-31 삼성전기주식회사 Ｌｅｄ 패키지
US8349721B2 (en) 2008-03-19 2013-01-08 Stats Chippac, Ltd. Semiconductor device and method of forming insulating layer on conductive traces for electrical isolation in fine pitch bonding
CN101978490B (zh) 2008-03-31 2012-10-17 株式会社村田制作所 电子元器件组件及该电子元器件组件的制造方法
US7741156B2 (en) 2008-05-27 2010-06-22 Stats Chippac, Ltd. Semiconductor device and method of forming through vias with reflowed conductive material
US7842542B2 (en) 2008-07-14 2010-11-30 Stats Chippac, Ltd. Embedded semiconductor die package and method of making the same using metal frame carrier
US7829981B2 (en) 2008-07-21 2010-11-09 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with electromagnetic interference shielding
US8062932B2 (en) 2008-12-01 2011-11-22 Alpha & Omega Semiconductor, Inc. Compact semiconductor package with integrated bypass capacitor and method
US8354740B2 (en) 2008-12-01 2013-01-15 Alpha & Omega Semiconductor, Inc. Top-side cooled semiconductor package with stacked interconnection plates and method
TW201023308A (en) 2008-12-01 2010-06-16 Advanced Semiconductor Eng Package-on-package device, semiconductor package and method for manufacturing the same
US8168458B2 (en) 2008-12-08 2012-05-01 Stats Chippac, Ltd. Semiconductor device and method of forming bond wires and stud bumps in recessed region of peripheral area around the device for electrical interconnection to other devices
US7741148B1 (en) 2008-12-10 2010-06-22 Stats Chippac, Ltd. Semiconductor device and method of forming an interconnect structure for 3-D devices using encapsulant for structural support
US9257356B2 (en) 2008-12-10 2016-02-09 Stats Chippac, Ltd. Semiconductor device and method of forming an IPD beneath a semiconductor die with direct connection to external devices
US7799602B2 (en) 2008-12-10 2010-09-21 Stats Chippac, Ltd. Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure
US7776655B2 (en) 2008-12-10 2010-08-17 Stats Chippac, Ltd. Semiconductor device and method of forming conductive pillars in recessed region of peripheral area around the device for electrical interconnection to other devices
US8900921B2 (en) 2008-12-11 2014-12-02 Stats Chippac, Ltd. Semiconductor device and method of forming topside and bottom-side interconnect structures around core die with TSV
JP2012064600A (ja) 2008-12-12 2012-03-29 Murata Mfg Co Ltd 多層基板およびその製造方法
US9082806B2 (en) 2008-12-12 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming a vertical interconnect structure for 3-D FO-WLCSP
US8093151B2 (en) 2009-03-13 2012-01-10 Stats Chippac, Ltd. Semiconductor die and method of forming noise absorbing regions between THVS in peripheral region of the die
US8258010B2 (en) 2009-03-17 2012-09-04 Stats Chippac, Ltd. Making a semiconductor device having conductive through organic vias
US8067308B2 (en) 2009-06-08 2011-11-29 Stats Chippac, Ltd. Semiconductor device and method of forming an interconnect structure with TSV using encapsulant for structural support
US7993976B2 (en) 2009-06-12 2011-08-09 Stats Chippac, Ltd. Semiconductor device and method of forming conductive vias with trench in saw street
US8003496B2 (en) 2009-08-14 2011-08-23 Stats Chippac, Ltd. Semiconductor device and method of mounting semiconductor die to heat spreader on temporary carrier and forming polymer layer and conductive layer over the die
US8383457B2 (en) 2010-09-03 2013-02-26 Stats Chippac, Ltd. Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect
US8164158B2 (en) 2009-09-11 2012-04-24 Stats Chippac, Ltd. Semiconductor device and method of forming integrated passive device
US20120326287A1 (en) 2011-06-27 2012-12-27 National Semiconductor Corporation Dc/dc convertor power module package incorporating a stacked controller and construction methodology
US8531012B2 (en) 2009-10-23 2013-09-10 Stats Chippac, Ltd. Semiconductor device and method of forming a shielding layer over a semiconductor die disposed in a cavity of an interconnect structure and grounded through the die TSV
US8008121B2 (en) 2009-11-04 2011-08-30 Stats Chippac, Ltd. Semiconductor package and method of mounting semiconductor die to opposite sides of TSV substrate
US8378466B2 (en) 2009-11-19 2013-02-19 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with electromagnetic interference shielding
US8372689B2 (en) 2010-01-21 2013-02-12 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with three-dimensional fan-out and manufacturing methods thereof
US8138014B2 (en) 2010-01-29 2012-03-20 Stats Chippac, Ltd. Method of forming thin profile WLCSP with vertical interconnect over package footprint
US8574960B2 (en) 2010-02-03 2013-11-05 Stats Chippac, Ltd. Semiconductor device and method of forming cavity adjacent to sensitive region of semiconductor die using wafer-level underfill material
US8368187B2 (en) 2010-02-03 2013-02-05 Stats Chippac, Ltd. Semiconductor device and method of forming air gap adjacent to stress sensitive region of the die
US20110186960A1 (en) 2010-02-03 2011-08-04 Albert Wu Techniques and configurations for recessed semiconductor substrates
US9177926B2 (en) 2011-12-30 2015-11-03 Deca Technologies Inc Semiconductor device and method comprising thickened redistribution layers
US9922955B2 (en) 2010-03-04 2018-03-20 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming package-on-package structure electrically interconnected through TSV in WLCSP
US8241956B2 (en) 2010-03-08 2012-08-14 Stats Chippac, Ltd. Semiconductor device and method of forming wafer level multi-row etched lead package
US8039384B2 (en) 2010-03-09 2011-10-18 Stats Chippac, Ltd. Semiconductor device and method of forming vertically offset bond on trace interconnects on different height traces
US10111333B2 (en) 2010-03-16 2018-10-23 Intersil Americas Inc. Molded power-supply module with bridge inductor over other components
US20110241194A1 (en) 2010-04-02 2011-10-06 Advanced Semiconductor Engineering, Inc. Stacked Semiconductor Device Package Assemblies with Reduced Wire Sweep and Manufacturing Methods Thereof
US8624374B2 (en) 2010-04-02 2014-01-07 Advanced Semiconductor Engineering, Inc. Semiconductor device packages with fan-out and with connecting elements for stacking and manufacturing methods thereof
US9508626B2 (en) 2010-04-23 2016-11-29 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming openings in thermally-conductive frame of FO-WLCSP to dissipate heat and reduce package height
FR2959350B1 (fr) 2010-04-26 2012-08-31 Commissariat Energie Atomique Procede de fabrication d?un dispositif microelectronique et dispositif microelectronique ainsi fabrique
US8241964B2 (en) 2010-05-13 2012-08-14 Stats Chippac, Ltd. Semiconductor device and method of embedding bumps formed on semiconductor die into penetrable adhesive layer to reduce die shifting during encapsulation
US8582317B2 (en) 2010-05-26 2013-11-12 Semiconductor Components Industries, Llc Method for manufacturing a semiconductor component and structure therefor
US8525340B2 (en) 2010-06-11 2013-09-03 Premitec, Inc. Flexible electronic devices and related methods
US8409978B2 (en) 2010-06-24 2013-04-02 Stats Chippac, Ltd. Semiconductor device and method of forming vertically offset bond on trace interconnect structure on leadframe
US8642381B2 (en) 2010-07-16 2014-02-04 Stats Chippac, Ltd. Semiconductor device and method of forming protective layer over exposed surfaces of semiconductor die
US9831393B2 (en) 2010-07-30 2017-11-28 Cree Hong Kong Limited Water resistant surface mount device package
US8318541B2 (en) 2010-08-10 2012-11-27 Stats Chippac, Ltd. Semiconductor device and method of forming vertical interconnect in FO-WLCSP using leadframe disposed between semiconductor die
US8492197B2 (en) 2010-08-17 2013-07-23 Stats Chippac, Ltd. Semiconductor device and method of forming vertically offset conductive pillars over first substrate aligned to vertically offset BOT interconnect sites formed over second substrate
US8435835B2 (en) 2010-09-02 2013-05-07 Stats Chippac, Ltd. Semiconductor device and method of forming base leads from base substrate as standoff for stacking semiconductor die
US8409918B2 (en) 2010-09-03 2013-04-02 Stats Chippac, Ltd. Semiconductor device and method of forming pre-molded substrate to reduce warpage during die mounting
US8409922B2 (en) 2010-09-14 2013-04-02 Stats Chippac, Ltd. Semiconductor device and method of forming leadframe interposer over semiconductor die and TSV substrate for vertical electrical interconnect
TWI478303B (zh) 2010-09-27 2015-03-21 Advanced Semiconductor Eng 具有金屬柱之晶片及具有金屬柱之晶片之封裝結構
US9337116B2 (en) 2010-10-28 2016-05-10 Stats Chippac, Ltd. Semiconductor device and method of forming stepped interposer for stacking and electrically connecting semiconductor die
US8546193B2 (en) 2010-11-02 2013-10-01 Stats Chippac, Ltd. Semiconductor device and method of forming penetrable film encapsulant around semiconductor die and interconnect structure
US8941222B2 (en) 2010-11-11 2015-01-27 Advanced Semiconductor Engineering Inc. Wafer level semiconductor package and manufacturing methods thereof
US8384227B2 (en) 2010-11-16 2013-02-26 Stats Chippac, Ltd. Semiconductor device and method of forming interposer frame electrically connected to embedded semiconductor die
US8877567B2 (en) 2010-11-18 2014-11-04 Stats Chippac, Ltd. Semiconductor device and method of forming uniform height insulating layer over interposer frame as standoff for semiconductor die
US8288202B2 (en) 2010-11-22 2012-10-16 STATS ChiPAC, Ltd. Method of forming partially-etched conductive layer recessed within substrate for bonding to semiconductor die
JP5707902B2 (ja) 2010-12-02 2015-04-30 ソニー株式会社 半導体装置及びその製造方法
US8502387B2 (en) 2010-12-09 2013-08-06 Stats Chippac Ltd. Integrated circuit packaging system with vertical interconnection and method of manufacture thereof
US8445990B2 (en) 2010-12-10 2013-05-21 Stats Chippac, Ltd. Semiconductor device and method of forming an inductor within interconnect layer vertically separated from semiconductor die
US20120159118A1 (en) 2010-12-16 2012-06-21 Wong Shaw Fong Lower IC Package Structure for Coupling with an Upper IC Package to Form a Package-On-Package (PoP) Assembly and PoP Assembly Including Such a Lower IC Package Structure
US9406658B2 (en) 2010-12-17 2016-08-02 Advanced Semiconductor Engineering, Inc. Embedded component device and manufacturing methods thereof
CN201893335U (zh) 2010-12-24 2011-07-06 安徽国晶微电子有限公司 一种双芯片集成电路引线框
US8853819B2 (en) 2011-01-07 2014-10-07 Advanced Semiconductor Engineering, Inc. Semiconductor structure with passive element network and manufacturing method thereof
US8525344B2 (en) 2011-02-24 2013-09-03 Stats Chippac, Ltd. Semiconductor device and method of forming bond wires between semiconductor die contact pads and conductive TOV in peripheral area around semiconductor die
US8623702B2 (en) 2011-02-24 2014-01-07 Stats Chippac, Ltd. Semiconductor device and method of forming conductive THV and RDL on opposite sides of semiconductor die for RDL-to-RDL bonding
US9171792B2 (en) 2011-02-28 2015-10-27 Advanced Semiconductor Engineering, Inc. Semiconductor device packages having a side-by-side device arrangement and stacking functionality
US8508045B2 (en) 2011-03-03 2013-08-13 Broadcom Corporation Package 3D interconnection and method of making same
US8569882B2 (en) 2011-03-24 2013-10-29 Stats Chippac Ltd. Integrated circuit packaging system with collapsed multi-integration package and method of manufacture thereof
US8883561B2 (en) 2011-04-30 2014-11-11 Stats Chippac, Ltd. Semiconductor device and method of embedding TSV semiconductor die within encapsulant with TMV for vertical interconnect in POP
US8476115B2 (en) 2011-05-03 2013-07-02 Stats Chippac, Ltd. Semiconductor device and method of mounting cover to semiconductor die and interposer with adhesive material
KR101128063B1 (ko) 2011-05-03 2012-04-23 테세라, 인코포레이티드 캡슐화 층의 표면에 와이어 본드를 구비하는 패키지 적층형 어셈블리
US9391046B2 (en) 2011-05-20 2016-07-12 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming 3D semiconductor package with semiconductor die stacked over semiconductor wafer
US8409979B2 (en) 2011-05-31 2013-04-02 Stats Chippac, Ltd. Semiconductor device and method of forming interconnect structure with conductive pads having expanded interconnect surface area for enhanced interconnection properties
US8288209B1 (en) 2011-06-03 2012-10-16 Stats Chippac, Ltd. Semiconductor device and method of using leadframe bodies to form openings through encapsulant for vertical interconnect of semiconductor die
US9006099B2 (en) 2011-06-08 2015-04-14 Great Wall Semiconductor Corporation Semiconductor device and method of forming a power MOSFET with interconnect structure silicide layer and low profile bump
US8674516B2 (en) 2011-06-22 2014-03-18 Stats Chippac Ltd. Integrated circuit packaging system with vertical interconnects and method of manufacture thereof
US8587120B2 (en) 2011-06-23 2013-11-19 Stats Chippac, Ltd. Semiconductor device and method of forming interconnect structure over seed layer on contact pad of semiconductor die without undercutting seed layer beneath interconnect structure
US20130015569A1 (en) 2011-07-12 2013-01-17 Great Wall Semiconductor Corporation Semiconductor Device and Method of Forming Substrate With Seated Plane for Mating With Bumped Semiconductor Die
US9324659B2 (en) 2011-08-01 2016-04-26 Stats Chippac, Ltd. Semiconductor device and method of forming POP with stacked semiconductor die and bumps formed directly on the lower die
US8653635B2 (en) 2011-08-16 2014-02-18 General Electric Company Power overlay structure with leadframe connections
US20140151880A1 (en) 2011-08-19 2014-06-05 Marvell World Trade Ltd. Package-on-package structures
US9177832B2 (en) 2011-09-16 2015-11-03 Stats Chippac, Ltd. Semiconductor device and method of forming a reconfigured stackable wafer level package with vertical interconnect
US9275877B2 (en) 2011-09-20 2016-03-01 Stats Chippac, Ltd. Semiconductor device and method of forming semiconductor package using panel form carrier
US9484259B2 (en) 2011-09-21 2016-11-01 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming protection and support structure for conductive interconnect structure
US9824923B2 (en) 2011-10-17 2017-11-21 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming conductive pillar having an expanded base
US9281228B2 (en) 2011-11-01 2016-03-08 Stats Chippac, Ltd. Semiconductor device and method of forming thermal interface material and heat spreader over semiconductor die
US20130127029A1 (en) 2011-11-18 2013-05-23 Texas Instruments Incorporated Two level leadframe with upset ball bonding surface and device package
US8642384B2 (en) 2012-03-09 2014-02-04 Stats Chippac, Ltd. Semiconductor device and method of forming non-linear interconnect layer with extended length for joint reliability
US9245834B2 (en) 2012-03-16 2016-01-26 Stats Chippac, Ltd. Semiconductor device and method of forming compliant conductive interconnect structure in flipchip package
US20130249076A1 (en) 2012-03-20 2013-09-26 Stats Chippac, Ltd. Semiconductor Device and Method of Forming Duplex Plated Bump-On-Lead Pad Over Substrate for Finer Pitch Between Adjacent Traces
US9082780B2 (en) 2012-03-23 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming a robust fan-out package including vertical interconnects and mechanical support layer
US8946880B2 (en) 2012-03-23 2015-02-03 Texas Instruments Incorporated Packaged semiconductor device having multilevel leadframes configured as modules
US10049964B2 (en) 2012-03-23 2018-08-14 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming a fan-out PoP device with PWB vertical interconnect units
US9390945B2 (en) 2012-05-08 2016-07-12 STATS ChipPAC Pte. Ltd. Semiconductor device and method of depositing underfill material with uniform flow rate
US9406579B2 (en) 2012-05-14 2016-08-02 STATS ChipPAC Pte. Ltd. Semiconductor device and method of controlling warpage in semiconductor package
US8981559B2 (en) 2012-06-25 2015-03-17 Taiwan Semiconductor Manufacturing Company, Ltd. Package on package devices and methods of packaging semiconductor dies
US8847369B2 (en) 2012-07-20 2014-09-30 Taiwan Semiconductor Manufacturing Company, Ltd. Packaging structures and methods for semiconductor devices
US10192796B2 (en) 2012-09-14 2019-01-29 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming dual-sided interconnect structures in FO-WLCSP
US9559039B2 (en) 2012-09-17 2017-01-31 STATS ChipPAC Pte. Ltd. Semiconductor device and method of using substrate having base and conductive posts to form vertical interconnect structure in embedded die package
US9385102B2 (en) 2012-09-28 2016-07-05 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming supporting layer over semiconductor die in thin fan-out wafer level chip scale package
US9496195B2 (en) 2012-10-02 2016-11-15 STATS ChipPAC Pte. Ltd. Semiconductor device and method of depositing encapsulant along sides and surface edge of semiconductor die in embedded WLCSP
US8937387B2 (en) 2012-11-07 2015-01-20 Advanced Semiconductor Engineering, Inc. Semiconductor device with conductive vias
US9773719B2 (en) 2012-11-26 2017-09-26 Infineon Technologies Dresden Gmbh Semiconductor packages and methods of fabrication thereof
US9704780B2 (en) 2012-12-11 2017-07-11 STATS ChipPAC, Pte. Ltd. Semiconductor device and method of forming low profile fan-out package with vertical interconnection units
US9240331B2 (en) 2012-12-20 2016-01-19 Stats Chippac, Ltd. Semiconductor device and method of making bumpless flipchip interconnect structures
US9406552B2 (en) 2012-12-20 2016-08-02 Advanced Semiconductor Engineering, Inc. Semiconductor device having conductive via and manufacturing process
US10115661B2 (en) 2013-02-08 2018-10-30 Qualcomm Incorporated Substrate-less discrete coupled inductor structure
JP5862584B2 (ja) 2013-03-08 2016-02-16 株式会社村田製作所 モジュールおよびこのモジュールの製造方法ならびにこのモジュールを備える電子装置
US8786069B1 (en) 2013-03-15 2014-07-22 Invensas Corporation Reconfigurable pop
US9312198B2 (en) * 2013-03-15 2016-04-12 Intel Deutschland Gmbh Chip package-in-package and method thereof
US8987734B2 (en) 2013-03-15 2015-03-24 Advanced Semiconductor Engineering, Inc. Semiconductor wafer, semiconductor process and semiconductor package
KR20140126598A (ko) 2013-04-23 2014-10-31 삼성전자주식회사 반도체 패키지 및 그 제조 방법
US9006870B2 (en) 2013-07-31 2015-04-14 Alpha & Omega Semiconductor Inc. Stacked multi-chip packaging structure and manufacturing method thereof
KR102161173B1 (ko) * 2013-08-29 2020-09-29 삼성전자주식회사 패키지 온 패키지 장치 및 이의 제조 방법
US9070627B2 (en) 2013-09-11 2015-06-30 Broadcom Corporation Interposer package-on-package structure
US10418298B2 (en) 2013-09-24 2019-09-17 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming dual fan-out semiconductor package
US9299650B1 (en) 2013-09-25 2016-03-29 Stats Chippac Ltd. Integrated circuit packaging system with single metal layer interposer and method of manufacture thereof
CN103633056B (zh) 2013-12-06 2017-09-01 矽力杰半导体技术(杭州)有限公司 引线框、封装组件及其制造方法
US9721922B2 (en) 2013-12-23 2017-08-01 STATS ChipPAC, Pte. Ltd. Semiconductor device and method of forming fine pitch RDL over semiconductor die in fan-out package
JP6273362B2 (ja) 2013-12-23 2018-01-31 インテル コーポレイション パッケージ構造上のパッケージ及びこれを製造するための方法
CN203839367U (zh) 2013-12-31 2014-09-17 福建合顺微电子有限公司 一种带有脱离与锁定组合槽引线框架的半导体器件
TWI541966B (zh) 2014-03-05 2016-07-11 矽品精密工業股份有限公司 封裝堆疊結構及其製法
CN104934391B (zh) 2014-03-18 2018-05-18 日月光半导体制造股份有限公司 半导体装置和半导体工艺
US9362161B2 (en) 2014-03-20 2016-06-07 Stats Chippac, Ltd. Semiconductor device and method of forming 3D dual side die embedded build-up semiconductor package
US9330994B2 (en) 2014-03-28 2016-05-03 Stats Chippac, Ltd. Semiconductor device and method of forming RDL and vertical interconnect by laser direct structuring
US20150279815A1 (en) 2014-03-28 2015-10-01 Stats Chippac, Ltd. Semiconductor Device and Method of Forming Substrate Having Conductive Columns
TWI587412B (zh) 2014-05-08 2017-06-11 矽品精密工業股份有限公司 封裝結構及其製法
US9881859B2 (en) 2014-05-09 2018-01-30 Qualcomm Incorporated Substrate block for PoP package
TWI529883B (zh) 2014-05-09 2016-04-11 矽品精密工業股份有限公司 封裝堆疊結構及其製法暨無核心層式封裝基板及其製法
US10115701B2 (en) 2014-06-26 2018-10-30 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming conductive vias by backside via reveal with CMP
US9768066B2 (en) 2014-06-26 2017-09-19 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming conductive vias by direct via reveal with organic passivation
JP2016529716A (ja) 2014-07-07 2016-09-23 インテル アイピー コーポレーション パッケージオンパッケージ積層マイクロ電子構造体
US10453785B2 (en) 2014-08-07 2019-10-22 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming double-sided fan-out wafer level package
TWI599007B (zh) 2014-09-03 2017-09-11 矽品精密工業股份有限公司 電子單體及其製法
KR102181013B1 (ko) 2014-09-05 2020-11-19 삼성전자주식회사 반도체 패키지
GB2530321B (en) 2014-09-19 2019-04-17 Murata Manufacturing Co Electronic device
US9941207B2 (en) 2014-10-24 2018-04-10 STATS ChipPAC Pte. Ltd. Semiconductor device and method of fabricating 3D package with short cycle time and high yield
TWI548050B (zh) 2014-11-03 2016-09-01 矽品精密工業股份有限公司 封裝結構及其製法與封裝基板
EP3018092A1 (en) 2014-11-10 2016-05-11 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft MEMS package
US9986646B2 (en) 2014-11-21 2018-05-29 Nxp Usa, Inc. Packaged electronic devices with top terminations, and methods of manufacture thereof
US10032652B2 (en) 2014-12-05 2018-07-24 Advanced Semiconductor Engineering, Inc. Semiconductor package having improved package-on-package interconnection
TWI560818B (en) 2014-12-05 2016-12-01 Siliconware Precision Industries Co Ltd Electronic package and the manufacture thereof
KR102506703B1 (ko) 2014-12-16 2023-03-03 데카 테크놀로지 유에스에이 인코포레이티드 반도체 패키지를 마킹하는 방법
US20160329272A1 (en) 2014-12-19 2016-11-10 Intel IP Corporation Stacked semiconductor device package with improved interconnect bandwidth
US9443785B2 (en) 2014-12-19 2016-09-13 Advanced Semiconductor Engineering, Inc. Semiconductor package
US9496238B2 (en) 2015-02-13 2016-11-15 Advanced Semiconductor Engineering, Inc. Sloped bonding structure for semiconductor package
US9786623B2 (en) 2015-03-17 2017-10-10 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming PoP semiconductor device with RDL over top package
TWI587458B (zh) 2015-03-17 2017-06-11 矽品精密工業股份有限公司 電子封裝件及其製法與基板結構
US9570381B2 (en) 2015-04-02 2017-02-14 Advanced Semiconductor Engineering, Inc. Semiconductor packages and related manufacturing methods
US20160307799A1 (en) 2015-04-15 2016-10-20 Advanced Semiconductor Engineering, Inc. Semiconductor substrates, semiconductor packages and processes of making the same
US9502397B1 (en) 2015-04-29 2016-11-22 Deca Technologies, Inc. 3D interconnect component for fully molded packages
US9397074B1 (en) 2015-04-29 2016-07-19 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
US10163687B2 (en) 2015-05-22 2018-12-25 Qualcomm Incorporated System, apparatus, and method for embedding a 3D component with an interconnect structure
US9653407B2 (en) 2015-07-02 2017-05-16 Advanced Semiconductor Engineering, Inc. Semiconductor device packages
US10290414B2 (en) 2015-08-31 2019-05-14 Qualcomm Incorporated Substrate comprising an embedded inductor and a thin film magnetic core
US10784208B2 (en) 2015-09-10 2020-09-22 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
TWI712187B (zh) 2015-09-11 2020-12-01 晶元光電股份有限公司 發光元件以及其製造方法
US20170110392A1 (en) 2015-10-15 2017-04-20 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and method for manufacturing the same structure
US10163867B2 (en) 2015-11-12 2018-12-25 Amkor Technology, Inc. Semiconductor package and manufacturing method thereof
US10083888B2 (en) 2015-11-19 2018-09-25 Advanced Semiconductor Engineering, Inc. Semiconductor device package
US9627365B1 (en) 2015-11-30 2017-04-18 Taiwan Semiconductor Manufacturing Company, Ltd. Tri-layer CoWoS structure
DE102015121044B4 (de) 2015-12-03 2020-02-06 Infineon Technologies Ag Anschlussblock mit zwei Arten von Durchkontaktierungen und elektronische Vorrichtung, einen Anschlussblock umfassend
WO2017109536A1 (en) 2015-12-21 2017-06-29 Intel IP Corporation System-in-package devices and methods for forming system-in-package devices
US20170179041A1 (en) 2015-12-22 2017-06-22 Intel Corporation Semiconductor package with trenched molding-based electromagnetic interference shielding
TWI641087B (zh) 2015-12-28 2018-11-11 矽品精密工業股份有限公司 電子封裝件及封裝用之基板
TWI605557B (zh) 2015-12-31 2017-11-11 矽品精密工業股份有限公司 電子封裝件及其製法與基板結構
US9741694B2 (en) 2015-12-31 2017-08-22 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor structure and method of manufacturing the same
TWI582928B (zh) 2016-01-19 2017-05-11 矽品精密工業股份有限公司 基板結構及其製法
US10497674B2 (en) 2016-01-27 2019-12-03 Amkor Technology, Inc. Semiconductor package and fabricating method thereof
US10034379B2 (en) 2016-01-29 2018-07-24 Cyntec Co., Ltd. Stacked electronic structure
US10193442B2 (en) 2016-02-09 2019-01-29 Faraday Semi, LLC Chip embedded power converters
US9729059B1 (en) 2016-02-09 2017-08-08 Faraday Semi, LLC Chip embedded DC-DC converter
US10256173B2 (en) 2016-02-22 2019-04-09 Advanced Semiconductor Engineering, Inc. Semiconductor device and method for manufacturing the same
US11373990B2 (en) 2016-02-29 2022-06-28 Semtech Corporation Semiconductor device and method of stacking semiconductor die for system-level ESD protection
TWI611577B (zh) 2016-03-04 2018-01-11 矽品精密工業股份有限公司 電子封裝件及半導體基板
WO2017160284A1 (en) 2016-03-16 2017-09-21 Intel Corporation Stairstep interposers with integrated shielding for electronics packages
TWI589059B (zh) 2016-03-28 2017-06-21 矽品精密工業股份有限公司 電子封裝件
US9972579B1 (en) 2016-11-16 2018-05-15 Tdk Corporation Composite magnetic sealing material and electronic circuit package using the same
US10177099B2 (en) 2016-04-07 2019-01-08 Advanced Semiconductor Engineering, Inc. Semiconductor package structure, package on package structure and packaging method
CN109075151B (zh) 2016-04-26 2023-06-27 亚德诺半导体国际无限责任公司 用于组件封装电路的机械配合、和电及热传导的引线框架
US10049893B2 (en) 2016-05-11 2018-08-14 Advanced Semiconductor Engineering, Inc. Semiconductor device with a conductive post
US9985006B2 (en) 2016-05-31 2018-05-29 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method thereof
US9852971B1 (en) 2016-06-09 2017-12-26 Advanced Semiconductor Engineering, Inc. Interposer, semiconductor package structure, and semiconductor process
US9991193B2 (en) 2016-06-15 2018-06-05 Advanced Semiconductor Engineering, Inc. Semiconductor device package
US10777478B2 (en) 2016-07-15 2020-09-15 Advanced Semiconductor Engineering, Inc. Semiconductor package device for power device
US10276382B2 (en) 2016-08-11 2019-04-30 Advanced Semiconductor Engineering, Inc. Semiconductor device packages and stacked package assemblies including high density interconnections
US20180052281A1 (en) 2016-08-16 2018-02-22 Advanced Semiconductor Engineering, Inc. Substrate, semiconductor device and semiconductor package structure
US9824976B1 (en) 2016-08-16 2017-11-21 Infineon Technologies Americas Corp. Single-sided power device package
US10229859B2 (en) 2016-08-17 2019-03-12 Advanced Semiconductor Engineering, Inc. Semiconductor device package and a method of manufacturing the same
TWI601219B (zh) 2016-08-31 2017-10-01 矽品精密工業股份有限公司 電子封裝件及其製法
US10037975B2 (en) 2016-08-31 2018-07-31 Advanced Semiconductor Engineering, Inc. Semiconductor device package and a method of manufacturing the same
US10475775B2 (en) 2016-08-31 2019-11-12 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
TWI676259B (zh) 2016-09-02 2019-11-01 矽品精密工業股份有限公司 電子封裝件及其製法
US10115692B2 (en) * 2016-09-14 2018-10-30 International Business Machines Corporation Method of forming solder bumps
US20180090466A1 (en) 2016-09-29 2018-03-29 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
US10854556B2 (en) 2016-10-12 2020-12-01 Advanced Semiconductor Engineering Korea, Inc. Semiconductor package device and method of manufacturing the same
TWI595603B (zh) 2016-11-10 2017-08-11 矽品精密工業股份有限公司 封裝堆疊結構
US20180138113A1 (en) 2016-11-15 2018-05-17 Advanced Semiconductor Engineering, Inc. Semiconductor system and device package including interconnect structure
CN106558574A (zh) 2016-11-18 2017-04-05 华为技术有限公司 芯片封装结构和方法
US10381300B2 (en) 2016-11-28 2019-08-13 Advanced Semiconductor Engineering, Inc. Semiconductor device package including filling mold via
US10700011B2 (en) 2016-12-07 2020-06-30 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming an integrated SIP module with embedded inductor or package
US10438889B2 (en) 2016-12-23 2019-10-08 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
US10535597B2 (en) 2017-01-13 2020-01-14 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method thereof
US10157887B2 (en) 2017-03-09 2018-12-18 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
US10418332B2 (en) 2017-03-13 2019-09-17 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming partition fence and shielding layer around semiconductor components
US10411766B2 (en) 2017-03-14 2019-09-10 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
TWI649839B (zh) 2017-03-15 2019-02-01 矽品精密工業股份有限公司 電子封裝件及其基板構造
US20200126921A1 (en) 2017-04-01 2020-04-23 Intel Corporation Architectures and methods of fabricating 3d stacked packages
US10325868B2 (en) 2017-04-24 2019-06-18 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
US10381316B2 (en) 2017-05-10 2019-08-13 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
US10134677B1 (en) 2017-05-16 2018-11-20 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
TWI652787B (zh) 2017-05-25 2019-03-01 矽品精密工業股份有限公司 電子封裝件及其製法
US10157821B1 (en) 2017-05-30 2018-12-18 Advanced Semiconductor Engineering, Inc. Semiconductor packages
US9997447B1 (en) 2017-06-08 2018-06-12 Advanced Ssemiconductor Engineering, Inc. Semiconductor devices
CN109103167B (zh) 2017-06-20 2020-11-03 晟碟半导体（上海）有限公司 用于存储器装置的异构性扇出结构
US20180374798A1 (en) 2017-06-24 2018-12-27 Amkor Technology, Inc. Semiconductor device having emi shielding structure and related methods
US10229892B2 (en) 2017-06-28 2019-03-12 Advanced Semiconductor Engineering, Inc. Semiconductor package and method for manufacturing a semiconductor package
JP6908112B2 (ja) 2017-06-30 2021-07-21 株式会社村田製作所 電子部品モジュール及びその製造方法
US20190013301A1 (en) 2017-07-04 2019-01-10 Intel Corporation Stacked dies with passive components within facing recesses
US10224301B2 (en) 2017-07-05 2019-03-05 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
US10096578B1 (en) 2017-07-06 2018-10-09 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
US10978406B2 (en) 2017-07-13 2021-04-13 Mediatek Inc. Semiconductor package including EMI shielding structure and method for forming the same
US10522476B2 (en) 2017-07-18 2019-12-31 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure, integrated fan-out package and method of fabricating the same
TW201911508A (zh) 2017-08-02 2019-03-16 矽品精密工業股份有限公司 電子封裝件
US10586751B2 (en) 2017-08-03 2020-03-10 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
US11024569B2 (en) 2017-08-09 2021-06-01 Advanced Semiconducor Engineering, Inc. Semiconductor package device and method of manufacturing the same
US10453802B2 (en) 2017-08-30 2019-10-22 Advanced Semiconductor Engineering, Inc. Semiconductor package structure, semiconductor device and method for manufacturing the same
US10332862B2 (en) 2017-09-07 2019-06-25 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and method for manufacturing the same
US10468384B2 (en) 2017-09-15 2019-11-05 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming embedded die substrate, and system-in-package modules with the same
US10548249B2 (en) 2017-09-27 2020-01-28 Intel Corporation Shielding in electronic assemblies
WO2019066987A1 (en) 2017-09-30 2019-04-04 Intel Corporation STACK OF MULTIPLE MATERIALS WITH DIMENSION TOLERANCE
US11296052B2 (en) 2017-09-30 2022-04-05 Intel Corporation TSV-less die stacking using plated pillars/through mold interconnect
US10515889B2 (en) 2017-10-13 2019-12-24 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
US10418314B2 (en) 2017-11-01 2019-09-17 Advanced Semiconductor Engineering, Inc. External connection pad for semiconductor device package
EP3481161A1 (en) 2017-11-02 2019-05-08 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with transistor components arranged side by side
KR102400101B1 (ko) 2017-11-03 2022-05-19 삼성전자주식회사 Pop 반도체 패키지 및 그를 포함하는 전자 시스템
US10714403B2 (en) 2017-11-03 2020-07-14 Advanced Semiconductor Engineering, Inc. Semiconductor device package with patterned conductive layers and an interconnecting structure
US10629454B2 (en) 2017-11-08 2020-04-21 Advanced Semiconductor Engineering, Inc. Semiconductor package device and method of manufacturing the same
EP3483921A1 (en) 2017-11-11 2019-05-15 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Embedding known-good component in known-good cavity of known-good component carrier material with pre-formed electric connection structure
US10546817B2 (en) 2017-12-28 2020-01-28 Intel IP Corporation Face-up fan-out electronic package with passive components using a support
DE112017008333T5 (de) 2017-12-29 2020-09-10 Intel Corporation Mikroelektronische anordnungen
DE112017008313T5 (de) 2017-12-29 2020-09-17 Intel Corporation Mikroelektronische anordnungen
US11348897B2 (en) 2017-12-29 2022-05-31 Intel Corporation Microelectronic assemblies
WO2019132963A1 (en) 2017-12-29 2019-07-04 Intel Corporation Quantum computing assemblies
TWI643307B (zh) 2018-01-30 2018-12-01 矽品精密工業股份有限公司 電子封裝件及其製法
US11004779B2 (en) 2018-02-09 2021-05-11 Advanced Semiconductor Engineering, Inc. Semiconductor device package and a method of manufacturing the same
TWI645527B (zh) 2018-03-06 2018-12-21 矽品精密工業股份有限公司 電子封裝件及其製法
CN110299329A (zh) 2018-03-21 2019-10-01 华为技术有限公司 一种封装结构及其制作方法、电子设备
US10497635B2 (en) 2018-03-27 2019-12-03 Linear Technology Holding Llc Stacked circuit package with molded base having laser drilled openings for upper package
US10790161B2 (en) 2018-03-27 2020-09-29 Amkor Technology, Inc. Electronic device with adaptive vertical interconnect and fabricating method thereof
US11424195B2 (en) 2018-04-02 2022-08-23 Intel Corporation Microelectronic assemblies having front end under embedded radio frequency die
TWI647796B (zh) 2018-04-09 2019-01-11 矽品精密工業股份有限公司 電子封裝件及其製法
US10811763B2 (en) 2018-04-11 2020-10-20 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
US11380609B2 (en) 2018-05-21 2022-07-05 Intel Corporation Microelectronic assemblies having conductive structures with different thicknesses on a core substrate
TWI688075B (zh) 2018-05-23 2020-03-11 矽品精密工業股份有限公司 電子封裝件
US11309192B2 (en) 2018-06-05 2022-04-19 Intel Corporation Integrated circuit package supports
US10861779B2 (en) 2018-06-22 2020-12-08 Advanced Semiconductor Engineering, Inc. Semiconductor device package having an electrical contact with a high-melting-point part and method of manufacturing the same
US11227841B2 (en) 2018-06-28 2022-01-18 Intel Corporation Stiffener build-up layer package
US10825696B2 (en) 2018-07-02 2020-11-03 Taiwan Semiconductor Manufacturing Company, Ltd. Cross-wafer RDLs in constructed wafers
US10636756B2 (en) 2018-07-05 2020-04-28 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming protrusion E-bar for 3D SIP
US20200051927A1 (en) 2018-08-13 2020-02-13 Mediatek Inc. Semiconductor device with an em-integrated damper
KR102509052B1 (ko) 2018-08-31 2023-03-10 에스케이하이닉스 주식회사 브리지 다이를 포함하는 스택 패키지
US11309294B2 (en) 2018-09-05 2022-04-19 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated fan-out packages and methods of forming the same
US11605877B2 (en) 2018-09-07 2023-03-14 Advanced Semiconductor Engineering, Inc. Semiconductor device package and method of manufacturing the same
US11462463B2 (en) 2018-09-27 2022-10-04 Intel Corporation Microelectronic assemblies having an integrated voltage regulator chiplet
EP3633721A1 (en) 2018-10-04 2020-04-08 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Component carrier with face-up and face-down embedded components
EP3633716A1 (en) 2018-10-05 2020-04-08 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Package with embedded electronic component being encapsulated in a pressureless way
US11244908B2 (en) 2018-11-06 2022-02-08 STATS ChipPAC Pte. Ltd. Method and device for reducing metal burrs when sawing semiconductor packages
CN109390127B (zh) 2018-11-12 2024-01-30 矽力杰半导体技术(杭州)有限公司 可支撑式封装器件和封装组件
US11410977B2 (en) 2018-11-13 2022-08-09 Analog Devices International Unlimited Company Electronic module for high power applications
US10867929B2 (en) 2018-12-05 2020-12-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor structures and methods of forming the same
US20200185293A1 (en) 2018-12-07 2020-06-11 Infineon Technologies Ag Semiconductor Package Having a Laser-Activatable Mold Compound
US11942334B2 (en) 2018-12-21 2024-03-26 Intel Corporation Microelectronic assemblies having conductive structures with different thicknesses
US11521914B2 (en) 2018-12-27 2022-12-06 Intel Corporation Microelectronic assemblies having a cooling channel
JP7151567B2 (ja) 2019-03-14 2022-10-12 株式会社オートネットワーク技術研究所 回路装置及び電子制御ユニットと回路装置との接続構造
US10602612B1 (en) 2019-07-15 2020-03-24 Apple Inc. Vertical module and perpendicular pin array interconnect for stacked circuit board structure
US20210082790A1 (en) 2019-09-18 2021-03-18 Alpha And Omega Semiconductor (Cayman) Ltd. Power semiconductor package having integrated inductor and method of making the same
WO2021124691A1 (ja) 2019-12-20 2021-06-24 株式会社村田製作所 高周波モジュール及び通信装置
US11844178B2 (en) 2020-06-02 2023-12-12 Analog Devices International Unlimited Company Electronic component

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101800523A (zh) * 2009-02-10 2010-08-11 日本电波工业株式会社 具有底座的晶体振荡器装置
CN102088241A (zh) * 2009-12-07 2011-06-08 英特赛尔美国股份有限公司 层叠电感器-电子封装组件及其制造技术
CN107170718A (zh) * 2016-03-08 2017-09-15 Abb瑞士股份有限公司 半导体模块
CN106793564A (zh) * 2016-12-30 2017-05-31 东莞联桥电子有限公司 一种多层pcb盲孔的插件方法

Also Published As

Publication number Publication date
US20190304865A1 (en) 2019-10-03
US20210111084A1 (en) 2021-04-15
US10497635B2 (en) 2019-12-03
KR20200133739A (ko) 2020-11-30
CN110537253A (zh) 2019-12-03
TWI753238B (zh) 2022-01-21
US11749576B2 (en) 2023-09-05
TW201943043A (zh) 2019-11-01
WO2019190741A1 (en) 2019-10-03

Similar Documents

Publication Publication Date Title
CN110537253B (zh) 带有具有用于上部封装的激光钻孔的开口的模制基底的堆叠电路封装
US10854575B2 (en) Three-dimensional (3D) package structure having an epoxy molding compound layer between a discrete inductor and an encapsulating connecting structure
KR100734816B1 (ko) 전자 소자 캐리어를 위한 최적화된 덮개의 장착
US8890337B1 (en) Column and stacking balls package fabrication method and structure
US6020629A (en) Stacked semiconductor package and method of fabrication
US7193329B2 (en) Semiconductor device
US7939920B2 (en) Multiple die integrated circuit package
US8124453B2 (en) Vertically packaged MOSFET and IC power devices as integrated module using 3D interconnected laminates
EP0575806A2 (en) Package for integrated circuit chips
EP0571749A1 (en) Stacking semiconductor multi-chip module and method for making the same
US20080050859A1 (en) Methods for a multiple die integrated circuit package
US20130181332A1 (en) Package leadframe for dual side assembly
US11844178B2 (en) Electronic component
US20200152614A1 (en) Electronic module for high power applications
US7185799B2 (en) Method of creating solder bar connections on electronic packages
US7310239B1 (en) IC packaging interposer having controlled impedance or optical interconnections and an integral heat spreader
US7964947B2 (en) Stacking packages with alignment elements
JPH04280667A (ja) 高集積半導体装置
KR200231862Y1 (ko) 반도체 패키지
US6645794B2 (en) Method of manufacturing a semiconductor device by monolithically forming a sealing resin for sealing a chip and a reinforcing frame by transfer molding
KR20000025382A (ko) 적층형 반도체 패키지
CN108513432A (zh) 电子元件组件和其组装方法

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
TA01 Transfer of patent application right

Effective date of registration: 20200921

Address after: Limerick

Applicant after: Analog equipment International Co.,Ltd.

Address before: Massachusetts, USA

Applicant before: Linear Technology Holding LLC

TA01 Transfer of patent application right
CB02 Change of applicant information

Address after: Limerick

Applicant after: ANALOG DEVICES INTERNATIONAL UNLIMITED Co.

Address before: Limerick

Applicant before: Analog equipment International Co.,Ltd.

CB02 Change of applicant information
GR01 Patent grant
GR01 Patent grant