TWI688075B - 電子封裝件 - Google Patents

電子封裝件 Download PDF

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TWI688075B
TWI688075B TW107117524A TW107117524A TWI688075B TW I688075 B TWI688075 B TW I688075B TW 107117524 A TW107117524 A TW 107117524A TW 107117524 A TW107117524 A TW 107117524A TW I688075 B TWI688075 B TW I688075B
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feed line
item
patent application
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TW202005039A (zh
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盧盈維
方柏翔
陳冠達
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矽品精密工業股份有限公司
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Priority to TW107117524A priority Critical patent/TWI688075B/zh
Priority to CN201810567459.8A priority patent/CN110534872B/zh
Priority to US16/192,262 priority patent/US10903547B2/en
Publication of TW202005039A publication Critical patent/TW202005039A/zh
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    • HELECTRICITY
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    • H01QANTENNAS, i.e. RADIO AERIALS
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    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2283Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
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    • H01Q1/22Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/24Supports; Mounting means by structural association with other equipment or articles with receiving set
    • H01Q1/241Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM
    • H01Q1/242Supports; Mounting means by structural association with other equipment or articles with receiving set used in mobile communications, e.g. GSM specially adapted for hand-held use
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Abstract

一種電子封裝件,係將天線結構及調整結構配置於一承載結構上,且該天線結構係包含位於不同層之天線本體與饋入線、及連通各層間以電性連接該天線本體與該饋入線之導電柱,其中,該調整結構係自該饋入線延伸出,以改善該天線本體之頻寬。

Description

電子封裝件
本發明係有關一種電子封裝件,尤指一種具天線結構之電子封裝件。
隨著電子產業的蓬勃發展,電子產品也逐漸邁向多功能、高性能的趨勢。目前無線通訊技術已廣泛應用於各式各樣的消費性電子產品以利接收或發送各種無線訊號。為了滿足消費性電子產品的外觀設計需求,無線通訊模組之製造與設計係朝輕、薄、短、小之需求作開發,其中,平面天線(Patch Antenna)因具有體積小、重量輕與製造容易等特性而廣泛利用於手機(cell phone)等電子產品之無線通訊模組中。
第1A圖係習知無線通訊模組之剖視示意圖。該無線通訊模組1係包括:一基板10、設於該基板10上之晶片(圖略)、一天線結構12以及一接地結構15。該基板10係為電路板並呈矩形體,其具有複數絕緣層13a,13b,13c。該晶片係配置於該基板10上且電性連接該基板10。該天線結構12係具有一設於上側絕緣層13a之天線本體120、一設於下側絕緣層13c之饋入線(feed line)121及貫穿該些 絕緣層13a,13b,13c以電性連接該天線本體120與該饋入線121之導電柱122,且如第1B圖所示,該饋入線121之其中一端係為埠口121a,而另一端係連接導電柱122。該接地結構15係具有分別設於該些絕緣層13b,13c上之兩接地層15a,15b及複數用以連接該些接地層15a,15b之導電盲孔150。
再者,於習知無線通訊模組1中,該天線本體120例如為貼片天線(patch antenna),其結構簡單且易於設計,但因其頻寬窄小,造成應用上受制。
據此,業界遂改在該天線本體120的上方增設一介電層140與寄生金屬貼片(Parasitic patch)141以作為調整結構14,使該寄生金屬貼片141產生額外的共振頻帶以增加頻寬,藉此改善習知天線本體120(即貼片天線)之頻寬限制。
惟,習知無線通訊模組1中,係採用增層方式,將該調整結構14以壓合方式形成於該天線本體120之上方,因而於製作越多層的介電層140及寄生金屬貼片141時,不僅製程步驟增加、成本提高及整體結構厚度增厚,且可能導致良率下降問題。
因此,如何克服上述習知技術之種種問題,實已成目前亟欲解決的課題。
鑑於上述習知技術之種種缺失,本發明係揭露一種電子封裝件,係包括:承載結構;天線結構,係結合該承載 結構,其中,該天線結構係包含天線本體、饋入線、及電性連接該天線本體與該饋入線之導電柱;以及調整結構,係結合該承載結構並自該饋入線延伸出。
前述之電子封裝件中,該饋入線之其中一端為埠口,另一端連接該導電柱與該調整結構。
前述之電子封裝件中,該調整結構與該饋入線係形成於同一表面上。
前述之電子封裝件中,該調整結構與該饋入線係一體成形。
前述之電子封裝件中,該調整結構與該饋入線係由同一金屬層構成。
前述之電子封裝件中,該調整結構係包含連接該饋入線之導線及連接該導線之作用部。例如,該導線之其中一端係分叉出該作用部與一延長部。
前述之電子封裝件中,復包括結合該承載結構之接地結構。例如,該接地結構係包含複數接地層及用以連接該接地層之導電盲孔。進一步,該調整結構係電性連接該接地結構。
由上可知,本發明之電子封裝件中,主要藉由該調整結構自該饋入線延伸而出之設計,以改善該天線本體之頻寬而增加其實用性。
再者,藉由該調整結構自該饋入線延伸而出之設計,使該調整結構與該饋入線能形成於同一表面上,且能一同製作及一體成形該調整結構與該饋入線,故相較於習知調 整結構設在該天線本體上方之結構,本發明之電子封裝件無需額外製程步驟,即可製作該調整結構,因而能提高良率、降低成本及薄化該電子封裝件整體結構厚度等優點。
1:無線通訊模組
10:基板
12,22:天線結構
120,220:天線本體
121,221:饋入線
121a,221a:埠口
122,222:導電柱
13a,13b,13c‧‧‧絕緣層
14,24‧‧‧調整結構
140‧‧‧介電層
141‧‧‧寄生金屬貼片
15,25‧‧‧接地結構
15a,15b,25a,25b‧‧‧接地層
150,250‧‧‧導電盲孔
2‧‧‧電子封裝件
20‧‧‧承載結構
221b‧‧‧墊部
23a,23b,23c‧‧‧絕緣層
240‧‧‧導線
241‧‧‧作用部
242‧‧‧延長部
第1A圖係為習知無線通訊模組之剖視示意圖;第1B圖係為習知無線通訊模組之局部上視示意圖;第2A圖係為本發明之電子封裝件之剖視示意圖;第2B圖係為第2A圖的底視平面示意圖;第2C圖係為第2A圖之層間之局部平面示意圖;以及第2C’圖係為第2C圖的另一實施例。
以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如“上”及“一”等之用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。
第2A至2C圖係為本發明之電子封裝件2之示意圖。於本實施例中,該電子封裝件2例如為系統級封裝(System in package,簡稱SiP)之無線通訊模組。
該電子封裝件2係包括:承載結構20、設於該承載結構20上之電子元件(圖略)、天線結構22、調整結構24以及接地結構25。
如第2A圖所示,所述之承載結構20係呈矩形體。於本實施例中,該承載結構20係例如為具有核心層與線路結構之封裝基板(substrate)或無核心層(coreless)之線路結構,係包含有複數絕緣層23a,23b,23c及形成於該絕緣層23a,23b,23c上之複數線路層,如扇出(fan out)型重佈線路層(redistribution layer,簡稱RDL)。
再者,該絕緣層23a,23b,23c係為介電材、聚醯亞胺(polyimide,簡稱PI)、乾膜(dry film)、環氧樹脂(epoxy)或封裝材(molding compound)等,但不限於上述。
所述之電子元件係為主動元件、被動元件或其二者組合,且該主動元件係例如半導體晶片,而該被動元件係例如電阻、電容及電感。於本實施例中,該電子元件係藉由複數銲線以打線方式電性連接該線路層;或者,該電子元件可藉由藉由複數如銲錫材料之導電凸塊以覆晶方式設於該線路層上並電性連接該線路層;亦或,該電子元件可直接接觸該線路層。應可理解地,有關該電子元件電性連接該承載結構20之方式繁多,不限於上述。
所述之天線結構22係結合該承載結構20並電性連接 該承載結構20之線路層,且包含一設於上側絕緣層23a之天線本體220、一設於下側絕緣層23c之饋入線(feed line)221、貫穿該些絕緣層23a,23b,23c以電性連接該天線本體220與該饋入線221之導電柱222。
於本實施例中,可藉由塗佈金屬層(如銅材)之加工方式形成該天線結構22,如濺鍍(sputtering)、蒸鍍(vaporing)、電鍍或化鍍等;或者,利用壓合或貼膜(foiling)等設置方式形成該天線本體220。
再者,如第2C圖所示,該饋入線221之其中一端係為埠口221a以電性連接該承載結構20之線路層,而另一端係為墊部221b以連接該導電柱222與該調整結構24,其中,該導電柱222係自該墊部221b朝縱向(垂直墊部221b平面方向)延伸。
所述之調整結構24係自該饋入線221延伸而出,以作為步階阻抗共振器(stepped impedance resonator,簡稱SIR),使該調整結構24能進行匹配調整。
於本實施例中,該調整結構24與該饋入線221係形成於同一絕緣層23b上。例如,該調整結構24與該饋入線221可利用圖案化(如電鍍金屬或蝕刻金屬)製程一同製作以成為同一金屬層,甚至可與該承載結構之線路層一同製作,如RDL製程。
再者,該調整結構24係包含一連接該墊部221b之導線240與一連接該導線240之作用部241。具體地,如第2C圖所示,該調整結構24係以其導線240自該墊部221b 沿同一平面延伸,使該導線240之另一端形成該作用部241。
所述之接地結構25係結合該承載結構20,其包含設於該承載結構20上之兩接地層25a,25b及複數用以連接該些接地層25a,25b且圍繞該饋入線221與該調整結構24佈設之導電盲孔250。
於本實施例中,該些接地層25a,25b係相互隔離,且配置於絕緣層之相對兩側上,例如分別位於不同絕緣層23b,23c上。具體地,可藉由塗佈金屬層(如銅材)之加工方式形成該接地結構25,如濺鍍(sputtering)、蒸鍍(vaporing)、電鍍或化鍍等;或者,利用壓合或貼膜(foiling)等設置方式形成該些接地層25a,25b。
再者,該些接地層25a,25b可依需求選擇覆蓋該承載結構20之表面區域之垂直投影範圍,如第2B圖所示之全部表面,使其垂直投影範圍大於該天線本體220之垂直投影範圍。
又,如第2C’圖所示,該調整結構24可包含一連接該導線240之延長部242,以連接至其中一導電盲孔250。具體地,該導線240的末端係分叉,其中一歧路為作用部241,其視為短路殘段(short end stub),而另一歧路為延長部242,其視為開路殘段(open end stub),理論上,末端短路之步階阻抗共振器於共振頻率時可視為電容與電感並聯之等效結構,使該作用部241與該延長部242亦可視為電容與電感並聯之等效結構,以經適當的設計調整也能與SIR具同 樣之效果。
綜上所述,本發明之電子封裝件2中,主要藉由該調整結構24自該饋入線221延伸而出之設計,以改善該天線本體220之頻寬而增加其實用性。
再者,藉由該調整結構24自該饋入線221延伸而出之設計,使該調整結構24與該饋入線221能形成於同一絕緣層23b上,且能一同製作及一體成形該調整結構24與該饋入線221,故相較於習知調整結構設在該天線本體上方之結構,本發明之電子封裝件無需額外製程步驟,即可製作該調整結構24,因而能提高良率、降低成本及薄化該電子封裝件2整體結構厚度等優點。
上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修改。因此本發明之權利保護範圍,應如後述之申請專利範圍所列。
221‧‧‧饋入線
221a‧‧‧埠口
221b‧‧‧墊部
23b‧‧‧絕緣層
24‧‧‧調整結構
240‧‧‧導線
241‧‧‧作用部
250‧‧‧導電盲孔

Claims (10)

  1. 一種電子封裝件,係包括:承載結構;天線結構,係結合該承載結構並係包含天線本體、饋入線及電性連接該天線本體與該饋入線之導電柱;以及調整結構,係結合該承載結構並自該饋入線延伸出,以供調整該天線本體之頻寬。
  2. 如申請專利範圍第1項所述之電子封裝件,其中,該饋入線之其中一端係為埠口,另一端係連接該導電柱與該調整結構。
  3. 如申請專利範圍第1項所述之電子封裝件,其中,該調整結構與該饋入線係形成於同一表面上。
  4. 如申請專利範圍第1項所述之電子封裝件,其中,該調整結構與該饋入線係一體成形。
  5. 如申請專利範圍第1項所述之電子封裝件,其中,該調整結構與該饋入線係由同一金屬層構成。
  6. 如申請專利範圍第1項所述之電子封裝件,其中,該調整結構係包含連接該饋入線之導線及連接該導線之作用部。
  7. 如申請專利範圍第6項所述之電子封裝件,其中,該導線之其中一端係分叉出該作用部與一延長部。
  8. 如申請專利範圍第1項所述之電子封裝件,復包括結合該承載結構之接地結構。
  9. 如申請專利範圍第8項所述之電子封裝件,其中,該接地結構係包含複數接地層及用以連接該接地層之導電盲孔。
  10. 如申請專利範圍第8項所述之電子封裝件,其中,該調整結構係電性連接該接地結構。
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Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3449502B1 (en) 2016-04-26 2021-06-30 Linear Technology LLC Mechanically-compliant and electrically and thermally conductive leadframes for component-on-package circuits
US10497635B2 (en) 2018-03-27 2019-12-03 Linear Technology Holding Llc Stacked circuit package with molded base having laser drilled openings for upper package
KR102678311B1 (ko) * 2018-08-30 2024-06-25 삼성전자주식회사 패키지 볼을 갖는 반도체 패키지를 포함하는 전자 소자
US11410977B2 (en) 2018-11-13 2022-08-09 Analog Devices International Unlimited Company Electronic module for high power applications
US11239193B2 (en) * 2020-01-17 2022-02-01 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit package and method
US11844178B2 (en) 2020-06-02 2023-12-12 Analog Devices International Unlimited Company Electronic component
US20220209391A1 (en) * 2020-12-30 2022-06-30 Texas Instruments Incorporated Antenna in package having antenna on package substrate

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040090369A1 (en) * 2002-11-08 2004-05-13 Kvh Industries, Inc. Offset stacked patch antenna and method
US20140043189A1 (en) * 2012-08-10 2014-02-13 Korea University Research And Business Foundation Dielectric resonator array antenna
TW201434198A (zh) * 2013-02-28 2014-09-01 Advanced Semiconductor Eng 具有波導管天線之半導體封裝件及其製造方法
TW201436166A (zh) * 2013-03-07 2014-09-16 Advanced Semiconductor Eng 包含天線層的半導體封裝件及其製造方法
TW201607142A (zh) * 2014-08-12 2016-02-16 智易科技股份有限公司 天線及其製造方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101212080B (zh) * 2006-12-28 2012-01-04 阎跃军 有机介质天线
TW200832811A (en) * 2007-01-19 2008-08-01 Advanced Connectek Inc Circularly polarized antenna
GB2466255B (en) * 2008-12-17 2013-05-22 Antenova Ltd Antennas conducive to semiconductor packaging technology and a process for their manufacture
CN105609950A (zh) * 2014-11-13 2016-05-25 航天信息股份有限公司 微带天线阵装置
TWI655719B (zh) * 2015-08-12 2019-04-01 矽品精密工業股份有限公司 電子模組
CN205335423U (zh) * 2015-12-15 2016-06-22 昌泽科技有限公司 双层芯片讯号元件结构
CN205944408U (zh) * 2016-07-06 2017-02-08 广东通宇通讯股份有限公司 一种天线
US10957982B2 (en) * 2018-04-23 2021-03-23 Samsung Electro-Mechanics Co., Ltd. Antenna module formed of an antenna package and a connection member

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040090369A1 (en) * 2002-11-08 2004-05-13 Kvh Industries, Inc. Offset stacked patch antenna and method
US20140043189A1 (en) * 2012-08-10 2014-02-13 Korea University Research And Business Foundation Dielectric resonator array antenna
TW201434198A (zh) * 2013-02-28 2014-09-01 Advanced Semiconductor Eng 具有波導管天線之半導體封裝件及其製造方法
TW201436166A (zh) * 2013-03-07 2014-09-16 Advanced Semiconductor Eng 包含天線層的半導體封裝件及其製造方法
TW201607142A (zh) * 2014-08-12 2016-02-16 智易科技股份有限公司 天線及其製造方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
本案說明書之先前技術 *

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