TWI778608B - 電子封裝件及其天線結構 - Google Patents

電子封裝件及其天線結構 Download PDF

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TWI778608B
TWI778608B TW110116023A TW110116023A TWI778608B TW I778608 B TWI778608 B TW I778608B TW 110116023 A TW110116023 A TW 110116023A TW 110116023 A TW110116023 A TW 110116023A TW I778608 B TWI778608 B TW I778608B
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antenna
insulator
conductive
antenna structure
ground
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TW110116023A
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TW202245336A (zh
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賴佳助
林河全
莊明翰
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矽品精密工業股份有限公司
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Priority to TW110116023A priority Critical patent/TWI778608B/zh
Priority to CN202110539808.7A priority patent/CN115313013A/zh
Priority to US17/360,843 priority patent/US12027753B2/en
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Publication of TWI778608B publication Critical patent/TWI778608B/zh
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Abstract

一種電子封裝件,係於絕緣體之其中一側配置接地層,且於該接地層上係垂直立設有嵌埋於該絕緣體中之第一天線部與第二天線部,該第一天線部與第二天線部之間係形成一間隔,使該第一天線部與該第二天線部相互電性匹配,且該接地層係電性連接該第二天線部而未電性連接該第一天線部。

Description

電子封裝件及其天線結構
本發明係有關一種半導體封裝製程,尤指一種具天線結構之電子封裝件。
目前無線通訊技術已廣泛應用於各式消費性電子產品(如手機、平板電腦等),以利接收或發送各種無線訊號。此外,為滿足消費性電子產品的攜帶及上網便利性,無線通訊模組之製造與設計係朝輕、薄、短、小之需求作開發,其中,平面天線(Patch Antenna)因具有體積小、重量輕與製造容易等特性而廣泛利用在電子產品之無線通訊模組中。
目前5G之相關應用技術於未來將全面商品化,其應用頻率範圍約在1GHz~1000GHz之間的高頻頻段,其商業應用模式為5G搭配4G LTE,並於戶外架設一蜂巢式基站以配合設於室內的小基站,故5G行動通訊會於基站內使用大量天線以符合5G系統的大容量快速傳輸且低延遲。
圖1係習知無線通訊模組之立體示意圖。如圖1所示,該無線通訊模組1係包括:一基板10、設於該基板10上之複數電子元件11、天線結構12以及封裝材13。該基板10係為電路板;該電子元件11係設於該基板10上且電性連接該 基板10;該天線結構12係為平面型且具有一天線本體120與一導線121,該天線本體120藉由該導線121電性連接該電子元件11;該封裝材13覆蓋該電子元件11與該部分導線121。另一方面,於5G系統中,因訊號品質與傳輸速度要求,需更多天線配置,以提升訊號的品質與傳輸速度。
惟,習知無線通訊模組1中,該天線結構12係為平面型,且該基板10之長寬尺寸均為固定,故不僅難以縮減該基板10之體積,且該天線結構12之輻射方向受限而限制該天線結構12之功能,若配合5G系統之天線運作,會造成發出的訊號效率不佳,致使該無線通訊模組1難以達到5G系統之天線運作之需求。
因此,如何克服上述習知技術的問題,實已成目前亟欲解決的課題。
鑑於上述習知技術之種種缺失,本發明係提供一種天線結構,係包括:絕緣體,係具有相對兩側;第一天線部,係包含至少一嵌埋於該絕緣體中之柱狀天線本體及至少一佈設於該絕緣體表面上且連接該天線本體之作用線路,其中,該天線本體係自該絕緣體之其中一側延伸至另一側,使該天線本體連通該絕緣體之相對兩側;第二天線部,係包含至少一嵌埋於該絕緣體中之導電柱體及至少一佈設於該絕緣體表面上且連接該導電柱體之輔助線路,其中,該導電柱體係對應該天線本體配置,以令該導電柱體係自該絕緣體之其中一側延伸至另一側,使該導電柱體連通該絕緣體之相對兩側,且令該天線本體與該導電柱體之間形成一間隔,使該第一天線部與該第二天線部相互匹配;以及接地層,係配置於該絕緣體之其中一側上並電性連接該第二天線部,其中,該接地層係未電性連接該第一天線部。
前述之天線結構中,該絕緣體中係配置有複數圍繞該天線本體之導電體。
前述之天線結構中,該絕緣體係配置有相互隔離之複數該接地層。
前述之天線結構中,該第一天線部及/或該第二天線部係位於該接地層之垂直投影範圍內。
前述之天線結構中,該接地層之垂直投影範圍係大於該第一天線部之垂直投影範圍及/或該第二天線部之垂直投影範圍。
前述之天線結構中,該接地層係形成有開口區,以供該天線本體穿過該開口區而不接觸該接地層。
前述之天線結構中,該天線本體之其中一端側係作為訊號源,而另一端側係外露於該絕緣體,供作為發射源。例如,該作用線路係自該天線本體外露於該絕緣層之端側水平延伸而佈設於該絕緣體上。
前述之天線結構中,該導電柱體之其中一端側連接該接地層,而另一端側係外露於該絕緣體。例如,該輔助線路係自該導電柱體外露於該絕緣層之端側水平延伸而佈設於該絕緣體上。
前述之天線結構中,該輔助線路與該作用線路係相互分離。
前述之天線結構中,該輔助線路與該作用線路係相互對齊而排設於一假想直線上。
前述之天線結構中,該第二天線部係作為接地用,使該第一天線部與該第二天線部構成偶極子天線。
前述之天線結構中,該導電柱體係平行該天線本體配置。
本發明復提供一種電子封裝件,係包括:前述之天線結構;以及電子元件,係通訊連接該第一天線部與第二天線部,以令該絕緣體承載該電子元件。
前述之電子封裝件中,該絕緣體係配置有電性連接該電子元件之線路結構,其電性連接該第一天線部與第二天線部。
前述之電子封裝件中,復包括一結合該絕緣體之接地部。例如,該接地部係為嵌埋於該絕緣體中之導電結構。進一步,該絕緣體係配置有電性連接該電子元件之線路結構,其電性連接該接地部。或者,該接地部係包含複數導電層及複數電性連接該複數導電層與該接地層之導電盲孔,以令部分該導電層外露於該絕緣體,供作為外接墊。
由上可知,本發明之電子封裝件及其天線結構中,主要藉由將該第一天線部立設於該接地層之上方,且該第一天線部與第二天線部之分佈範圍係不大於該接地層之佈設範圍,故相較於習知技術,本發明之天線結構能有效縮小天線之佈設範圍,以利於減少該絕緣體之佈設面積,且可增加天線配置的靈活性。
再者,該第一天線部與第二天線部之分佈範圍係不大於該接地層之佈設範圍,使該天線本體外露於該絕緣體之端側之輻射方向垂直該作用線路或該絕緣體之表面,因而該天線結構之輻射方向不會受限,以利於提升該天線結構之功能,故相較於習知技術,當該天線結構應用於系統之天線運作,可提升發射訊號之效率,使該電子封裝件易於達到系統之天線運作之需求。
1:無線通訊模組
10:基板
11:電子元件
12:天線結構
120:天線本體
121:導線
13:封裝材
2:天線結構
2a:第一天線部
2b:第二天線部
2c:絕緣體
20:基部
20a:第一表面
20b:第二表面
22:天線本體
22a,22b:端側
220:作用線路
221:墊部
23:絕緣層
23a:表面
24:導電柱體
24a,24b:端側
240:輔助線路
25a,25b:接地層
250:導電體
3:電子封裝件
30:線路結構
301:第一線路層
302:第二線路層
31:電子元件
310:導電凸塊
34:接地部
340:導電層
341:導電盲孔
342:外接墊
36:導電元件
A:開口區
d:厚度
h:高度
L:假想直線
L1,L2:長度
t:間隔
圖1係為習知無線通訊模組之立體示意圖。
圖2A係為本發明之天線結構之剖視示意圖。
圖2B係為本發明之天線結構之立體示意圖。
圖3A係為本發明之電子封裝件之剖視示意圖。
圖3B係為圖3A之局部上視示意圖。
以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如「上」、「第一」、「第二」及「一」等之用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。
圖2A及圖2B係為本發明之天線結構2之示意圖。於本實施例中,該天線結構2係為偶極子天線(Dipole antenna)形式。
如圖2A所示,所述之天線結構2係包括:一絕緣體2c、結合該絕緣體2c之第一天線部2a以及第二天線部2b。
所述之絕緣體2c係包含一基部20及設於該基部20上之絕緣層23,且該基部20係具有相對之第一表面20a與第二表面20b,以令該絕緣層23形成於該基部20之第二表面20b上。
於本實施例中,該基部20係包含如介電材、聚醯亞胺(polyimide,簡稱PI)、乾膜(dry film)、環氧樹脂(epoxy)或封裝材(molding compound)等,但不限於上述。
再者,於該基部20上係配置有至少一接地層25a,25b。例如,該基部20上係配置有複數相互隔離之接地層25a,25b,其分別配置於基部20之第一表面20a與第二表面20b上,並藉由複數如導電盲孔之導電體250連接於該些接地層25a,25b之間。具體地,可藉由塗佈金屬層(如銅材)之加工方式形成該些接地層25a,25b,如濺鍍(sputtering)、蒸鍍(vaporing)、電鍍或化鍍等,或者利用壓合或貼膜(foiling)(如網狀或任意圖案之金屬薄片(foil))等設置方式形成該些接地層25a,25b。
又,該絕緣層23係包含如介電材、聚醯亞胺(polyimide,簡稱PI)、乾膜(dry film)、環氧樹脂(epoxy)或封裝材(molding compound)等,但不限於上述。應可理解地,該基部20與該絕緣層23可依需求為相同材質或相異材質。
所述之第一天線部2a係包含一嵌埋於該絕緣體2c中之天線本體22,其呈導電柱狀並自該絕緣體2c之其中一側延伸至另一側,使該天線本體22連通該絕緣體2c之相對兩側,以令該天線本體22之其中一端側22a位於該基部20中,供作為訊號源,而該天線本體22之另一端側22b係外露於該絕緣體2c,供作為發射源。
於本實施例中,該天線本體22係以其中一端側22a連通該基部20之第一表面20a與第二表面20b,而該天線本體22係穿過該絕緣層23,使該天線本體22之另一端側22b外露於該絕緣層23之表面23a。例如,該天線本體22可於該基部20之第一表面20a上形成墊部221,且該些接地層25a,25b係形成有開口區A,以 令該天線本體22穿過該些開口區A而不接觸該些接地層25a,25b,並使該墊部221位於該開口區A中而不接觸該接地層25a,25b。
再者,該第一天線部2a復包含一連接該天線本體22之作用線路220,其自該天線本體22外露於該絕緣層23之端側22b水平延伸而佈設於該絕緣層23之表面23a上,以藉由調整該作用線路220之長度L1(如圖2B所示)而改變該天線本體22所發出之訊號之波長(或頻率),即該作用線路220之長度L1與輻射波長之間呈一比例關係。
又,該作用線路220之長度與該天線本體22於與該絕緣層23厚度d相同之高度進行調整,以改變該天線本體22之阻抗值。
另外,可藉由佈設金屬層(如銅材)之加工方式形成該第一天線部2a,如濺鍍(sputtering)、蒸鍍(vaporing)、電鍍或化鍍等;或者,利用壓合或貼置框架(frame)等設置方式形成該第一天線部2a。
所述之第二天線部2b係包含一嵌埋於該絕緣體2c中之導電柱體24,其自該絕緣體2c之其中一側延伸至另一側,使該導電柱體24連通該絕緣體2c之相對兩側,以令該導電柱體24之其中一端側24a連接該些接地層25a,25b,而該導電柱體24之另一端側24b係外露於該絕緣體2c。
於本實施例中,該導電柱體24係平行該天線本體22配置,以令該天線本體22與該導電柱體24之間形成一間隔t,使該第一天線部2a與該第二天線部2b相互對稱配置,且該第一天線部2a與該第二天線部2b係相互電性匹配。例如,該第二天線部2b係作為接地用,使該第一天線部2a與該第二天線部2b構成偶極子天線。
再者,該第二天線部2b復包含一連接該導電柱體24之輔助線路240,其自該導電柱體24外露於該絕緣層23之端側24b水平延伸而佈設於該絕緣層23之表面23a上,以令該輔助線路240配合該作用線路220調整其長度L2(如圖 2B所示),使該天線本體22能符合所需發出之訊號之波形。例如,該輔助線路240與該作用線路220係相互分離而保持該間隔t之距離,且兩者係相互對齊而排設於一假想直線L上,如圖2B所示。
又,該些接地層25a,25b可依需求選擇覆蓋該基部20之表面區域之垂直投影範圍,如圖2B所示之全部表面,使其垂直投影範圍大於該第一天線部2a之垂直投影範圍及/或該第二天線部2b之垂直投影範圍。例如,該第一天線部2a及/或該第二天線部2b係位於該接地層25a,25b之垂直投影範圍內
另外,可藉由佈設金屬層(如銅材)之加工方式形成該第二天線部2b,如濺鍍(sputtering)、蒸鍍(vaporing)、電鍍或化鍍等;或者,利用壓合或貼置框架(frame)等設置方式形成該導電柱體24。
應可理解地,該基部20及/或該絕緣層23可依需求利用圖案化(如電鍍金屬或蝕刻金屬)佈線製程,如線路重佈層(Redistribution Layer,簡稱RDL)製程,一併製作該第一天線部2a與第二天線部2b。
因此,本發明之天線結構2主要藉由將該第一天線部2a立設於該接地層25a,25b之上方,使該天線本體22外露之端側22b之輻射方向垂直該作用線路220或該基部20之第一表面20a(或朝該天線本體22之柱身方向),且該第一天線部2a與第二天線部2b之分佈範圍(或垂直投影範圍)係不大於該接地層25a,25b之佈設範圍(或垂直投影範圍),故相較於習知技術,本發明之天線結構2能有效縮小天線之佈設範圍,以利於減少該絕緣體2c(或該基部20之第一表面20a)之佈設面積,且能增加天線配置的靈活性。
再者,由於該第一天線部2a(或該作用線路240)之分佈範圍(或垂直投影範圍)係不大於該接地層25a之佈設範圍(或垂直投影範圍),使該接地層25a能作為反射片,以有效反射該作用線路220之訊號,因而該天線本體22外露之端側22b之輻射方向能垂直該作用線路220或該基部20之第一表面20a(或朝 該天線本體22之柱身方向),故該天線結構2之輻射方向不會受限,以利於提升該天線結構2之功能。
又,該天線本體22的訊號源(該天線本體22位於該基部20之端側22a或墊部221)周圍設置多個接地用之導電體250,即該些導電體250圍繞該天線本體22配置,以屏蔽該訊號源,因而能減少該天線本體22之訊號失真或損失。
圖3A係為本發明之電子封裝件3之剖面示意圖。如圖3A所示,所述之電子封裝件3係包括一天線結構2以及至少一通訊連接該第一天線部2a與第二天線部2b之電子元件31。
於本實施例中,該電子封裝件3復包括一配置於該絕緣體2c上之接地部34,且該絕緣體2c係承載該電子元件31。
所述之絕緣體2c之基部20係配置有一線路結構30,以形成具有核心層與線路層之封裝基板(substrate)或無核心層(coreless)之多層線路層,且該線路結構30係包含至少一形成於該基部20內之第一線路層301與第二線路層302,如扇出(fan out)型重佈線路層(redistribution layer,簡稱RDL)。
於本實施例中,其中一接地層25b係設於該基部20之第二表面20b上,而另一接地層25a係設於該基部20內,以令該些接地層25a,25b相互隔離,且兩者之間係藉由至少一導電體250相互連接。
所述之絕緣體2c之絕緣層23係結合於該基部20之第二表面20b上,且形成該絕緣層23之材質例如為聚醯亞胺(polyimide,簡稱PI)、乾膜(dry film)或封裝材(molding compound)等,但並不限於上述。
所述之電子元件31係設於該基部20上,其可設於該第一表面20a上或該第二表面20b上,甚至可依需求同時配置於該第一表面20a與該第二表面20b上,且可依需求埋設於該基部20及/或絕緣層23中。
於本實施例中,該電子元件31係為主動元件、被動元件或其二者組合等,其中,該主動元件係例如為半導體晶片,且該被動元件係例如為電阻、電容及電感。例如,該電子元件31係為具毫米波(mmWave)功能之半導體晶片,並藉由複數如銲錫材料或銅材料之導電凸塊310以覆晶方式設於該第一線路層301與第二線路層302上並電性連接該第一線路層301與第二線路層302;或者,該電子元件31可藉由複數銲線(圖略)以打線方式電性連接該第一線路層301與第二線路層302;亦或,該電子元件31可直接接觸該第一線路層301與第二線路層302。然而,有關該電子元件31電性連接該線路層之方式不限於上述。
因此,藉由該基部20與線路結構30係採用封裝製程用之載板製作,以承載該電子元件31,使該電子元件31能藉由該第一線路層301與第二線路層302通訊連接該第一天線部2a與第二天線部2b。
所述之第一天線部2a係設於該基部20上並結合該絕緣層23且藉由該第一線路層301電性連接該電子元件31。
於本實施例中,該第一天線部2a並未埋入該基部20中,其天線本體22係立設於該基部20之第二表面20b上並嵌埋於該絕緣層23中,且該天線本體22之其中一端側22a係結合該基部20之第二表面20b並電性連接該第一線路層301,而該天線本體22之另一端側22b係外露於該絕緣層23並作為發射源。例如,該天線本體22之其中一端側22a可藉由該墊部221結合於該基部20之第二表面20b上並電性連接該第一線路層301,且該些接地層25a,25b係形成有開口區A,以供該墊部221與第一線路層301穿過該開口區A而不接觸該接地層25a,25b。
再者,該第一天線部2a之作用線路220係自該天線本體22外露之端側22b水平延伸而佈設於該絕緣層23之表面23a上。
所述之第二天線部2b亦立設於該基部20上並結合該絕緣層23且藉由該第二線路層302電性連接該電子元件31。
於本實施例中,該第二天線部2b之導電柱體24與該天線本體22之間係保持一間隔t,使該第一天線部2a與該第二天線部2b相互匹配而構成偶極子天線,且該第二天線部2b之輔助線路240係自該導電柱體24之外露端側24b水平延伸而佈設於該絕緣層23之表面23a上。例如,該輔助線路240與該作用線路220係相互分離而保持該間隔t之距離,且兩者相互對齊而排設於一假想直線L上,如圖3B所示。
所述之接地部34係為嵌埋於該基部20中之導電結構,因而其可與該第二線路層302一起製作。例如,該接地部34係包含複數電性連接該第二線路層302之導電層340及複數電性連接該些導電層340與該接地層25a之導電盲孔341,且該導電層340可外露於該基部20之第一表面20a,供作為外接墊342。
另外,該電子封裝件3復包括複數導電元件36,其設於該基部20之第一表面20a上。例如,該導電元件36係例如為銲球(solder ball),其設於該外接墊342上,以電性連接該第二線路層302及/或第一線路層301。
因此,本發明之電子封裝件3採用該天線結構2之設計,故該電子封裝件3能有效縮小天線之佈設範圍,以利於減少封裝製程用之載板之面積,且能增加天線配置的靈活性。
再者,因該天線結構2之輻射方向不會受限而有利於提升該天線結構2之功能,故當該天線結構2應用於5G系統之天線運作,能提升發射訊號之效率,使該電子封裝件3易於達到5G系統之天線運作之需求。
又,該電子封裝件3可利用該接地層25a,25b防止該天線本體22對該電子元件31的串音干擾(cross talking)、噪音干涉(noise interfering)及輻射干擾(radiation interference)等問題。
綜上所述,本發明之電子封裝件及其天線結構,係藉由將該第一天線部立設於該接地層之上方,且該第一天線部與第二天線部之分佈範圍係不大於該接地層之佈設範圍,故本發明之天線結構能有效縮小天線之佈設範圍,以利於減少該絕緣體之佈設面積,且可增加天線配置的靈活性。
再者,藉由該天線本體外露於該絕緣體之端側之輻射方向垂直該作用線路或該絕緣體之表面,使該天線本體外露於該絕緣體之端側之輻射方向垂直該作用線路或該絕緣體之表面,以利於提升該天線結構之功能,故當該天線結構應用於系統之天線運作,可提升發射訊號之效率,使該電子封裝件易於達到系統之天線運作之需求。
上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修改。因此本發明之權利保護範圍,應如後述之申請專利範圍所列。
2:天線結構
2a:第一天線部
2b:第二天線部
2c:絕緣體
20:基部
20a:第一表面
20b:第二表面
22:天線本體
22a,22b:端側
220:作用線路
221:墊部
23:絕緣層
23a:表面
24:導電柱體
24a,24b:端側
240:輔助線路
25a,25b:接地層
250:導電體
A:開口區
d:厚度
h:高度
t:間隔

Claims (19)

  1. 一種天線結構,係包括:絕緣體,係具有相對兩側;第一天線部,係包含至少一嵌埋於該絕緣體中之柱狀之天線本體及至少一佈設於該絕緣體之表面上且連接該天線本體之作用線路,其中,該天線本體係自該絕緣體之其中一側延伸至另一側,使該天線本體連通該絕緣體之相對兩側;第二天線部,係包含至少一嵌埋於該絕緣體中之導電柱體及至少一佈設於該絕緣體之表面上且連接該導電柱體之輔助線路,其中,該導電柱體係對應該天線本體配置,以令該導電柱體係自該絕緣體之其中一側延伸至另一側,使該導電柱體連通該絕緣體之相對兩側,且令該天線本體與該導電柱體之間形成一間隔,使該第一天線部與該第二天線部相互匹配,其中,該第二天線部係作為接地用,使該第一天線部與該第二天線部構成偶極子天線;以及接地層,係配置於該絕緣體之其中一側上並電性連接該第二天線部,而未電性連接該第一天線部。
  2. 如請求項1所述之天線結構,其中,該絕緣體中係配置有複數圍繞該天線本體之導電體。
  3. 如請求項1所述之天線結構,其中,該絕緣體係配置有相互隔離之複數該接地層。
  4. 如請求項1所述之天線結構,其中,該第一天線部及/或該第二天線部係位於該接地層之垂直投影範圍內。
  5. 如請求項1所述之天線結構,其中,該接地層之垂直投影範圍係大於該第一天線部之垂直投影範圍及/或該第二天線部之垂直投影範圍。
  6. 如請求項1所述之天線結構,其中,該接地層係形成有開口區,以供該天線本體穿過該開口區而不接觸該接地層。
  7. 如請求項1所述之天線結構,其中,該天線本體之其中一端側係作為訊號源,而另一端側係外露於該絕緣體,供作為發射源。
  8. 如請求項7所述之天線結構,其中,該作用線路係自該天線本體外露於該絕緣層之端側水平延伸而佈設於該絕緣體上。
  9. 如請求項1所述之天線結構,其中,該導電柱體之其中一端側連接該接地層,而另一端側係外露於該絕緣體。
  10. 如請求項9所述之天線結構,其中,該輔助線路係自該導電柱體外露於該絕緣層之端側水平延伸而佈設於該絕緣體上。
  11. 如請求項1所述之天線結構,其中,該輔助線路與該作用線路係相互分離。
  12. 如請求項1所述之天線結構,其中,該輔助線路與該作用線路係相互對齊而排設於一假想直線上。
  13. 如請求項1所述之天線結構,其中,該導電柱體係平行該天線本體配置。
  14. 一種電子封裝件,係包括:如請求項1~13中之任一者所述之天線結構;以及電子元件,係通訊連接該第一天線部與第二天線部,且令該絕緣體承載該電子元件。
  15. 如請求項14所述之電子封裝件,其中,該絕緣體係配置有電性連接該電子元件之線路結構,其電性連接該第一天線部與第二天線部。
  16. 如請求項14所述之電子封裝件,復包括一結合該絕緣體之接地部。
  17. 如請求項16所述之電子封裝件,其中,該接地部係為嵌埋於該絕緣體中之導電結構。
  18. 如請求項17所述之電子封裝件,其中,該絕緣體係配置有電性連接該電子元件之線路結構,且該線路結構電性連接該接地部。
  19. 如請求項16所述之電子封裝件,其中,該接地部係包含複數導電層及複數電性連接該複數導電層與該接地層之導電盲孔,且令部分該導電層外露於該絕緣體,供作為外接墊。
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