TWI698046B - 電子封裝件及其製法 - Google Patents

電子封裝件及其製法 Download PDF

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Publication number
TWI698046B
TWI698046B TW108101822A TW108101822A TWI698046B TW I698046 B TWI698046 B TW I698046B TW 108101822 A TW108101822 A TW 108101822A TW 108101822 A TW108101822 A TW 108101822A TW I698046 B TWI698046 B TW I698046B
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Taiwan
Prior art keywords
antenna
electronic
electronic component
electronic package
supporting structure
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TW108101822A
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English (en)
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TW202029568A (zh
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蔡文榮
葉懋華
邱志賢
蔡瀛洲
柯俊吉
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矽品精密工業股份有限公司
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Priority to TW108101822A priority Critical patent/TWI698046B/zh
Priority to CN201910058281.9A priority patent/CN111446535B/zh
Priority to US16/535,022 priority patent/US10833394B2/en
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Publication of TWI698046B publication Critical patent/TWI698046B/zh
Publication of TW202029568A publication Critical patent/TW202029568A/zh

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Abstract

一種電子封裝件及其製法，係於承載結構下側接置天線框架、第一電子元件與第二電子元件，且於該承載結構上側結合天線結構，以令該第一電子元件電性連接該天線結構，且該第二電子元件電性連接該天線框架，俾藉由同時整合兩種不同天線型態於同一電子封裝件中，使該電子封裝件於後續應用之電路板，無需增加面積即可具備兩種波長之傳輸訊號之功能。

Description

電子封裝件及其製法
本發明係關於一種電子封裝件，特別是關於一種具有天線結構之電子封裝件及其製法。
現今無線通訊技術已廣泛應用於各式消費性電子產品(如手機、平板電腦等)，以利接收或發送各種無線訊號。同時，為滿足消費性電子產品的便於攜帶性及上網便利性(如觀看多媒體內容)，無線通訊模組之製造與設計係朝輕、薄、短、小之需求作開發，其中，平面天線(Patch Antenna)因具有體積小、重量輕與製造容易等特性而廣泛利用在電子產品之無線通訊模組中。
目前的多媒體內容因畫質的提升而造成其檔案資料量變得更大，故無線傳輸的頻寬也需變大，因而產生第五代的無線傳輸(5G)，且5G因傳輸頻率較高，其相關無線通訊模組的尺寸的要求也較高。
5G之應用頻率範圍約在1GHz~1000GHz之間的高頻頻段，其商業應用模式為5G搭配4G LTE，並於戶外架設一蜂巢式基站以配合設於室內的小基站，故5G行動通訊會於基站內使用大量天線以符合5G系統的大容量快速傳輸且低延遲。
第1圖係習知無線通訊模組1之立體示意圖。如第1圖所示，該無線通訊模組1係包括：一基板10、設於該基板10上之複數電子元件11、一天線結構12以及封裝材13。該基板10係為電路板並呈矩形體。該電子元件11係設於該基板10上且電性連接該基板10。該天線結構12係為平面型且具有一天線本體120與一導線121a，該天線本體120藉由該導線121a電性連接該電子元件11。該封裝材13覆蓋該電子元件11與該部分導線121a。
惟，5G系統因訊號品質與傳輸速度要求，需更多天線配置，以提升訊號的品質與傳輸速度，而習知無線通訊模組1中，該天線結構12係為平面型，且該基板10之長寬尺寸均為固定，因而限制該天線結構12之功能，故無法同時配合5G毫米波及Sub-6Ghz波長之天線運作，因而該無線通訊模組1難以達到5G系統之天線運作之需求。
再者，若終端產品欲同時具備5G毫米波及Sub-6Ghz波長之天線運作，需將兩種天線封裝結構分別接置於終端產品(如智慧型手機)之電路板上，致使該電路板之其它空間上需佈設不同功能之封裝結構或被動元件，故該終端產品所用之電路板之體積需增加，因而該終端產品難以符合輕薄短小之需求。
又，考量該天線結構12係為平面型，且基於該天線結構12與該電子元件11之間的電磁輻射特性及該天線結構12之體積限制，故於製程中，該天線本體120難以與該電子元件11整合製作，亦即，該封裝材13僅覆蓋該電子元件11，並未覆蓋該天線本體120，致使封裝製程之模具需對應該些電子元件11之佈設區域，而非對應該基板10之尺寸，因而不利於封裝製程。
另外，因該天線結構12係為平面型，故需於該基板10之表面上增加佈設區域(未形成該封裝材13之區域)以形成該天線本體120，致使該基板10 之寬度難以縮減，因而難以縮小該無線通訊模組1的寬度，導致該無線通訊模組1無法達到微小化之需求。
因此，如何克服上述習知技術之種種問題，實已成目前亟欲解決的課題。
鑑於上述習知技術之缺失，本發明係提供一種電子封裝件，係包括：承載結構，係具有相對之第一側與第二側；天線結構，係設於該承載結構之第二側上；天線框架，係設於該承載結構之第一側上；第一電子元件，係接置於該承載結構之第一側上並耦接該天線結構；以及第二電子元件，係接置於該承載結構之第一側上並耦接該天線框架。
本發明復提供一種電子封裝件之製法，係包括：提供一具有相對之第一側與第二側之承載結構，且於該承載結構之第一側上設置第一電子元件與第二電子元件；於該承載結構之第二側上設置天線結構，並使該第一電子元件耦接該天線結構；以及設置天線框架於該承載結構之第一側上，並使該第二電子元件耦接該天線框架。
前述之電子封裝件及其製法中，該承載結構係包含有第一線路部，以電性連接該第一電子元件與該天線結構。
前述之電子封裝件及其製法中，該承載結構係包含有第二線路部，以電性連接該第二電子元件與該天線框架。
前述之電子封裝件及其製法中，該天線結構係包含絕緣體與天線本體，該天線本體係包含有相對配置於該絕緣體兩側之第一天線層與第二天線層，且該絕緣體與該第二天線層係結合於該承載結構之第二側上。
前述之電子封裝件及其製法中，該天線結構係為毫米波式天線。
前述之電子封裝件及其製法中，該天線框架係為Sub-6GHz波長型天線。
前述之電子封裝件及其製法中，該第一電子元件與第二電子元件係為不同的射頻晶片。
前述之電子封裝件及其製法中，該第一電子元件係為具發射毫米波功能之半導體晶片。
前述之電子封裝件及其製法中，該第二電子元件係為具發射Sub-6GHz波長功能之半導體晶片。
前述之電子封裝件及其製法中，復包括形成複數導電元件於該承載結構之第一側上。
前述之電子封裝件及其製法中，復包括形成封裝層於該承載結構之第一側上，使該封裝層包覆該天線框架、第一電子元件與第二電子元件。例如，該封裝層係具有外露該承載結構之開孔，以於該開孔中形成導電元件，使該導電元件電性連接該承載結構。
前述之電子封裝件及其製法中，該第一電子元件與第二電子元件位於該天線框架內。
前述之電子封裝件及其製法中，該第一電子元件與第二電子元件之至少其中一者係位於該天線框架外。
前述之電子封裝件及其製法中，該第一電子元件與第二電子元件係間隔排設於該承載結構之第一側上。
前述之電子封裝件及其製法中，該第一電子元件與第二電子元件係相互堆疊。
由上可知，本發明之電子封裝件及其製法中，主要藉由同時整合該天線結構及該天線框架於同一電子封裝件中，故相較於習知技術之分別形成兩封裝結構而設於電路板上，本發明之電子封裝件於後續應用之電路板，其面積無需增加，即可具備兩種波長之傳輸訊號之功能，因而能達到終端產品輕薄短小的需求。
再者，本發明藉由該天線框架之設計，以於製程中，該封裝層能覆蓋該第一電子元件與第二電子元件及該天線框架，使封裝製程之模具能對應該承載結構之尺寸，而有利於封裝製程。
又，該天線框架係架設於該承載結構上而呈立體式天線，因而無需於該承載結構上增加佈設區域，故相較於習知技術，本發明能於預定的承載結構尺寸下增加天線功能，因而得以達到具備兩種天線運作之需求，且能使該電子封裝件符合微小化之需求。
1‧‧‧無線通訊模組
10‧‧‧基板
11‧‧‧電子元件
120,23‧‧‧天線本體
121a‧‧‧導線
13‧‧‧封裝材
2,2’,2”,3,3’,3”‧‧‧電子封裝件
2a,12‧‧‧天線結構
2b‧‧‧天線框架
20‧‧‧承載結構
20a‧‧‧第一側
20b‧‧‧第二側
200‧‧‧介電材
201‧‧‧第一線路部
202‧‧‧第二線路部
21a,31a‧‧‧第一電子元件
21b,31b‧‧‧第二電子元件
210,310‧‧‧導電凸塊
211,311‧‧‧銲線
22‧‧‧絕緣體
22a‧‧‧第一表面
22b‧‧‧第二表面
23a‧‧‧第一天線層
23b‧‧‧第二天線層
24‧‧‧配線部
240‧‧‧導電層
241‧‧‧佈線層
242‧‧‧外接墊
25‧‧‧封裝層
250‧‧‧開孔
26‧‧‧導電元件
9‧‧‧電路板
第1圖係為習知無線通訊模組之剖面示意圖。
第2A至2C圖係為本發明之電子封裝件之製法之剖面示意圖。
第2A’及2A”圖係為第2A圖之其它實施態樣示意圖。
第2D圖係為第2C圖之另一實施態樣示意圖。
第3A至3C圖係為本發明之電子封裝件之製法其它實施態樣之剖面示意圖。
以下藉由特定的具體實施例說明本發明之實施方式，熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知，本說明書所附圖式所繪示之結構、比例、大小等，均僅用以配合說明書所揭示之內容，以供熟悉此技藝之人士之瞭解與閱讀，並非用以限定本發明可實施之限定條件，故不具技術上之實質意義，任何結構之修飾、比例關係之改變或大小之調整，在不影響本發明所能產生之功效及所能達成之目的下，均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時，本說明書中所引用之如「上」、「第一」、「第二」及「一」等之用語，亦僅為便於敘述之明瞭，而非用以限定本發明可實施之範圍，其相對關係之改變或調整，在無實質變更技術內容下，當亦視為本發明可實施之範疇。
第2A至2C圖係為本發明之電子封裝件之第一實施例之製法之剖面示意圖。
如第2A圖所示，提供一具有相對之第一側20a與第二側20b的承載結構20，且於該第一側20a上接置有至少一天線框架2b、第一電子元件21a與第二電子元件21b，並於該第二側20b上結合一天線結構2a。
所述之承載結構20例如為具有核心層與線路結構之封裝基板(substrate)或無核心層(coreless)之線路結構，其包含介電材200及至少一形成於該介電材200上之第一線路部201與第二線路部202，如至少一扇出(fan out)型重佈線路層(redistribution layer，簡稱RDL)。
於本實施例中，該承載結構20復可具有配線部24，其包含一可接地該天線結構2a之導電層240、至少一電性連接該導電層240與該第一線路部201、第二線路部202之佈線層241、及複數電性連接該佈線層241並外露於該第一側20a之外接墊242。例如，該配線部24係為可與該第一及第二線路部201,202一起製作於該介電材200中。
再者，該導電層240可為至少一完整、網狀或任意圖案之金屬薄片(foil)；或者，該導電層240可為圖案化之導電材。
所述之第一電子元件21a與第二電子元件21b係設於該承載結構20之第一側20a上，例如該第一電子元件21a與第二電子元件21b係為不同的射頻晶片。
於本實施例中，該第一電子元件21a係為具發射5G毫米波(mm Wave)功能之半導體晶片，其電性連接該第一線路部201，且該第二電子元件21b係為具發射Sub-6GHz波長功能之半導體晶片，其電性連接該第二線路部202。
再者，該第一電子元件21a藉由複數如銲錫材料之導電凸塊210以覆晶方式設於該第一線路部201上並電性連接該第一線路部201；或者，該第一電子元件21a可藉由複數銲線211(如第2A’圖所示)以打線方式電性連接該第一線路部201；亦或，該第一電子元件21a可直接接觸該第一線路部201。同理地，該第二電子元件21b電性連接該第二線路部202之方式亦可採用上述方式。然而，有關該第一電子元件21a與第二電子元件21b電性連接該承載結構20之方式不限於上述。
又，於同一製程中，該第一電子元件21a電性連接該承載結構20之方式與該第二電子元件21b電性連接該承載結構20之方式可相同(如第2A及2A’圖所示)或不相同(如第2A”圖所示)。
另外，該第一電子元件21a與第二電子元件21b係水平間隔排設於該承載結構20之第一側20a上。
所述之天線結構2a係為毫米波式天線，其對應該第一電子元件21a作配置。
於本實施例中，該天線結構2a包含結合於該第二側20b上之絕緣體22及天線本體23。例如，該絕緣體22係具有相對之第一表面22a與第二表面 22b，並以該第二表面22b結合該承載結構20之第二側20b，其中，形成該絕緣體22之材質係為聚醯亞胺(polyimide，簡稱PI)、乾膜(dry film)、環氧樹脂(epoxy)或封裝材(molding compound)等，但並不限於上述。
再者，該天線本體23係結合該絕緣體22並耦接(如電性連接)該第一電子元件21a，以發射毫米波。例如，該天線本體23係包含相互分離且相對應配置於該絕緣體22相對兩側之一第一天線層23a與一第二天線層23b，該第一天線層23a係設於該絕緣體22之第一表面22a上，且該第二天線層23b係位於該絕緣體22之第二表面22b上以接觸該承載結構20之第二側20b並電性連接該第一線路部201，其中，該第一天線層23a之佈設位置係對應該第二天線層23b之佈設位置。
又，可藉由濺鍍(sputtering)、蒸鍍(vaporing)、電鍍、無電電鍍、化鍍或貼膜(foiling)等方式製作厚度輕薄之天線層。例如，於該第一絕緣體22(或該承載結構20)上形成圖案化導電材，以作為第一天線層23a或第二天線層23b，並令該導電層240於該承載結構20之佈設面積大於該第二天線層23b結合該承載結構20之佈設面積。
另外，該第一天線層23a與該第二天線層23b係以耦合方式傳輸訊號。例如，該第一天線層23a與該第二天線層23b係可由交變電壓、交變電流或輻射變化產生輻射能量，且該輻射能量係為電磁場，以令該第一天線層23a與該第二天線層23b能相互電磁耦合，使天線訊號能於該第一天線層23a與該第二天線層23b之間傳遞。
有關該天線結構2a之態樣繁多，如天線基板堆疊於該第二側20b上，並不限於上述。
所述之天線框架2b係為Sub-6GHz波長型天線，其對應該第二電子元件21b作配置。
於本實施例中，該天線框架2b係藉由該第二線路部202耦接(如電性連接)該第二電子元件21b，以發射Sub-6GHz波長。
再者，如第2A圖所示，該天線框架2b可環繞於該第一電子元件21a與第二電子元件21b周圍，即該第一電子元件21a與第二電子元件21b位於該天線框架2b內；或者，如第2A’及2A”圖所示，該第一電子元件21a與第二電子元件21b之至少其中一者係位於該天線框架2b外。
如第2B圖所示，接續第2A圖之製程，設置複數導電元件26於該承載結構20之第一側20a上，以形成電子封裝件2，且該電子封裝件2可藉由該些導電元件26結合於一如電路板9之電子裝置上。
於本實施例中，該導電元件26係例如為銲球(solder ball)或金屬凸塊(如銅凸塊)，其設於該承載結構20之第一側20a之外接墊242上，以電性連接該承載結構20。
於後續製程中，如第2C圖所示，可依需求形成一封裝層25於該承載結構20之第一側20a上，以包覆該天線框架2b、該第一電子元件21a與第二電子元件21b，俾獲取電子封裝件2’之另一種態樣。
於本實施例中，形成該封裝層25之材質係為高導熱性材料，以利於該第一電子元件21a與第二電子元件21b散熱同時提供該第一電子元件21a與第二電子元件21b保護，避免發生變形裂損，其中，形成該封裝層25之材質例如為聚醯亞胺(polyimide，簡稱PI)、乾膜(dry film)、環氧樹脂(epoxy)或封裝材(molding compound)等，但並不限於上述。
再者，該封裝層25可包覆該些導電凸塊210；或者，將底膠(圖略)形成於該承載結構20之第一側20a與該第一電子元件21a(及/或第二電子元件21b)之間以包覆該些導電凸塊210，再令該封裝層25包覆該底膠。
又，於另一實施例中(圖未示)，該封裝層25亦可包覆該導電元件26，且令該導電元件26之端部外露出該封裝層25。或者，如第2D圖所示之電子封裝件2”，先形成該封裝層25，再於該封裝層25中形成開孔250，以令該外接墊242外露於該開孔250，之後將該導電元件26形成於該開孔250中之外接墊242上。
第3A、3B或3C圖係為本發明之電子封裝件之第二實施例之剖面示意圖。本實施例與第一實施例之差異在於電子元件之設置方式，其它製程大致相同，故以下僅說明相異處，而不再贅述相同處。
如第3A、3B或3C圖所示，對應於第2A圖之製程中，第一電子元件31a與第二電子元件31b係以垂直堆疊方式設於該承載結構20之第一側20a上。
於本實施例中，該第一電子元件31a係藉由複數如銲錫材料之導電凸塊310以覆晶方式設於該第一線路部201上並電性連接該第一線路部201，且該第二電子元件31b係堆疊於該第一電子元件31a上並藉由複數銲線311以打線方式電性連接該第二線路部202。
於後續製程中，係依據如第2B至2D圖所示之製程，以獲取各種電子封裝件3,3’,3”之態樣。
應可理解地，亦可將該第二電子元件31b以覆晶方式設於該第二線路部202上並電性連接該第二線路部202，且該第一電子元件31a係堆疊於該第二電子元件31b上並藉由複數銲線311以打線方式電性連接該第一線路部201。
本發明之製法係藉由同時整合兩種不同天線(該天線結構2a及該天線框架2b)於同一電子封裝件2,2’,2”,3,3’,3”中，故相較於習知技術之分別形成兩封裝結構而設於電路板上，本發明之電子封裝件2,2’,2”,3,3’,3”於後續應用之電路板9，其面積無需增加，因而能達到終端產品輕薄短小的需求。
再者，本發明之製法中，係利用金屬片摺疊成立體化天線框架2b，以於製程中，該天線框架2b能與該第一及第二電子元件21a,21b整合製作，亦即一同進行封裝，使該封裝層25能覆蓋該天線框架2b與該第一及第二電子元件21a,21b，故封裝製程用之模具能對應該承載結構20之尺寸，因而有利於封裝製程。
又，該天線框架2b係架設於該承載結構20上而呈立體式天線，因而無需於該承載結構20之第一側20a表面上增加佈設區域，故相較於習知技術，本發明之製法能於預定的承載結構20尺寸下增加天線功能(即Sub-6GHz波長之訊號功能)，因而得以達到具備兩種天線運作之需求，且能使該電子封裝件2,2’,2”,3,3’,3”符合微小化之需求。
另外，本發明之製法係藉由該承載結構20之第二側20b上形成位於該絕緣體22相對兩側之第一天線層23a與第二天線層23b，以形成立體化天線本體23，故於製程中，封裝製程用之模具能對應該承載結構20之尺寸，因而有利於封裝製程，且無需於該承載結構20之第二側20b表面上增加佈設區域，使本發明之製法能於預定的承載結構20尺寸下製作天線(即毫米波式天線)，進而該電子封裝件2,2’,2”,3,3’,3”符合微小化之需求。
另一方面，可利用該導電層240防止該天線結構2a對該第一電子元件21a與第二電子元件21b的串音干擾(cross talking)、噪音干涉(noise interfering)及輻射干擾(radiation interference)等問題。
本發明復提供一種電子封裝件2,2’,2”,3,3’,3”，其包括：一承載結構20、第一電子元件21a,31a、第二電子元件21b,31b、天線結構2a、以及天線框架2b。
所述之承載結構20係具有相對之第一側20a與第二側20b。
所述之天線結構2a係設於該承載結構20之第二側20b上。
所述之天線框架2b係設於該承載結構20之第一側20a上。
所述之第一電子元件21a,31a係接置於該承載結構20之第一側20a上並電性連接該天線結構2a。
所述之第二電子元件21b,31b係接置於該承載結構20之第一側20a上並電性連接該天線框架2b。
於一實施例中，該承載結構20係包含有第一線路部201，以電性連接該第一電子元件21a,31a與該天線結構2a。
於一實施例中，該承載結構20係包含有第二線路部202，以電性連接該第二電子元件21b,31b與該天線框架2b。
於一實施例中，該天線結構2a係包含絕緣體22與天線本體23，該天線本體23係包含有相對配置之第一天線層23a與第二天線層23b，且該絕緣體22與該第二天線層23b係結合於該承載結構20之第二側20b上。
於一實施例中，該天線結構2a係為毫米波式天線。
於一實施例中，該天線框架2b係為Sub-6GHz波長型天線。
於一實施例中，該第一與第二電子元件21a,21b,31a,31b係為不同的射頻晶片。
於一實施例中，該第一電子元件21a,31a係為具發射毫米波功能之半導體晶片。
於一實施例中，該第二電子元件21b,31b係為具發射Sub-6GHz波長功能之半導體晶片。
於一實施例中，所述之電子封裝件2,2’,2”,3,3’,3”復包括複數導電元件26，係設於該承載結構20之第一側20a上並電性連接該承載結構20之配線部24。
於一實施例中，所述之電子封裝件2’,2”,3’,3”復包括封裝層25，係形成於該承載結構20之第一側20a上並包覆該天線框架2b、第一與第二電子元件21a,21b,31a,31b。進一步，該封裝層25係具有外露該承載結構20之開孔250，以於該開孔250中形成導電元件26，使該導電元件26電性連接該承載結構20之配線部24。
於一實施例中，該第一電子元件21a與第二電子元件21b係間隔排設於該承載結構20之第一側20a上。
於一實施例中，該第一電子元件31a與第二電子元件31b係相互堆疊。
綜上所述，本發明之電子封裝件及其製法，係藉由同時整合兩種不同天線(該天線結構及該天線框架)於同一電子封裝件中，故本發明之電子封裝件於後續應用之電路板，其面積無需增加，即可具備兩種波長之傳輸訊號之功能，因而能達到終端產品輕薄短小的需求。
再者，本發明藉由該天線框架之設計，以於製程中，該封裝層能覆蓋該第一電子元件與第二電子元件及該天線框架，使封裝製程之模具能對應該承載結構之尺寸，而有利於封裝製程。
又，該天線框架係架設於該承載結構上而呈立體式天線，因而無需於該承載結構上增加佈設區域，故本發明能於預定的承載結構尺寸下增加天線功能，因而得以達到具備兩種天線運作之需求，且能使該電子封裝件符合微小化之需求。
上述實施例係用以例示性說明本發明之原理及其功效，而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下， 對上述實施例進行修改。因此本發明之權利保護範圍，應如後述之申請專利範圍所列。
2‧‧‧電子封裝件
2a‧‧‧天線結構
2b‧‧‧天線框架
20‧‧‧承載結構
20a‧‧‧第一側
20b‧‧‧第二側
21a‧‧‧第一電子元件
21b‧‧‧第二電子元件
22‧‧‧絕緣體
23‧‧‧天線本體
23a‧‧‧第一天線層
23b‧‧‧第二天線層
24‧‧‧第二線路部
240‧‧‧導電層
241‧‧‧佈線層
242‧‧‧外接墊
26‧‧‧導電元件
9‧‧‧電路板

Claims (32)

  1. 一種電子封裝件，係包括：承載結構，係具有相對之第一表面與第二表面；天線結構，係設於該承載結構之第二表面上；天線框架，係設於該承載結構之第一表面上；第一電子元件，係接置於該承載結構之第一表面上並耦接該天線結構；以及第二電子元件，係接置於該承載結構之第一表面上並耦接該天線框架。
  2. 如申請專利範圍第1項所述之電子封裝件，其中，該承載結構係包含有第一線路部，以電性連接該第一電子元件與該天線結構。
  3. 如申請專利範圍第1項所述之電子封裝件，其中，該承載結構係包含有第二線路部，以電性連接該第二電子元件與該天線框架。
  4. 如申請專利範圍第1項所述之電子封裝件，其中，該天線結構係包含絕緣體與天線本體，該天線本體係包含有相對配置於該絕緣體兩側之第一天線層與第二天線層，且該絕緣體與該第二天線層係結合於該承載結構之第二表面上。
  5. 如申請專利範圍第1項所述之電子封裝件，其中，該天線結構係為毫米波式天線。
  6. 如申請專利範圍第1項所述之電子封裝件，其中，該天線框架係為Sub-6GHz波長型天線。
  7. 如申請專利範圍第1項所述之電子封裝件，其中，該第一電子元件與第二電子元件係為不同的射頻晶片。
  8. 如申請專利範圍第1項所述之電子封裝件，其中，該第一電子元件係為具發射毫米波功能之半導體晶片。
  9. 如申請專利範圍第1項所述之電子封裝件，其中，該第二電子元件係為具發射Sub-6GHz波長功能之半導體晶片。
  10. 如申請專利範圍第1項所述之電子封裝件，復包括複數導電元件，係設於該承載結構之第一表面上。
  11. 如申請專利範圍第1項所述之電子封裝件，復包括封裝層，係形成於該承載結構之第一表面上並包覆該天線框架、第一電子元件與第二電子元件。
  12. 如申請專利範圍第11項所述之電子封裝件，其中，該封裝層係具有外露該承載結構之開孔，以於該開孔中形成電性連接該承載結構之導電元件。
  13. 如申請專利範圍第1項所述之電子封裝件，其中，該第一電子元件與第二電子元件位於該天線框架內。
  14. 如申請專利範圍第1項所述之電子封裝件，其中，該第一電子元件與第二電子元件之至少其中一者係位於該天線框架外。
  15. 如申請專利範圍第1項所述之電子封裝件，其中，該第一電子元件與第二電子元件係間隔排設於該承載結構之第一表面上。
  16. 如申請專利範圍第1項所述之電子封裝件，其中，該第一電子元件與第二電子元件係相互堆疊。
  17. 一種電子封裝件之製法，係包括：提供一具有相對之第一表面與第二表面之承載結構，且於該承載結構之第一表面上設置第一電子元件與第二電子元件； 於該承載結構之第二表面上設置天線結構，並使該第一電子元件耦接該天線結構；以及設置天線框架於該承載結構之第一表面上，並使該第二電子元件耦接該天線框架。
  18. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該承載結構係包含有第一線路部，以電性連接該第一電子元件與該天線結構。
  19. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該承載結構係包含有第二線路部，以電性連接該第二電子元件與該天線框架。
  20. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該天線結構係包含絕緣體與天線本體，該天線本體係包含有相對配置於該絕緣體兩側之第一天線層與第二天線層，且該絕緣體與該第二天線層係結合於該承載結構之第二表面上。
  21. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該天線結構係為毫米波式天線。
  22. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該天線框架係為Sub-6GHz波長型天線。
  23. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該第一電子元件與第二電子元件係為不同的射頻晶片。
  24. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該第一電子元件係為具發射毫米波功能之半導體晶片。
  25. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該第二電子元件係為具發射Sub-6GHz波長功能之半導體晶片。
  26. 如申請專利範圍第17項所述之電子封裝件之製法，復包括形成複數導電元件於該承載結構之第一表面上。
  27. 如申請專利範圍第17項所述之電子封裝件之製法，復包括形成封裝層於該承載結構之第一表面上，使該封裝層包覆該天線框架、第一電子元件與第二電子元件。
  28. 如申請專利範圍第27項所述之電子封裝件之製法，其中，該封裝層係具有外露該承載結構之開孔，以於該開孔中形成電性連接該承載結構之導電元件。
  29. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該第一電子元件與第二電子元件位於該天線框架內。
  30. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該第一電子元件與第二電子元件之至少其中一者係位於該天線框架外。
  31. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該第一電子元件與第二電子元件係間隔排設於該承載結構之第一表面上。
  32. 如申請專利範圍第17項所述之電子封裝件之製法，其中，該第一電子元件與第二電子元件係相互堆疊。
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