TWI668831B - 電子裝置與電子封裝件 - Google Patents

電子裝置與電子封裝件 Download PDF

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TWI668831B
TWI668831B TW107113036A TW107113036A TWI668831B TW I668831 B TWI668831 B TW I668831B TW 107113036 A TW107113036 A TW 107113036A TW 107113036 A TW107113036 A TW 107113036A TW I668831 B TWI668831 B TW I668831B
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antenna
electronic
antenna structure
layer
electronic package
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TW107113036A
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TW201944570A (zh
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方柏翔
陳冠達
賴佳助
盧盈維
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矽品精密工業股份有限公司
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Priority to TW107113036A priority Critical patent/TWI668831B/zh
Priority to CN201810399262.8A priority patent/CN110391213B/zh
Priority to US16/044,154 priority patent/US11223117B2/en
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Publication of TWI668831B publication Critical patent/TWI668831B/zh
Publication of TW201944570A publication Critical patent/TW201944570A/zh

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Abstract

一種電子封裝件,係包括:承載結構、設於該承載結構上之第一電子元件、形成於該承載結構上之第一絕緣層、結合該第一絕緣層並電性連接該第一電子元件之第一天線結構、以及嵌埋於該承載結構中之第二天線結構,使該電子封裝件能在有限的空間下提供更多的天線功能,以增進電子產品之訊號品質及訊號傳輸速率。本發明復提供結合有該電子封裝件之電子裝置以應用於具天線功能之電子產品。

Description

電子裝置與電子封裝件
本發明係關於一種電子封裝件,特別是關於一種具有天線結構之電子封裝件與電子裝置。
目前無線通訊技術已廣泛應用於各式消費性電子產品(如手機、平板電腦等),以利接收或發送各種無線訊號。為滿足消費性電子產品的便於攜帶性及上網便利性(如觀看多媒體內容),無線通訊模組之製造與設計係朝輕、薄、短、小之需求作開發,其中,平面天線(Patch Antenna)因具有體積小、重量輕與製造容易等特性而廣泛利用在電子產品之無線通訊模組中。
此外,因應目前的多媒體內容因畫質的提升而造成其檔案資料量變得更大,故無線傳輸的頻寬也需變大,因而產生第五代的無線傳輸(5G),且5G因傳輸頻率較高,其相關無線通訊模組的尺寸的要求也較高。
第1圖係習知無線通訊模組之立體示意圖。如第1圖所示,該無線通訊模組1係包括:一基板10、設於該基板10上之複數電子元件11、一天線結構12以及封裝材13。該基板10係為電路板並呈矩形體。該電子元件11係設於 該基板10上且電性連接該基板10。該天線結構12係為平面型且具有一天線本體120與一導線121,該天線本體120藉由該導線121電性連接該電子元件11。該封裝材13覆蓋該電子元件11與該部分導線121。
然而,5G系統因訊號品質與傳輸速度要求,而需更多天線配置,以提升訊號的品質與傳輸速度,但習知無線通訊模組1中,該天線結構12係為平面型,且該基板10之長寬尺寸均為固定,因而限制該天線結構12之功能,致使該無線通訊模組1難以達到5G系統之天線運作之需求。
因此,如何克服上述習知技術之問題,實已成目前亟欲解決的課題。
鑑於上述習知技術之缺失,本發明係提供一種電子封裝件,係包括:承載結構,係具有相對之第一側與第二側;至少一第一電子元件,係設於該承載結構之第一側及/或第二側上;第一絕緣層,係結合於該承載結構之第二側上;第一天線結構,係結合於該第一絕緣層並電性連接該第一電子元件;以及第二天線結構,係結合於該承載結構上。
前述之電子封裝件中,該承載結構係具有線路層,以電性連接該第一電子元件與該第一天線結構。
前述之電子封裝件中,該第一天線結構係包含相互分離且相對應配置於該第一絕緣層二側之第一天線層與第二天線層。例如,該第一天線層與該第二天線層係以耦合方式傳輸訊號。
前述之電子封裝件中,該第二天線結構係為嵌埋於該承載結構中之導電結構。
前述之電子封裝件中,該第二天線結構包含有與該第一天線結構接地之第一導電層。
前述之電子封裝件中,該第二天線結構包含有外露於該承載結構之第一側之複數電性接點。例如,該些電性接點作為該第二天線結構之訊號輸入埠與接地埠,且任二者之間的距離係為該第二天線結構之訊號頻率之1/4至1/10波長。
前述之電子封裝件中,該第二天線結構復藉由第二絕緣層結合於該承載結構之第一側上。例如,該第一電子元件係設於該承載結構之第一側上,且該第二絕緣層包覆該第一電子元件,使該第二天線結構屏蔽該第一電子元件。
前述之電子封裝件中,該第一天線結構適用於第一頻率波段,且該第二天線結構適用於第二頻率波段,當第一天線結構用於第一頻率波段時,該第二天線結構作為第一天線結構的接地。
本發明係提供一種電子裝置,係包括:線路板;前述之電子封裝件,係結合至該線路板上;以及第二電子元件,係設該線路板上且電性連接該第二天線結構。
前述之電子裝置中,復包括設於該線路板上且提供該電子封裝件與該第二電子元件電性耦合之複數導電結構。例如該第二天線結構包含有外露於該承載結構之第一側之複數電性接點,且該複數導電結構係電性連接該複數電性 接點。
前述之電子裝置中,復包括設於該線路板上且電性連接該電子封裝件之連接器。
由上可知,本發明之電子裝置及其電子封裝件中,主要藉由該第一天線結構及第二天線結構之立體疊層之設計,使該多頻的電子封裝件能在有限的空間下提供更多的天線功能,以增進採用該電子裝置之電子產品之訊號品質及訊號傳輸速率,故相較於習知技術,該電子裝置能有效達到5G系統之天線運作之需求。
1‧‧‧無線通訊模組
10‧‧‧基板
11‧‧‧電子元件
12‧‧‧天線結構
120‧‧‧天線本體
121‧‧‧導線
13‧‧‧封裝材
2,3‧‧‧電子封裝件
20‧‧‧承載結構
20a‧‧‧第一側
20b‧‧‧第二側
200‧‧‧線路層
201‧‧‧介電材
21‧‧‧第一電子元件
210‧‧‧導電凸塊
22‧‧‧第一絕緣層
22a‧‧‧第一表面
22b‧‧‧第二表面
23‧‧‧第一天線結構
23a‧‧‧第一天線層
23b‧‧‧第二天線層
24,34‧‧‧第二天線結構
24a,24b‧‧‧電性接點
240‧‧‧第一導電層
241‧‧‧佈線層
340‧‧‧第二導電層
341‧‧‧導體
35‧‧‧第二絕緣層
4‧‧‧電子裝置
40‧‧‧線路板
40a‧‧‧頂面
40c‧‧‧側面
41‧‧‧第二電子元件
42‧‧‧連接器
43a,43b‧‧‧導電結構
430‧‧‧導線
t‧‧‧距離
第1圖係為習知半導體通訊模組之剖面示意圖;第2圖係為本發明之電子封裝件之第一實施例之剖面示意圖;第3圖係為本發明之電子封裝件之第二實施例之剖面示意圖;以及第4圖係為本發明之電子裝置之立體示意圖。
以下藉由特定的具體實施例說明本發明之實施方式,熟悉此技藝之人士可由本說明書所揭示之內容輕易地瞭解本發明之其他優點及功效。
須知,本說明書所附圖式所繪示之結構、比例、大小等,均僅用以配合說明書所揭示之內容,以供熟悉此技藝之人士之瞭解與閱讀,並非用以限定本發明可實施之限定條件,故不具技術上之實質意義,任何結構之修飾、比例 關係之改變或大小之調整,在不影響本發明所能產生之功效及所能達成之目的下,均應仍落在本發明所揭示之技術內容得能涵蓋之範圍內。同時,本說明書中所引用之如「上」、「第一」、「第二」及「一」等之用語,亦僅為便於敘述之明瞭,而非用以限定本發明可實施之範圍,其相對關係之改變或調整,在無實質變更技術內容下,當亦視為本發明可實施之範疇。
第2圖係為本發明之電子封裝件2之第一實施例之剖面示意圖。如第2圖所示,所述之電子封裝件2係包括:一承載結構20、至少一第一電子元件21、一第一絕緣層22、第一天線結構23以及第二天線結構24。
所述之承載結構20係具有相對之第一側20a與第二側20b。
於本實施例中,該承載結構20例如為具有核心層與線路結構之封裝基板(substrate)或無核心層(coreless)之線路結構,該承載結構20包含有介電材201及形成於介電材201上之至少一線路層200,該線路層200例如為扇出(fan out)型重佈線路層(redistribution layer,簡稱RDL)。
所述之第一電子元件21係設於該承載結構20之第一側20a上,亦可依需求將該第一電子元件21設於該第二側20b上或同時配置於該第一側20a與該第二側20b上。
於本實施例中,該第一電子元件21係為主動元件、被動元件或其二者組合等,其中,該主動元件係例如為半 導體晶片,且該被動元件係例如為電阻、電容及電感。例如,該第一電子元件21係為具毫米波(mm Wave)功能之半導體晶片,並藉由複數如銲錫材料之導電凸塊210以覆晶方式設於該線路層200上並電性連接該線路層200;或者,該第一電子元件21可藉由複數銲線(圖略)以打線方式電性連接該線路層200;亦或,該第一電子元件21可直接接觸該線路層200。然而,有關該第一電子元件21電性連接該第一承載結構20之方式不限於上述。
所述之第一絕緣層22係形成於該承載結構20之第二側20b上。
於本實施例中,該第一絕緣層22係具有相對之第一表面22a與第二表面22b,並以該第二表面22b結合該承載結構20之第二側20b,其中,形成該第一絕緣層22之材質係為聚醯亞胺(polyimide,簡稱PI)、乾膜(dry film)、環氧樹脂(epoxy)或封裝材(molding compound)等,但並不限於上述。
所述之第一天線結構23係結合該第一絕緣層22並電性連接該第一電子元件21。
於本實施例中,該第一天線結構23係包含相互分離且相對應配置於該第一絕緣層22二側之一第一天線層23a與一第二天線層23b,該第一天線層23a係設於該第一絕緣層22之第一表面22a上,且該第二天線層23b係位於該第一絕緣層22之第二表面22b上以接觸該承載結構20之第二側20b並電性連接該線路層200,其中,該第一天線 層23a之佈設位置係對應該第二天線層23b之佈設位置。具體地,可藉由濺鍍(sputtering)、蒸鍍(vaporing)、電鍍、無電電鍍、化鍍或貼膜(foiling)等方式製作厚度輕薄之天線層。例如,於該第一絕緣層22(或該承載結構20)上形成圖案化導電材,以作為第一天線層23a或第二天線層23b。
再者,該第一天線層23a與該第二天線層23b係以耦合方式傳輸訊號。具體地,該第一天線層23a與該第二天線層23b係可由交變電壓、交變電流或輻射變化產生輻射能量,且該輻射能量係為電磁場,以令該第一天線層23a與該第二天線層23b能相互電磁耦合,使天線訊號能於該第一天線層23a與該第二天線層23b之間傳遞。
所述之第二天線結構24係結合於該承載結構20上,其包含一可作為天線或可接地該第一天線結構23之第一導電層240、至少一電性連接該第一導電層240之佈線層241、及複數電性接點24a,24b。
於本實施例中,該第二天線結構24係為嵌埋於該承載結構20中之導電結構。
再者,該第一導電層240於該承載結構20之佈設面積係大於該第二天線層23b結合該承載結構20之佈設面積。具體地,該第一導電層240可為至少一完整、網狀或任意圖案之金屬薄片(foil);或者,該第一導電層240可為圖案化之導電材,使該第二天線結構24與該線路層200可以相同佈線製程一併製作。
又,該些電性接點24a,24b係外露於該承載結構20之第一側20a,且該些電性接點24a,24b可作為訊號埠(I/O)或接地埠(I/O)。例如,兩該電性接點24a,24b之間的距離t為1/4波長(λ)至1/10波長,其中,該距離t所採用之波長係為該第二天線結構24之訊號頻率(如Sub-6GHz)之波長。
第3圖係為本發明之電子封裝件3之第二實施例之剖面示意圖。本實施例與第一實施例之差異在於第二天線結構34之佈設,其它配置大致相同,故以下不再贅述相同處。
所述之第二天線結構34復包含一第二導電層340,其藉由一第二絕緣層35結合於該承載結構20之第一側20a上。
於本實施例中,形成該第二絕緣層35之材質係為聚醯亞胺(PI)、乾膜、環氧樹脂或封裝材等,但並不限於上述。具體地,可透過雙面模壓製程一併形成該第二絕緣層35與該第一絕緣層22,使該第二絕緣層35包覆該第一電子元件21。應可理解地,該第二絕緣層35與該第一絕緣層22可為相同或不同材質,亦可同時或不同時製作。
再者,該第二導電層340可選擇作為天線,或同時提供該第一電子元件21屏蔽作用(例如,該第二導電層340接觸該第一電子元件21)。具體地,該第二導電層340可為至少一完整、網狀或任意圖案之金屬薄片;或者,該第二導電層340可為圖案化之導電材。
又,該些電性接點24a,24b係可藉由複數導體341電 性連接該第二導電層340,使該第二天線結構34於天線作用時作為接地。例如,該導體341係為柱狀或凸塊狀,其包含銲錫材料、金屬材或其它導電材,且該第二絕緣層35可包覆該導體341。
因此,本發明之第一與第二實施例之電子封裝件2,3中,該第一天線結構23適用於第一頻率波段(如28或39GHz),且該第二天線結構24,34適用於第二頻率波段(Sub-6GHz),並於該第一天線結構23進行第一頻率波段之運作時,該第一電子元件21藉由該線路層200之傳輸以處理該第一天線結構23之天線訊號,且該第二天線結構24,34作為該第一天線結構23的接地(如由該第一導電層240、該佈線層241及該些電性接點24a,24b構成之接地路徑)。
再者,本發明之電子封裝件2,3可利用該第一導電層240防止外部環境對該第一電子元件21的串音干擾(cross talking)、噪音干涉(noise interfering)及輻射干擾(radiation interference)等問題。較佳者,該第一導電層240可由多層金屬薄片所製成,以強化屏蔽功能。
第4圖係為本發明之電子裝置4之立體示意圖。所述之電子裝置4係包括:一線路板40、前述之電子封裝件2,3、一第二電子元件41以及一連接器42。
所述之線路板40係為電路板(PCB),其為電子產品之主板,如手機基板。
所述之電子封裝件2,3之外觀輪廓大致呈板狀,其可 作為電子產品之天線基板,並以其承載結構20之第一側20a朝該線路板40之側面而接合至該線路板40之側面40c上,以令該第一天線結構23傳遞或接收第一頻率波段(如28GHz或39GHz)之天線訊號。
所述之第二電子元件41係設於該線路板40之頂面40a上並配置於該電子封裝件2,3之前方,且該第二電子元件41藉由該線路板40之導電結構43a,43b電性連接該第二天線結構24,34之電性接點24a,24b或第二導電層340,以令該第二天線結構24,34傳遞或接收第二頻率波段(Sub-6GHz)之天線訊號。
於本實施例中,該第二電子元件41係為封裝模組、主動元件、被動元件或其組合等,其中,該封裝模組係例如包含晶片及封裝材,且該主動元件係例如為半導體晶片,而該被動元件係例如為電阻、電容及電感。例如,該第二電子元件41係為封裝模組,其包含射頻晶片,如PAMid、PA或traceiver等型式,以處理該第二天線結構24,34之天線訊號。
再者,該些導電結構43a,43b可例如為彈勾、單針彈簧接腳(Pogo pin)等金屬連接機構,並藉由作為射頻訊號線及接地線之導線430電性連接該第二電子元件41。
所述之連接器42係配置於該線路板40之頂面40a上並電性連接該電子封裝件2,3之線路層200。
於本實施例中,該連接器42係為該電子封裝件2,3之電性接腳,其內包含電源、接地、控制訊號及中頻訊號等 接腳。
因此,本發明之電子裝置4中,該電子封裝件2,3具有用於不同的操作頻率之第一天線結構23及第二天線結構24,34,以於該第二天線結構24,34進行第二頻率波段之運作時,該第二電子元件41用於處理該第二天線結構24,34之天線訊號。
綜上所述,本發明之電子裝置4及電子封裝件2,3係藉由第一天線結構23及第二天線結構24,34之立體疊層之設計,使多頻的電子封裝件2,3能在有限的空間下提供更多的天線功能,以增進採用該電子裝置4之電子產品(如手機之行動裝置)之訊號品質及訊號傳輸速率,故相較於習知技術,該電子裝置4能有效達到5G系統之天線運作之需求。
上述實施例係用以例示性說明本發明之原理及其功效,而非用於限制本發明。任何熟習此項技藝之人士均可在不違背本發明之精神及範疇下,對上述實施例進行修改,且前述各實施例之內容可再相互組合應用。因此本發明之權利保護範圍,應如後述之申請專利範圍所列。

Claims (15)

  1. 一種電子封裝件,係包括:承載結構,係具有相對之第一側與第二側;至少一第一電子元件,係設於該承載結構之第一側及/或第二側上;第一絕緣層,係結合於該承載結構之第二側上;第一天線結構,係結合於該第一絕緣層並電性連接該第一電子元件,其中,該第一天線結構係用於第一頻率波段;以及第二天線結構,係結合於該承載結構上,其中,該第二天線結構係用於不同該第一頻率波段之第二頻率波段。
  2. 如申請專利範圍第1項所述之電子封裝件,其中,該承載結構係具有線路層,以電性連接該第一電子元件與該第一天線結構。
  3. 如申請專利範圍第1項所述之電子封裝件,其中,該第一天線結構係包含相互分離且相對應配置於該第一絕緣層二側之第一天線層與第二天線層。
  4. 如申請專利範圍第3項所述之電子封裝件,其中,該第一天線層與該第二天線層係以耦合方式傳輸訊號。
  5. 如申請專利範圍第1項所述之電子封裝件,其中,該第二天線結構係為嵌埋於該承載結構中之導電結構。
  6. 如申請專利範圍第1項所述之電子封裝件,其中,該第二天線結構包含有與該第一天線結構接地之第一導電層。
  7. 如申請專利範圍第1項所述之電子封裝件,其中,該第二天線結構包含有外露於該承載結構之第一側之複數電性接點。
  8. 如申請專利範圍第7項所述之電子封裝件,其中,該些電性接點作為該第二天線結構之訊號輸入埠與接地埠,且任二者之間的距離係為該第二天線結構之訊號頻率之1/4至1/10波長。
  9. 如申請專利範圍第1項所述之電子封裝件,其中,該第二天線結構復藉由第二絕緣層結合於該承載結構之第一側上。
  10. 如申請專利範圍第9項所述之電子封裝件,其中,該第一電子元件係設於該承載結構之第一側上,且該第二絕緣層包覆該第一電子元件,使該第二天線結構屏蔽該第一電子元件。
  11. 如申請專利範圍第1項所述之電子封裝件,其中,該第一天線結構於進行該第一頻率波段之運作時,該第二天線結構作為該第一天線結構的接地。
  12. 一種電子裝置,係包括:線路板;如申請專利範圍第1至11項之其中一者所述之電子封裝件,係結合至該線路板上;以及第二電子元件,係設於該線路板上且電性連接該第二天線結構。
  13. 如申請專利範圍第12項所述之電子裝置,復包括設於該線路板上且提供該電子封裝件與該第二電子元件電性耦合之複數導電結構。
  14. 如申請專利範圍第13項所述之電子裝置,其中,該第二天線結構包含有外露於該承載結構之第一側之複數電性接點,且該複數導電結構係電性連接該複數電性接點。
  15. 如申請專利範圍第12項所述之電子裝置,復包括設於該線路板上且電性連接該電子封裝件之連接器。
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