JP6908112B2 - 電子部品モジュール及びその製造方法 - Google Patents
電子部品モジュール及びその製造方法 Download PDFInfo
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- JP6908112B2 JP6908112B2 JP2019526965A JP2019526965A JP6908112B2 JP 6908112 B2 JP6908112 B2 JP 6908112B2 JP 2019526965 A JP2019526965 A JP 2019526965A JP 2019526965 A JP2019526965 A JP 2019526965A JP 6908112 B2 JP6908112 B2 JP 6908112B2
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
- H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
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- H01L2924/151—Die mounting substrate
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Description
(1)電子部品モジュールの全体構成
以下、実施形態1に係る電子部品モジュール1について、図面を参照して説明する。
次に、電子部品モジュール1の各構成要素について、図面を参照して説明する。
電子部品2は、図1に示すように、電子部品モジュール1の第1方向D1において互いに反対側にある表面21及び裏面22を有する。より詳細には、電子部品2は、板状に形成されており、その厚さ方向において互いに反対側にある表面21及び裏面22を有する。また、電子部品2は、側面23を有する。電子部品2の平面視形状(電子部品2をその厚さ方向から見たときの外周形状)は、長方形状であるが、長方形状に限らず、例えば正方形状であってもよい。
樹脂構造体3は、図1に示すように、電子部品2を保持するように構成されている。樹脂構造体3は、電子部品モジュール1の第1方向D1において互いに反対側にある第1面31及び第2面32を有する。より詳細には、樹脂構造体3は、板状に形成されており、その厚さ方向において互いに反対側にある第1面31及び第2面32を有する。樹脂構造体3の平面視形状(樹脂構造体3をその厚さ方向すなわち第1方向D1から見たときの外周形状)は、長方形状である。ただし、樹脂構造体3の平面視形状は、長方形状に限らず、例えば正方形状であってもよい。樹脂構造体3の平面サイズは、電子部品2の平面サイズよりも大きい。
電子部品モジュール1では、図1に示すように、樹脂構造体3における電子部品2の側方に、複数(図示例では2つ)の貫通配線4が配置されている。第1方向D1と直交する第2方向D2において、複数の貫通配線4は、電子部品2から離れて位置している。複数の貫通配線4は、樹脂構造体3に保持されている。
配線層5は、樹脂構造体3の第1面31側及び電子部品2の表面21側において、電子部品2と貫通配線4とを電気的に接続している。配線層5は、電子部品2の表面21(のうち端子部の表面)に接続されている第1端51と、貫通配線4に接続されている第2端52とを有する。配線層5は、電子部品2の表面21と貫通配線4の第1端面41と後述の密着層6の第2密着部62とに跨って配置されている。配線層5の厚さは、例えば5μm以上10μm以下である。
密着層6は、複数の第1密着部61と、第2密着部62とを備える。各第1密着部61は、樹脂構造体3と貫通配線4とに接触するように設けられている。各第1密着部61は、円柱状の貫通配線4の第1端面41及び第2端面42を除く周面全体を覆うように設けられている。第2密着部62は、樹脂構造体3と配線層5とに接触するように樹脂構造体3の第1面31に沿って設けられている。複数の第1密着部61と第2密着部62とは、一体に形成されている。
電子部品モジュール1は、配線層5の第2端52上に形成された外部接続用の複数(図示例では2つ)の電極7を更に備える。また、電子部品モジュール1は、配線層5上に形成されているレジスト層9を更に備える。レジスト層9は、電極7及び配線層5よりもはんだ濡れ性が低い材料により形成されている。レジスト層9は、例えばポリイミド層である。これにより、電子部品モジュール1では、電極7を別の電子部品20等とはんだにより接合する際に、配線層5上にはんだが濡れ広がることを低減できる。あるいは、配線層5上にはんだが濡れ広がることを抑制できる。
次に、実施形態1に係る電子部品モジュール1の製造方法について、図3A〜図3F及び図4A〜図4Eを参照して説明する。
実施形態1に係る電子部品モジュール1では、密着層6が、樹脂構造体3と貫通配線4との間に形成されており、かつ、樹脂構造体3と貫通配線4とに接触している。さらに、密着層6は無機絶縁膜64を含む。無機絶縁膜64は、樹脂との密着性も、金属との密着性も良好であるから、実施形態1に係る電子部品モジュール1では、密着層6が樹脂構造体3と貫通配線4とを密着させる機能を有するため、貫通配線4を剥がれにくくすることができる。
実施形態1に係る電子部品モジュール1では、樹脂構造体3の第2面32が平面状であり、樹脂構造体3の第2面32から電子部品2の表面21までの最短距離が、第2面32から第1面31までの最短距離よりも長い。これにより、実施形態1に係る電子部品モジュール1では、低背化を図ることができる。
実施形態2に係る電子部品モジュール1aは、図5に示すように、樹脂構造体3と貫通配線4との間だけではなく、樹脂構造体3と電子部品2とに接触するように密着層6aが設けられている点で、実施形態1に係る電子部品モジュール1(図1参照)と相違する。なお、実施形態1に係る電子部品モジュール1と同様の構成要素については、同一の符号を付して説明を省略する。
実施形態3に係る電子部品モジュール1bは、図8に示すような密着層6bを備える点で、実施形態1に係る電子部品モジュール1(図1参照)と相違する。なお、実施形態1に係る電子部品モジュール1と同様の構成要素については、同一の符号を付して説明を省略する。
以上説明した実施形態等から以下の態様が開示されていることは明らかである。
110 支持体
111 導電層
112 積層体
113 接着層
2 電子部品
21 表面
22 裏面
23 側面
3 樹脂構造体
30 樹脂構造層
301 第1面
302 第2面
31 第1面
32 第2面
4 貫通配線
400 導体ピラー
41 第1端面
42 第2端面
43,44 導電性バンプ
5 配線層
51 第1端
52 第2端
6,6a,6b 密着層
600,600a 無機絶縁層
61,61a,61b 第1密着部
62,62a,62b 第2密着部
63a 第3密着部
64,64a,64b 無機絶縁膜
641 第1絶縁部
642 第2絶縁部
65 拡散防止膜
651 第1拡散防止部
652 第2拡散防止部
7 電極
8 外部接続用配線層
9,90 レジスト層
200 通信モジュール
201 カバー層
202 間隙
10 回路基板
20 電子部品
D1 第1方向
D2 第2方向
Claims (14)
- 電子部品と、
前記電子部品の少なくとも一部を覆っている樹脂構造体と、
前記樹脂構造体を貫通している貫通配線と、
前記電子部品と前記貫通配線とを電気的に接続している配線層と、
少なくとも前記樹脂構造体と前記貫通配線との間に形成されており、かつ、前記樹脂構造体及び前記貫通配線に接触している密着層とを備え、
前記密着層は、無機絶縁膜を含む、
ことを特徴とする電子部品モジュール。 - 前記密着層は、
前記樹脂構造体と前記貫通配線とに接触して設けられている第1密着部と、
前記樹脂構造体と前記配線層とに接触して設けられている第2密着部とを有する
ことを特徴とする請求項1に記載の電子部品モジュール。 - 前記第1密着部と前記第2密着部は、一体に形成されている
ことを特徴とする請求項2に記載の電子部品モジュール。 - 前記第1密着部と前記第2密着部とは、同一の材料で形成されている
ことを特徴とする請求項3に記載の電子部品モジュール。 - 前記無機絶縁膜は、電気絶縁性を有する金属酸化物若しくは金属窒化物、シリコン酸化物又はシリコン窒化物である
ことを特徴とする請求項1〜4のいずれか1項に記載の電子部品モジュール。 - 前記密着層は、前記無機絶縁膜とは異なる材料により形成されており金属の拡散を低減させる拡散防止膜を更に含む
ことを特徴とする請求項1〜5のいずれか1項に記載の電子部品モジュール。 - 前記拡散防止膜は、窒化シリコン及び金属酸化物の少なくとも1つにより形成されている
ことを特徴とする請求項6に記載の電子部品モジュール。 - 前記拡散防止膜は、前記無機絶縁膜と前記貫通配線との間に設けられている
ことを特徴とする請求項6又は7に記載の電子部品モジュール。 - 前記樹脂構造体は、エポキシ樹脂又はポリイミド樹脂により形成されている
ことを特徴とする請求項1〜8のいずれか1項に記載の電子部品モジュール。 - 前記配線層は、Cuを含む導体により形成されている
ことを特徴とする請求項1〜9のいずれか1項に記載の電子部品モジュール。 - 前記配線層上に形成されている電極と、
前記配線層上において前記電極とは異なる位置に形成されているレジスト層とを更に備え、
前記レジスト層は、前記電極及び前記配線層よりもはんだ濡れ性が低い材料により形成されている
ことを特徴とする請求項1〜10のいずれか1項に記載の電子部品モジュール。 - 前記貫通配線に電気的に接続されている外部接続用配線層と、
前記外部接続用配線層上に形成されているレジスト層とを更に備え、
前記レジスト層は、前記外部接続用配線層よりもはんだ濡れ性が低い材料により形成されている
ことを特徴とする請求項1〜10のいずれか1項に記載の電子部品モジュール。 - 積層体を準備する工程と、
前記積層体上に、貫通配線の元になる導体ピラーを形成する工程と、
前記導体ピラーが形成された前記積層体上に電子部品を固定する工程と、
前記積層体及び前記導体ピラーの露出面上に、密着層の元になる無機絶縁層を形成する工程と、
前記積層体上に、樹脂構造体の元になる樹脂構造層を形成する工程と、
前記樹脂構造層を前記樹脂構造体の厚さになるまで研磨することによって、前記電子部品と前記樹脂構造体と前記貫通配線と前記積層体とを含む構造体を形成する工程と、
前記構造体から前記積層体を除去する工程と、
前記電子部品と前記貫通配線とを電気的に接続する配線層を形成する工程とを有し、
前記構造体を形成する工程において、前記樹脂構造層を前記樹脂構造体の厚さになるまで研磨することによって、前記電子部品と前記樹脂構造体と前記貫通配線と前記積層体と前記無機絶縁層とを含む前記構造体を形成する
ことを特徴とする電子部品モジュールの製造方法。 - 前記電子部品を固定する工程は、
前記積層体上に液状の樹脂粘着層を形成する工程と、
前記電子部品の表面を前記樹脂粘着層に対向させ、前記電子部品を前記樹脂粘着層に押し付ける工程とを有する
ことを特徴とする請求項13に記載の電子部品モジュールの製造方法。
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