JP5605429B2 - 半導体素子内蔵配線基板 - Google Patents
半導体素子内蔵配線基板 Download PDFInfo
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- JP5605429B2 JP5605429B2 JP2012509346A JP2012509346A JP5605429B2 JP 5605429 B2 JP5605429 B2 JP 5605429B2 JP 2012509346 A JP2012509346 A JP 2012509346A JP 2012509346 A JP2012509346 A JP 2012509346A JP 5605429 B2 JP5605429 B2 JP 5605429B2
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- wiring
- layer
- surface side
- wiring board
- semiconductor element
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- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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Description
半導体素子を内蔵する配線基板であって、
前記配線基板は、
前記半導体素子と、
該半導体素子の少なくとも外周側面を覆う周辺絶縁層と、
当該配線基板の上面側に設けられた上面側配線とを含み、
前記半導体素子は、その上面側に、前記上面側配線と電気的に接続する内部端子を有し、
前記内部端子は、
当該半導体素子の絶縁表層から露出する第1導電部と、
該第1導電部上の密着層と、
該密着層上の第2導電部とを含み、
前記密着層は、前記第1導電部の露出面を覆い該露出面の周囲の絶縁表層上に設けられ、且つ、前記第2導電部を取り囲み該第2導電部の外縁より外側周囲へ延在している、配線基板が提供される。
図1は、本発明の第1の実施形態の配線基板を示す断面図である。
図2は、本発明の第2の実施形態の配線基板を示す断面図である。
図9は、本発明の第3の実施形態の配線基板を示す断面図である。
本実施形態は、第3の実施形態の変形例として、図10Aに示す半導体素子に代えて、図11Aに示す半導体素子を内蔵していてもよい。
まず、前述の端子を備えた半導体素子200を用意する。
まず、製造例1と同様にして半導体素子200を用意する。
10 機能素子
11 ゲート電極
12 ソース/ドレイン領域
13 コンタクトプラグ
21 第1配線
22 配線間絶縁層
23 ビア
30a 絶縁層
30b 絶縁層
31a 導電層
31b 第1導電部
32 密着層
33 第2導電部
101 ベース絶縁層
102 接着層
103 周辺絶縁層
104 ビア
105a 配線(ファンアウト配線)
105b 配線
106 絶縁層
107 ビア
108 配線
109 保護絶縁層
130 上面側配線構造層
140 下面側配線構造層
141a 接続パッド
141b 回路パターン
142 ビア
143 配線
144 保護絶縁層
200 半導体素子(LSIチップ)
201 半導体基板
210 第1配線構造層
211 層間絶縁膜
212 配線含有層
220 第2配線構造層
221 第2絶縁層
222 第2配線
223 ビア
224 導電層露出部
230 第3配線構造層
231 第3絶縁層
232 第3配線
233 ビア
234 端子
235 素子内基板貫通ビア
301 素子側方ビア
Claims (21)
- 半導体素子を内蔵する配線基板であって、
前記配線基板は、
前記半導体素子と、
該半導体素子の少なくとも外周側面を覆う周辺絶縁層と、
当該配線基板の上面側に設けられた上面側配線とを含み、
前記半導体素子は、その上面側に、前記上面側配線と電気的に接続する内部端子を有し、
前記内部端子は、
当該半導体素子の絶縁表層から露出する第1導電部と、
該第1導電部上の密着層と、
該密着層上の第2導電部とを含み、
前記密着層は、前記第1導電部の露出面を覆い該露出面の周囲の絶縁表層上に設けられ、且つ、前記第2導電部を取り囲み該第2導電部の外縁より外側周囲へ延在している、配線基板。 - 前記第1導電部、前記密着層および前記第2導電部はそれぞれ金属材料からなり、前記絶縁表層は樹脂材料からなる、請求項1に記載の配線基板。
- 前記密着層は、Ti、W、Mo、Cr、V、Ta及びNiから選ばれる金属を含む金属材料からなる、請求項1又は2に記載の配線基板。
- 前記第2導電部は、金、銀、銅、ニッケル、錫およびパラジウムから選ばれる金属を含む金属材料からなる、請求項1から3のいずれか一項に記載の配線基板。
- 前記第2導電部は、銅又は銅系合金からなる、請求項1から3のいずれか一項に記載の配線基板。
- 前記半導体素子は、複数の前記内部端子を有し、一体に形成された密着層を共有する隣り合う内部端子を含む、請求項1から5のいずれか一項に記載の配線基板。
- 複数の前記内部端子は、一体に形成された密着層を共有する隣り合う電源端子を含む、請求項6に配線基板。
- 複数の前記内部端子は、一体に形成された密着層を共有する隣り合うグランド端子を含む、請求項6又は7に記載の配線基板。
- 前記第2導電部は、前記密着層に接触する下面の外縁の周長が当該第2導電部の上面の外縁の周長より大きく、当該第2導電部の基板平面方向に沿った断面の外縁の周長が上面側から下面にかけて漸次拡大している、請求項1から8のいずれか一項に記載の配線基板。
- 前記第1導電部は、前記絶縁表層下の配線の一部であり、該絶縁表層の開口からの露出部分である、請求項1から9のいずれか一項に記載の配線基板。
- 前記第1導電部は、前記絶縁表層の開口に設けられた導電部である、請求項1から9のいずれか一項に記載の配線基板。
- 前記配線基板はベース絶縁層を含み、該ベース絶縁層の上面側に前記半導体素子および前記周辺絶縁層が設けられている、請求項1から11のいずれか一項に記載の配線基板。
- 前記上面側配線を覆う保護絶縁膜を有し、
該保護絶縁膜は開口を有し、該開口内の前記上面側配線の露出部からなる外部端子、または該開口に設けられた導電部からなる外部端子を備えた、請求項1から12のいずれか一項に記載の配線基板。 - 前記配線基板の上面側に交互に設けられた配線と絶縁層を含む上面側配線構造層を有し、
最上層側の絶縁層に開口を有し、該開口内の配線の露出部からなる外部端子、または該開口に設けられた導電部がからなる外部端子を備えた、請求項1から12のいずれか一項に記載の配線基板。 - 前記配線基板は、当該配線基板の下面側に設けられた下面側配線を含む、請求項1から14のいずれか一項に記載の配線基板。
- 前記配線基板は、前記周辺絶縁層に、前記上面側配線および前記下面側配線と電気的に接続された素子側方ビアを含む、請求項15に記載の配線基板。
- 前記下面側配線を覆う保護絶縁膜を有し、
該保護絶縁膜は開口を有し、該開口内の前記下面側配線の露出部からなる外部端子、または該開口に設けられた導電部からなる外部端子を備えた、請求項15又は16に記載の配線基板。 - 前記配線基板の下面側に交互に設けられた配線と絶縁層を含む下面側配線構造層を有し、
最下層側の絶縁層に開口を有し、該開口内の配線の露出部からなる外部端子、または該開口に設けられた導電部がからなる外部端子を備えた、請求項15又は16に記載の配線基板。 - 前記配線基板は、当該配線基板の下面側に設けられた支持基板を含む、請求項1から14のいずれか一項に記載の配線基板。
- 前記半導体素子の下面に、絶縁性接着剤を介してノイズシールド回路パターンが設けられている、請求項1から19のいずれか一項に記載の配線基板。
- 前記半導体素子の下面に、導電性接着剤を介して電位安定化回路パターンが設けられている、請求項1から19のいずれか一項に記載の配線基板。
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