JP2005340655A - 半導体装置の製造方法および半導体基板の支持構造体 - Google Patents
半導体装置の製造方法および半導体基板の支持構造体 Download PDFInfo
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- JP2005340655A JP2005340655A JP2004159871A JP2004159871A JP2005340655A JP 2005340655 A JP2005340655 A JP 2005340655A JP 2004159871 A JP2004159871 A JP 2004159871A JP 2004159871 A JP2004159871 A JP 2004159871A JP 2005340655 A JP2005340655 A JP 2005340655A
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Abstract
【解決手段】 第1の主面の側101Aにデバイスが形成された半導体基板101の、当該第1の主面101Aの反対側の第2の主面101Bを研削する第1の工程と、前記第1の工程の後の前記第2の主面101Bに、前記半導体基板を支持する支持構造体200を貼り付ける第2の工程と、を有する半導体装置の製造方法であって、前記支持構造体200から前記半導体基板101を離脱させる第3の工程を有することを特徴とする、半導体装置の製造方法。
【選択図】 図5
Description
101,11 基板
102,12 電極パッド
103,104,12A,13 保護層
105 密着層
106 シード層
107,109 フォトレジスト層
108,14 配線
110,16 配線ポスト
111,17 メッキ層
112 BGテープ
113,15 モールド樹脂層
114,18 バンプ
115 ダイシングテープ
Claims (7)
- 第1の主面の側にデバイスが形成された半導体基板の、当該第1の主面の反対側の第2の主面を研削する第1の工程と、
前記第1の工程の後の前記第2の主面に、前記半導体基板を支持する支持構造体を貼り付ける第2の工程と、を有する半導体装置の製造方法であって、
前記支持構造体から前記半導体基板を離脱させる第3の工程を有することを特徴とする、半導体装置の製造方法。 - 前記第2の工程と前記第3の工程の間に、前記半導体基板をダイシングするダイシング工程を有することを特徴とする請求項1記載の半導体装置の製造方法。
- 前記第2の工程と前記第3の工程の間に、前記第1の主面の側を樹脂層で覆う封止工程を有することを特徴とする請求項1または2記載の半導体装置の製造方法。
- 前記第3の工程の前に、前記第1の主面の側に、前記デバイスに接続される配線を形成する配線形成工程を有することを特徴とする請求項1乃至3のうち、いずれか1項記載の半導体装置の製造方法。
- 前記支持構造体は、前記半導体基板と接触する側に形成された粘着層と、当該粘着層を支持する支持層とを有し、
前記粘着層は、
前記半導体基板と粘着する第1の粘着層と、
当該第1の粘着層よりも粘着力の強い、前記支持層と粘着する第2の粘着層と
当該第1の粘着層と当該第2の粘着層の間に設けられた基材層とを有することを特徴とする、請求項1乃至4のうち、いずれか1項記載の半導体装置の製造方法。 - 半導体基板を粘着させて用いる半導体基板の支持構造体であって、
前記半導体基板と粘着する側に形成された粘着層と、
当該粘着層を支持する支持層と、を有し、
前記粘着層は、
前記半導体基板と粘着する第1の粘着層と、
当該第1の粘着層よりも粘着力の強い、前記支持層と粘着する第2の粘着層と
当該第1の粘着層と当該第2の粘着層の間に設けられた基材層とを有することを特徴とする半導体基板の支持構造体。 - 前記支持層は、Siウェハからなることを特徴とする請求項6記載の半導体基板の支持構造体。
Priority Applications (6)
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JP2004159871A JP2005340655A (ja) | 2004-05-28 | 2004-05-28 | 半導体装置の製造方法および半導体基板の支持構造体 |
TW094115879A TW200539298A (en) | 2004-05-28 | 2005-05-17 | Method of manufacturing semiconductor device and support structure for semiconductor substrate |
US11/132,063 US20050263907A1 (en) | 2004-05-28 | 2005-05-18 | Method of manufacturing semiconductor device and support structure for semiconductor substrate |
KR1020050044415A KR20060046191A (ko) | 2004-05-28 | 2005-05-26 | 반도체 장치의 제조 방법 및 반도체 기판용 지지 구조체 |
CN2005100713705A CN1702839B (zh) | 2004-05-28 | 2005-05-27 | 制造半导体器件的方法和半导体衬底的支撑结构 |
US11/336,217 US7459343B2 (en) | 2004-05-28 | 2006-01-20 | Method of manufacturing semiconductor device and support structure for semiconductor substrate |
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JP2004159871A JP2005340655A (ja) | 2004-05-28 | 2004-05-28 | 半導体装置の製造方法および半導体基板の支持構造体 |
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JP (1) | JP2005340655A (ja) |
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-
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JP5605429B2 (ja) * | 2010-04-08 | 2014-10-15 | 日本電気株式会社 | 半導体素子内蔵配線基板 |
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US20050263907A1 (en) | 2005-12-01 |
CN1702839A (zh) | 2005-11-30 |
KR20060046191A (ko) | 2006-05-17 |
US7459343B2 (en) | 2008-12-02 |
CN1702839B (zh) | 2010-05-05 |
TW200539298A (en) | 2005-12-01 |
US20060128063A1 (en) | 2006-06-15 |
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