CN101199246A - 电路板结构的制造方法和电路板结构 - Google Patents

电路板结构的制造方法和电路板结构 Download PDF

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CN101199246A
CN101199246A CNA2006800210554A CN200680021055A CN101199246A CN 101199246 A CN101199246 A CN 101199246A CN A2006800210554 A CNA2006800210554 A CN A2006800210554A CN 200680021055 A CN200680021055 A CN 200680021055A CN 101199246 A CN101199246 A CN 101199246A
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conductor layer
conductive pattern
layer
conductor
circuit
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CN100596258C (zh
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里斯托·图奥米宁
安蒂·伊霍拉
彼得里·帕尔姆
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Imberatec Co., Ltd
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Imbera Electronics Oy
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Abstract

本发明公开了一种用于制造电路板结构的方法。在该方法中，制造包含导体箔(2)和在该导体箔的表面上的导体图案(6)的导体层，将元件(9)附着到该导体层，并且，以使得从导体图案(6)外侧去除导体层的导体材料的方式减薄导体层。

Description

电路板结构的制造方法和电路板结构
本发明涉及电路板结构的制造方法和电路板结构。
制造的电路板结构可形成例如电路板、多层电路板、元件封装件或电子模块的一部分。
电路板结构包含至少一层导体图案和与导体图案电连接的至少一个元件。
本发明还涉及一种方法，在该方法中通过绝缘材料层包围与导体图案连接的至少一个元件。这类方案也可被称为包含埋入、嵌入或内置的元件的电路板或模块结构。包围元件的绝缘材料层一般是电路板或模块结构的基础结构的一部分，其形成电路板或模块的最内层导体层的支撑体。
申请公开US 2005/0001331公开了一种电路板结构制造方法，在该电路板结构制造方法中，首先制造包含绝缘体层及其顶部上的导体图案的电路板。然后，半导体元件通过适当的倒装晶片方法与导体图案连接。通过半导体元件的表面上的接触凸起产生连接。在该US公开的方法中，在连接元件后，在电路板的顶部层合图案化的和未图案化的绝缘材料层，并在它们的表面上进一步层合导体图案层。
专利公开US 6038133和US 6489685以及申请公开US 2002/0117743公开了在可分离膜的表面上制造导体图案并通过倒装晶片贴装方法将半导体元件连接到导体图案的方法。然后，用绝缘材料层包围元件并去除可分离膜。
上述公开US 6038133和US 2002/0117743还公开了一种方法，在该方法中，通过倒装晶片贴装方法将元件连接到一体化导体箔而不是导体图案上，在该过程的后续阶段中由此形成导体箔图案。例如在公开US5042145、WO 2004/077902、WO 2004/077903和WO 2005/020651中也公开了相应的方法。
除了上述类型的方法以外，还已知有许多其它的可制造包含元件的电路板结构的方法。例如，如申请公开WO 2004/089048所公开，元件可首先被放在绝缘材料层内并仅在此后与导体层电连接。在申请公开WO2004/089048的方法中，元件被粘合到导体层的表面上，在粘合元件后，包围附着到导体层的元件的绝缘材料层形成为附着导体层。在粘合元件之后，还制造通路，通过该通路可在导体层和元件的接触区域之间形成电接触。然后，由其表面粘合有元件的导体层形成导体图案。
本发明旨在开发一种用于制造电路板结构的新方法。
根据本发明，实现了如下方法：在该方法中，制造同时包含导体图案和导体箔的导体层。将元件附着到包含所述导体图案和导体箔的导体层，并且，在附着元件之后，以从导体图案外侧去除导体层的导体材料的方式减薄导体层。
这样，创造了用于制造电路板结构的新方法。
本发明具有几种实施方案，以下简要给出其中的几个：
可以以几种不同的方式实施导体层的制造：
-根据一个实施方案，通过使用生长方法在导体箔的顶部上生长导体图案来制造导体层。因此，导体箔直接生长成其恰当的形状。
-根据第二实施方案，以保留较薄的导体箔及其顶部上的导体图案的方式，通过减薄较厚的导体箔的区域来制造导体层。可以例如利用光刻方法或激光烧蚀方法来实施所述区域的减薄。
也可以利用几种技术和以一个或更多个阶段来实施元件的附着。元件的附着涉及实现元件和导体图案之间的机械附着，使得元件和导体图案将保留在电路板结构中的适当的位置上。元件的附着还涉及在元件和导体图案之间形成电接触，以使得所需的电压和电流可通过导体图案被引向元件和远离元件。可通过使用单连接方法同时形成机械附着和电接触，或者可以首先形成机械附着并在后续一些适当的工艺阶段中形成电接触来形成机械附着和电接触。还可以以首先形成电接触同时形成初步机械附着的方式来进行，在这种情况下，在后续一些适当的工艺阶段中形成最终的机械附着。
可利用几种技术来形成元件的电接触：
-在一个实施方案中，利用超声结合方法将元件连接到导体层上。
-在第二实施方案中，通过钎焊将元件连接到导体层上。
-在第三实施方案中，通过导电粘合剂将元件连接到导体层上。
-在第四实施方案中，通过使用通路方法(via method)将元件连接到导体层上。
在用于元件的第一、第二和第三连接技术中，不必在元件的接触区域的位置上在导体层中制造接触开口。另一方面，如果使用通路方法，那么在导体层中或者至少在其导体图案部分中制造接触开口，该接触开口的位置与元件的接触区域的位置对应。也可根据几种不同的实施方案来实施接触开口的制作：
-在第一实施方案中，在附着元件之前制造接触开口并贯穿整个导体层，即，所述开口同时延伸通过导体层和导体图案。然后元件可与接触开口对准。
-在第二实施方案中，在附着元件之前局部制造接触开口，使得所述局部制造的接触开口延伸到导体层中而不延伸穿过它。在这种实施方案中，接触开口在以后被打开以延伸通过导体图案，或者，它们与导体层的减薄相关地被打开。
-在第三实施方案中，在附着元件之后但在减薄导体图案之前制造接触开口。在这种实施方案中，以使得接触开口延伸通过整个导体层的方式制造接触开口，或者，接触开口部分穿入导体层，使得它们在最后与导体层的减薄相关地被打开。
-在第四实施方案中，在附着元件和减薄导体图案之后制造接触开口。在这种实施方案中，接触开口延伸通过导体层。
-第五实施方案中，与导体图案的制造相关地在导体图案中制造接触开口。
当使用通路方法时，在方法的适当阶段中利用导体材料例如金属、金属合金、导电糊剂或导电聚合物例如导电粘合剂来填充接触开口。作为替代方案，用导体材料对接触开口的边缘进行表面处理。利用如下实施方案实现最好的电接触：其中，例如利用化学和/或电化学表面处理方法(surfacing method)使金属生长到开口中和生长在元件的接触区域的顶部上来填充接触开口。因而可以在接触开口中产生基本上为纯金属的通路结构。然后还可以在接触开口中产生与接触区域的导体材料冶金接触的通路结构。
可利用几种技术形成元件的机械附着：
-在一个实施例中，通过钎焊或利用超声结合方法将元件附着到导体层。例如，通过用硬化聚合物填充元件和导体层之间的间隙、或通过用同时粘合到元件和导体图案的表面上的绝缘材料紧密包围元件，借助于绝缘材料后续增强所产生的机械附着。
-在第二实施方案中，利用导电粘合剂将元件附着到导体层。粘合剂本身可以同时形成充分的机械附着。也可以以关于前述实施方案所述的方式增强机械附着。粘合剂可以是各向同性导电的粘合剂或各向异性导电的粘合剂。
-在第三实施方案中，通过绝缘粘合剂将元件附着到导体层。可以以后通过绝缘粘合剂形成电接触。
也可以以几种不同的方式实施导体层的减薄。导体层的减薄旨在从导体图案之间去除导体材料。
-根据一个实施方案，以下列方式全面减薄导体层：导体层的厚度同时在导体图案的位置上以及在在导电图案之间剩余的区域中减小。例如可通过湿蚀刻来实施减薄。
-根据第二实施方案，以下列方式在各区域中减薄导体层：导体层的厚度在在导体图案之间剩余的区域中减小但在导体图案的位置上保持基本上不变。这可以例如通过在导体图案的表面上使用适当蚀刻掩模的湿蚀刻来实现。
在几个实施方案中，在元件周围以及在导体图案的表面上形成绝缘材料层。可以由一个或更多个绝缘材料板或由以流体形式涂敷的绝缘材料来制造绝缘材料层。例如可根据以下的实施方案制造绝缘材料层：
-在一个实施方案中，形成绝缘材料层并在其表面上形成导体层。在形成导体层之前或之后，在绝缘材料层中制造适当的用于元件的开口。
-在第二实施方案中，在导体层的表面上形成绝缘材料层。然后，在绝缘材料层中打开用于元件的开口。
-在第三实施方案中，首先将元件附着到导体层(机械附着或电接触和至少初步的机械附着)，然后在导体层的表面上以及在元件周围形成绝缘材料层。
在这些实施方案中，导体层的导体箔通常是一体化的、或者至少基本上一体化的导体箔。因此，可以例如出于对准目的在导体层中存在例如小孔。但是，导体层可作为单个部件来处理。导体箔的厚度一般使得它将在没有支撑的条件下耐受工艺所需要的处理而不破裂或受损。在实施方案中，当然可以使用更薄的导体箔，在这情况下，导体箔将借助于支撑体层来支持。
在实施方案中，导体层的导体图案包括在电路板结构中制造的导体图案层的导体、或与这些导体对应的图案。导体可由此根据所需的电路板设计相互连接或分开。
提到的元件的接触区域是指元件表面上的导体区域，通过该导体区域可以与元件形成电接触。在此意思上，可通过例如接触凸起或元件表面上的导体区域来形成接触区域。
以下借助实例并参照附图解释本发明。
图1～8表示根据第一实施方案的制造过程中的电路板结构的中间阶段的系列横截面图。
图9～16表示根据第二实施方案的制造过程中的电路板结构的中间阶段的系列横截面图。
图17～22表示根据第三实施方案的制造过程中的电路板结构的中间阶段的系列横截面图。
图23～26表示根据第四实施方案的制造过程中的电路板结构的中间阶段的系列横截面图。
图27～32表示根据第五实施方案的制造过程中的电路板结构的中间阶段的系列横截面图。
在第一实例中，首先制造图1所示的电路板坯体(blank)。图1的电路板坯体包含绝缘材料层1、该绝缘材料层1的第一表面上的导体箔3和第二表面上的导体箔2。电路板坯体还包含凹槽4。另外，电路板坯体在绝缘材料层1和导体箔2之间包含较薄的绝缘材料层11。绝缘材料层11可以是与绝缘材料层1的材料不同的材料，或者，它可以是绝缘材料层1的一部分。在前一种情况下，可例如通过将绝缘材料层1、导体箔2、导体箔3和绝缘材料层11层合在一起或以其他方式将它们相互结合以形成图1的电路板坯体。在后一种情况下，例如可以由如下方式形成图1的电路板坯体：在由绝缘材料1、导体箔2和导体箔3形成的坯体中制成凹槽4。在这种情况下，凹槽4将不完全延伸通过绝缘材料层1，而是在凹槽的“底部”留下绝缘材料层11的相应部分。
当然，可以修改实例的方法，使得凹槽4延伸到导体箔2，在这种情况下，在电路板坯体中、至少在凹槽的位置上不存在绝缘材料层11。但是，至少在一些实施方案中，可通过利用绝缘材料层11改善电路板结构的可靠性。这是因为如下事实：局部使用绝缘材料层11保证了在元件和导体箔2之间的绝缘材料中不保留不必要的开口。
通过在导体箔2和3的表面上涂敷抗蚀剂层5(通常为光刻胶层)来从图1所示的情况继续进行制造。在图2中示出该阶段。通过图案化的掩模曝光光刻胶层5并接着显影该坯体。在显影后，以所需的方式对曝光的光刻胶层5进行图案化以形成图3所示的导体图案掩模。
通过在去除了光刻胶的区域中电解生长导体材料(通常为铜)继续进行制造。由此在导体箔2和3的表面上形成所需导体图案6和7，图4所示。导体图案的厚度可以为例如20微米，而制成的导体图案的线的宽度也可以制成小于20微米。因此，该方法也可用于制造小并且精确的导体图案。
可以修改该方法，使得可在导体图案6和7的表面上或在导体箔2和3与导体图案6和7之间的界面上制造诸如锡的一些其它金属或金属合金的层。该层可用作蚀刻停止层。
也可以修改该方法，使得仅在涂敷光刻胶层5之后或者在更晚的工艺阶段中制造凹槽4。
在制造导体图案6和7后，可去除抗蚀剂层5。另外，在元件的接触区域的位置上，在电路板坯体的导体图案6中制造接触开口8。可以制造接触开口8，使得它们基本上延伸通过导体图案8或使得它们基本上延伸通过导体图案8和导体箔2(即，穿过整个导体层)的方式制成接触开口8。还可以从其它方向制造接触开口，使得它们仅延伸通过绝缘材料层11和导体箔2。在实例中，制造接触开口8，使得它们延伸通过导体图案6、导体箔2和绝缘材料层11。图4表示该中间阶段之后的电路板坯体。
可以例如通过激光钻孔制造接触开口8。接触开口8相对于导体图案6排列在恰当位置上。接触开口8的相互位置与元件的接触区域的相互位置对应。因此，对于参与产生电接触的每个接触区域，制造至少一个接触开口8。制造的接触开口8的表面区域可大致与相应的接触区域的表面区域一样大。当然，与相应的接触区域的表面区域相比，可以选择较小的接触开口8的表面区域，或者在一些实施例中选择稍大的接触开口8的表面区域。
在实例中，元件9借助于粘合剂10附着到电路板坯体。为了粘合，在凹槽4的“底部”上，在绝缘材料层11的表面上涂敷粘合剂层10。图5表示该中间阶段。作为替代方案，可以在元件9的附着表面上或者同时在元件9的附着表面和绝缘材料层11的表面上涂敷粘合剂层。也可以在多个阶段和在多个层中涂敷粘合剂10。然后，借助于对准掩模，元件9可在为元件9设计的位置中对准。例如，接触开口8或导体图案6或7或各单独的对准掩模(图中未示出)可用作对准掩模。图6表示粘合元件9之后的电路板坯体。
术语元件9的附着表面是指将面对导体图案6的元件9的表面。元件9的附着表面包含接触区域，利用该接触区域可形成与元件的电接触。接触区域可例如是元件9的表面上的平整区域，或者更通常地为从元件9的表面上突出的诸如接触凸起的接触突起物。通常在元件9中存在至少两个接触区域或接触突起物。在复杂的微电路中，也可存在非常多的接触区域。
在许多实施方案中，优选在附着表面或多个附着表面上涂敷大量粘合剂使得粘合剂填充在元件9和与元件相对的结构之间的空间。从而不再需要单独的填充剂。良好的填充将增强元件9和电路板坯体之间的机械连接，由此使得实现机械上更耐久的结构。没有间隙的整体的粘合剂层10还将支撑导体图案并在后续工艺阶段中保护所述结构。在粘合过程中，如果接触开口8朝向附着表面，那么粘合剂也通常进入这些开口中。
术语粘合剂是指可将元件附着到电路板坯体的物质。粘合剂的一种性能是它可以以相对流体形式或者以其他符合表面形状的形式例如以膜的形式涂敷在电路板坯体和/或元件的表面上。粘合剂的另一种性能是在涂敷后粘合剂至少部分硬化或者可硬化，使得粘合剂能够至少在元件以某种其它方式被附着到结构之前将元件保持在适当的位置上。粘合剂的第三种性能是粘接能力，即其对待粘合的表面的粘合能力。
术语粘合是指借助于粘合剂将元件和电路板相互附着。因此，在粘合中，粘合剂被引入元件和电路板之间，并且元件相对于电路板坯体被设置在适当的位置中，在该位置中粘合剂与元件和电路板坯体接触并至少部分填充元件和电路板坯体之间的空间。然后，粘合剂(至少部分地)被动硬化，或者粘合剂(至少部分地)主动硬化，使得元件借助于粘合剂附着到电路板坯体。在一些实施方案中，元件的接触突起物可在粘合过程中延伸通过粘合剂层以电路板坯体的其它结构。
在实施方案中使用的粘合剂是例如热固化环氧树脂。选择粘合剂，使得使用的粘合剂对电路板坯体和元件具有足够的附着力。粘合剂的一种有益的性能是适当的热膨胀系数，使得在处理过程中粘合剂的热膨胀与周围的材料的热膨胀差异不太大。选择的粘合剂还应优选具有短的硬化时间、优选最多几秒。在该时间内，粘合剂应至少部分硬化，使得粘合剂将能够将元件保持在适当的位置上。最终的硬化可花费明显更多的时间，并且，最终硬化甚至可被设计为与后续工艺阶段相关联地发生。粘合剂的导电率优选为与绝缘材料的导电率相同的量级。
附着的元件9可以例如是集成电路，例如存储器芯片、处理器或ASIC。附着的元件也可以例如是MEMS、LED或无源元件。附着的元件可以是封装的或无封装的，并可在其接触区域中包含接触凸起，或者没有凸起。在元件的接触区域的表面上，还可存在比接触凸起薄的导体面层(surfacing)。因此，元件的接触区域的外表面可以处于元件的外表面的水平上、在元件的表面中的凹陷的底部上、或在从元件的表面延伸的突起物的表面上。
在粘合元件9之后，用填充剂材料12填充凹槽。也可以修改实例，使得从仅包含导体箔2并可能包含绝缘材料层11的电路板坯体(图1中的情况)开始进行制造。然后，除了与导体箔3、导体图案7和与它们相关的抗蚀剂层5有关的方法阶段自然被省略以外，工艺阶段与上述相同。在本实施方案中，在粘合元件之后电路板坯体包含(参照图6)：
-通过导体箔2和导体图案6形成的导体层；
-粘合剂层10；
-任选地，导体层和粘合剂层10之间的绝缘材料导11；
-接触开口8；和
-至少一个元件9。
在该变化的实施方案中，不存在待填充的凹槽4，而在该阶段中，在电路板坯体的具有元件9的表面上形成包围元件9并支撑导体层2和6的绝缘体层1。例如可通过将已在元件9的位置上制成开口的绝缘材料板放在电路板坯体的顶部上来形成绝缘体层1。另外，可将一体化绝缘材料板放在绝缘材料板9的顶部。两个板可以类似，或者也可以使用相互不同的板，其中至少一个被预硬化或未硬化。适于绝缘体层1的材料的例子是PI(聚酰亚胺)、FR4、FR5、芳族聚酰胺、聚四氟乙烯、特氟纶、LCP(液晶聚合物)和预硬化粘合剂层即预浸料坯(prepreg)。利用热和压力来挤压放在电路板坯体顶部的绝缘材料板，以形成一体化的绝缘体层1。在绝缘材料板中，在一个上表面上还可以存在现成的导体图案层，这样，在挤压后电路板坯体将包含至少两个导体图案层一体化。如系列附图所示。但是，在本实施方案中，导体图案7也可被设计在元件9的位置上。
在系列附图所示的实例中以及在上述修改的实例中，接着可以制造通路13，借助于该通路13在元件9的接触区域和导体图案6之间形成电接触。为了制造通路，将粘合剂和可能被推入接触开口8中的其它材料清洗掉。与接触开口8的清洗相关，还可以清洗元件9的接触区域，由此用于制造高质量电接触的条件将进一步改善。可以利用例如等离子体技术、化学性地或借助于激光来实施清洗。如果接触开口4和接触区域已足够清洁，那么清洗自然可被省略。
如果使得接触开口8仅部分穿透，那么接触开口8在该阶段中被打开。还可以以在该阶段中完整地制造接触开口8的方式来进行。
在清洗后，由于当从导体图案的方向观看时，正确对准的元件的接触区域将通过接触开口8出现，因此还能够核实元件9的对准的成功。
然后，导体材料以使得在元件9和导体图案6之间产生电接触的方式被引入接触开口8中。例如通过用导电糊剂填充接触开口8制造通路13的导体材料。也可通过使用在电路板工业中已知的几种生长方法中的一种来制造导体材料。例如可通过诸如化学或电化学方法的表面处理方法形成冶金连接来制造高质量电接触。一种良好的替代方案是使用化学方法生长薄层并使用更经济的电化学方法继续生长。术语填充是指接触开口至少基本上被导体材料填充。作为填充的替代，也可以以仅对接触开口的边缘进行表面处理的方式来实施表面处理。除了这些方法以外，当然也可以使用在最终结果方面有利的一些其它方法。
在系列附图的实例中，首先用薄的导体层对接触开口8、元件9的接触区域和导体图案6进行表面处理，然后，以电解的方式增加导体层的厚度直到接触开口8被导体材料填充。图7表示生长后的结构。然后，蚀刻电路板坯体，以去除多余的导体材料。如果在导体图案6和7的表面上使用保护膜，那么仅从保留在导体图案6和7外侧的导体箔2和3的那些部分上基本上去除导体材料。作为替代方案，可蚀刻整个导体层，使得从导体图案6和7外侧去除导体箔2和3的材料。在这种情况下，导体图案6和7的材料也将被去除，但导体图案6和7将被复制到导体箔2和3的材料中。
系列附图9～16表示上述实例的一种变化方案。在该变化方案中，利用上述的方法阶段的适当部分，并且过程如下：
-制造包含绝缘体层1、凹槽4和导体箔2和3的电路板坯体(图9)。
-涂敷光刻胶5并通过掩模进行曝光(图10)。曝光的区域5′在图中被示为变黑。
-制造接触开口8(图11)。
-涂敷粘合剂10(图12)。
-借助于粘合剂层10将元件9附着到电路板坯体(图13)并用填充剂12填充凹槽4。
-显影抗蚀剂，使得保留的所有抗蚀剂是抗蚀剂5的未暴露区域。清洗接触开口8。在图14中示出这些阶段之后的电路板坯体。
-利用电解方法生长导体材料。然后在抗蚀剂5的开口中生长导体材料，并且填充接触开口8，由此同时形成导体图案6和7以及通路13(图15)。
-去除抗蚀剂5并蚀刻导体材料，使得当从导体图案之间的区域去除导体材料时，所需的导体图案与导体层分离(图16)。
在系列附图9～16所示的实施方案中，导体箔2和3优选相对于将在它们的表面上生长的导体图案6和7较薄。导体箔2和3由此旨在向生长区域传导电解生长所需要的电流。如果导体箔2和3相对于导体图案6和7较薄，那么从导体图案6和7外侧将导体箔2和3蚀刻掉将基本上不影响导体图案6和7的相对尺寸。
系列附图17～22表示上述实例的第三变化方案。在该变化方案中，利用上述的方法阶段的适当部分，并且过程如下：
-制造包含导体箔2和导体图案6的电路板坯体(图17)。这可以例如以在导体箔2的顶部涂敷抗蚀剂5，曝光和显影该抗蚀剂5的方式来完成。然后，例如利用电化学方法在在抗蚀剂5中形成的开口中生长金属。在该变化方案中，还在抗蚀剂的曝光掩模中限定接触开口，使得抗蚀剂将保持在接触开口8′的位置上。因此，与导体图案6的生长相关，接触开口8也形成在导体图案6中并由此直接并以自对准的方式相对于导体图案6定位在正确的位置中。
-去除抗蚀剂，打开接触开口8以使其也延伸通过导体箔2(图18)。
-元件9借助于粘合剂10被粘合到导体图案6的表面上(图19)。元件相对于导体图案6和接触开口8排列在正确的位置中。
-在电路板坯体的顶部形成绝缘材料层1(图20)。
-清洗接触开口8并在接触开口中由导体材料制造通路13(图21)。在图中的实例中，利用表面处理方法制造通路13。在这种情况下，对通路进行表面处理，以使得产生必要的电接触，即通常至少在接触开口8的边缘上形成导体层。在图中的实例中，完全由导体材料生长接触开口8。进入通路13中的导体材料越多，则通路13的导电性越好。通路13实际上优选被制成为至少基本上被导体材料填充。
-例如通过蚀刻去除导体箔2。(图22)。
系列附图23～26表示上述实例的第四变化方案。在该变化方案中，利用上述的方法阶段的适当部分，并且过程如下：
-制造包含导体箔2和导体图案6的电路板坯体(图23)。这可以例如以在导体箔2的顶部涂敷抗蚀剂5，曝光显影该抗蚀剂5的方式来完成。然后，例如利用电化学方法在形成在抗蚀剂5中的开口中生长金属。
-借助于各向异性导电粘合剂20在导电图案6的顶部粘接元件9(图24)。各向异性导电粘合剂20在元件的接触区域和导电图案6之间的方向上形成电接触。但是，粘合剂20在横向上电绝缘，使得既不在元件的接触区域之间也不在导体图案6的分开的导体之间形成电接触。
-在电路板坯体的顶部形成绝缘材料层1，并在该绝缘材料层1的表面上形成导体箔3(图25)。
-例如通过蚀刻去除导体箔2。图案化导体箔3以形成导体图案7(图26)。
系列附图27～32表示上述实例的第五变化方案。在该变化方案中，利用上述的方法阶段的适当部分，并且过程如下：
-制造包含导体箔2和导体图案6的电路板坯体(图27)。这可以例如以在导体箔2的顶部涂敷抗蚀剂5，曝光显影该抗蚀剂5的方式来完成。然后，例如利用电化学方法在形成在抗蚀剂5中的开口中生长金属。
-在抗蚀剂5和导体图案6的顶部涂敷第二抗蚀剂15，曝光并显影。例如利用电化学方法在形成在抗蚀剂15中的开口中制造导体材料。制造的导体区域在导体图案6的表面上形成接触凸起17(图28)。
-去除抗蚀剂5和15(图29)。
-利用适当的方法在导体图案6的顶部并靠着接触凸起17附着元件9(图30)。在图中的实例中，通过超声结合方法或替代性地通过热压结合方法来实施结合。在图中的实例中，使用本身不包含接触凸起的元件9。
-在电路板坯体的顶部形成绝缘材料层1，并在该绝缘材料层1的顶部形成导体箔3(图31)。
-例如通过蚀刻去除导体箔2。图案化导体箔3以形成导体图案7(图32)。
在实施方案中，也可使用单独的支撑体层以支撑导体箔或由导体箔和导体图案形成的导体层。
也可在导体箔和导体图案之间或在它们中的任一个的表面上使用将不溶于使用的蚀刻剂中或将极慢地溶于其中的适当中间层。因此，蚀刻在中间层处停止，并且所需表面可得以精确地限定。例如可由诸如锡的某种其它金属制成这类中间层。如果需要的话，例如可用某种其它的蚀刻剂化学性地去除该中间层。
当使用在制造导体图案6之后对准并形成接触开口8的制造方法时，可以通过使接触开口8的直径的尺寸大于导体图案6的导体的宽度来减小方法对于对准误差的敏感度。
根据上述实例的方法具有大量的变化方案，而由实例示出的方法也可以相互组合。这些变化方案可涉及各单个工艺阶段，或涉及工艺阶段的相互次序。
也可以在电路板结构中制造未在上述实例出现的许多特征。例如，除了参与产生电接触的通路以外，也可以制造旨在更有效地将热传导远离元件9的热通路。热传导率的增大基于热通路材料的热导率比周围绝缘材料的热导率大。由于电导体一般也是良好的热导体，因此通常可通过使用与元件9的电接触相同的技术并且甚至在与元件9的电接触相同的工艺阶段中制造热通路。
基于前述实例，显然，该方法也可用于制造许多不同类型的三维电路结构。例如可以使用该方法，使得几个元件例如半导体芯片相互叠置，由此产生包含几个元件的封装件，在该封装件中元件相互连接以形成单个功能性整体。这种封装件可被称为三维微芯片模块。
附图的实例示出一些可能工艺过程，利用这些工艺过程可使用本发明。但是，我们的发明不仅仅限于上述的工艺过程，相反，在权利要求的全部范围内并考虑等效解释，本发明还覆盖各种其它的过程和它们的最终产品。本发明也不仅仅限于通过实例说明的结构和方法，相反，本领域技术人员很容易理解，本发明的各种应用可用于制造非常多的不同种类的电子模块和电路板，这些电子模块和电路板甚至可与给出的实例大大不同。因此，图中给出的元件和电路意图仅在于解释制造过程。在不背离根据本发明的基本思想的条件下，可对于上述实例的过程做出许多的改变。改变可例如与在各阶段中描述的制造技术有关，或与工艺阶段的相互次序有关。
借助于该方法，还可以制造用于附着到电路板上的元件封装件。这些封装件还可包含相互电连接的几个元件。
该方法还可用于制造整个电子模块。模块也可以是其外表面可以以与常规电路板相同的方式附着元件的电路板。

Claims (20)

1.一种用于制造电路板结构的方法，所述方法包括：
-制造包含导体箔(2)和所述导体箔的表面上的导体图案(6)的导体层；
-将元件(9)附着到所述导体层；
-以从所述导体图案(6)外侧去除所述导体层的导体材料的方式减薄所述导体层。
2.根据权利要求1的方法，其特征在于，所述制造的导体层的厚度在所述导体图案(6)的位置处比在所述导体图案外侧处大。
3.根据权利要求1或2的方法，其特征在于，以从所述导体图案(6)外侧去除导体材料的方式选择性地减薄使所述导体层，但在减薄的过程中在所述导体图案的位置处的所述导体层的厚度基本上保持相同。
4.根据权利要求1或2的方法，其特征在于，以使所述导体层的厚度在所述导体图案(6)的位置处以及在所述导体图案的外侧均减小的方式来使全面减薄所述导体层。
5.根据权利要求1～4中的任一项的方法，其特征在于，所述元件(9)在所述导体图案(6)侧被附着到所述导体层，并且所述导体层从所述导体箔(2)的方向减薄。
6.根据权利要求1～4中的任一项的方法，其特征在于，所述元件(9)被附着到所述导体层的所述导体箔(2)侧，并且所述导体层从所述导体图案(6)的方向减薄。
7.根据权利要求1～6中的任一项的方法，其特征在于，以在所述元件的接触区域与所述导体层之间产生电接触的方式将所述元件(9)附着到所述导体层。
8.根据权利要求7的方法，其特征在于，在减薄所述导体层之前形成所述电接触。
9.根据权利要求7或8的方法，其特征在于，在所述导体层中制造开口(8)或凹槽，用于形成在所述元件(9)的接触区域与所述导体层之间的所述电接触(13)。
10.根据权利要求9的方法，其特征在于，在附着所述元件(9)之前制造所述开口(8)或凹槽。
11.根据权利要求9或10的方法，其特征在于，当形成所述电接触时，用导体材料对所述开口(8)或凹槽进行填充或表面处理，例如通过表面处理方法、通过在所述开口或凹槽中生长所述导体材料、或者通过用导电糊剂或粘合剂填充所述开口或凹槽而进行。
12.根据权利要求7～11中的任一项的方法，其特征在于，在产生电接触之前，将所述元件(9)粘合到所述导体层上。
13.根据权利要求1～12中的任一项的方法，其特征在于，在所述元件(9)的附着中使用通路方法，以形成与所述元件(9)的电接触。
14.根据权利要求7或8的方法，其特征在于，在所述导体层的表面上制造接触凸起(17)，用于在所述元件(9)的接触区域与所述导体层之间产生的电接触。
15.根据权利要求7、8或14的方法，其特征在于，通过使用热压方法、超声结合方法、钎焊或利用导电粘合剂产生所述电接触。
16.根据权利要求1～15中的任一项的方法，其特征在于，在附着所述元件(9)之后并在减薄所述导体层之前，在所述导体层的顶部形成包围所述元件的绝缘体层(1)。
17.根据权利要求1～15中的任一项的方法，其特征在于，所述导体层被制造或将它附着到所述绝缘体层(1)的表面上，并且，将所述元件(9)附着到在所述绝缘体层中制造用于所述元件的孔(4)或凹槽。
18.根据权利要求1～17中的任一项的方法，其特征在于，除了所述电接触以外，在所述电路板结构中还形成旨在更有效地将热能传导远离所述元件(9)的至少一个热接触。
19.根据权利要求1～18中的任一项的方法，其特征在于，在所述导体层的表面上形成用于制造所述导体图案(6)的包含限定所述导体图案(6)的开口的图案化掩模层(5)，并通过电解生长在所述开口中制造所述导体图案(6)。
20.一种电路板结构，所述电路板结构是利用根据权利要求1～19中的任一项的方法来制造的。
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CN100596258C (zh) 2010-03-24
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US20210392752A1 (en) 2021-12-16
JP2008544510A (ja) 2008-12-04
FI20050646A (fi) 2006-12-17
FI20050646A0 (fi) 2005-06-16
EP1891845A2 (en) 2008-02-27
KR20080038124A (ko) 2008-05-02
WO2006134216A3 (en) 2007-07-05
US9622354B2 (en) 2017-04-11
US20140059851A1 (en) 2014-03-06
US8581109B2 (en) 2013-11-12
KR101090423B1 (ko) 2011-12-07
FI119714B (fi) 2009-02-13
US11134572B2 (en) 2021-09-28
US20170071061A1 (en) 2017-03-09
EP1891845B1 (en) 2016-08-10
US20080202801A1 (en) 2008-08-28
US11792941B2 (en) 2023-10-17

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