DE69405832T2 - Von der Peripherie-unabhängiges präzises Positionsglied für einen Halbleiterchip und Herstellungsverfahren dafür - Google Patents

Von der Peripherie-unabhängiges präzises Positionsglied für einen Halbleiterchip und Herstellungsverfahren dafür

Info

Publication number
DE69405832T2
DE69405832T2 DE69405832T DE69405832T DE69405832T2 DE 69405832 T2 DE69405832 T2 DE 69405832T2 DE 69405832 T DE69405832 T DE 69405832T DE 69405832 T DE69405832 T DE 69405832T DE 69405832 T2 DE69405832 T2 DE 69405832T2
Authority
DE
Germany
Prior art keywords
peripheral
manufacturing
semiconductor chip
method therefor
precise position
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69405832T
Other languages
English (en)
Other versions
DE69405832D1 (de
Inventor
Dimitry G Grabbe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Whitaker LLC
Original Assignee
Whitaker LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Whitaker LLC filed Critical Whitaker LLC
Publication of DE69405832D1 publication Critical patent/DE69405832D1/de
Application granted granted Critical
Publication of DE69405832T2 publication Critical patent/DE69405832T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/564—Details not otherwise provided for, e.g. protection against moisture
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04—Mounting of components, e.g. of leadless components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Solid State Image Pick-Up Elements (AREA)
DE69405832T 1993-07-28 1994-06-03 Von der Peripherie-unabhängiges präzises Positionsglied für einen Halbleiterchip und Herstellungsverfahren dafür Expired - Fee Related DE69405832T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US9865693A 1993-07-28 1993-07-28

Publications (2)

Publication Number Publication Date
DE69405832D1 DE69405832D1 (de) 1997-10-30
DE69405832T2 true DE69405832T2 (de) 1998-02-05

Family

ID=22270338

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69405832T Expired - Fee Related DE69405832T2 (de) 1993-07-28 1994-06-03 Von der Peripherie-unabhängiges präzises Positionsglied für einen Halbleiterchip und Herstellungsverfahren dafür

Country Status (5)

Country Link
US (1) US5637919A (de)
EP (1) EP0637070B1 (de)
JP (1) JPH0778897A (de)
KR (1) KR950005138A (de)
DE (1) DE69405832T2 (de)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010030370A1 (en) * 1990-09-24 2001-10-18 Khandros Igor Y. Microelectronic assembly having encapsulated wire bonding leads
US7198969B1 (en) * 1990-09-24 2007-04-03 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US5148265A (en) 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
US5679977A (en) 1990-09-24 1997-10-21 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US5905300A (en) * 1994-03-31 1999-05-18 Vlsi Technology, Inc. Reinforced leadframe to substrate attachment
US6196409B1 (en) * 1995-07-05 2001-03-06 The Procter & Gamble Company Venting means
US5789930A (en) * 1995-12-14 1998-08-04 International Business Machine Corporation Apparatus and method to test for known good die
US5693565A (en) * 1996-07-15 1997-12-02 Dow Corning Corporation Semiconductor chips suitable for known good die testing
US6198172B1 (en) 1997-02-20 2001-03-06 Micron Technology, Inc. Semiconductor chip package
US6048744A (en) 1997-09-15 2000-04-11 Micron Technology, Inc. Integrated circuit package alignment feature
US6956282B1 (en) * 1997-11-05 2005-10-18 Texas Instruments Incorporated Stabilizer/spacer for semiconductor device
SG80587A1 (en) * 1998-03-25 2001-05-22 Texas Instr Singapore Pte Ltd Semiconductor device testing and burn-in methodology
US6195264B1 (en) 1998-11-18 2001-02-27 International Business Machines Corporation Laminate substrate having joining layer of photoimageable material
US6272018B1 (en) * 1999-02-11 2001-08-07 Original Solutions Inc. Method for the verification of the polarity and presence of components on a printed circuit board
US6285432B1 (en) 1999-03-23 2001-09-04 Ericsson Inc. Method and apparatus for locating LCD connectors
US6861345B2 (en) * 1999-08-27 2005-03-01 Micron Technology, Inc. Method of disposing conductive bumps onto a semiconductor device
US6991960B2 (en) * 2001-08-30 2006-01-31 Micron Technology, Inc. Method of semiconductor device package alignment and method of testing
US8455994B2 (en) * 2002-01-31 2013-06-04 Imbera Electronics Oy Electronic module with feed through conductor between wiring patterns
FI119215B (fi) * 2002-01-31 2008-08-29 Imbera Electronics Oy Menetelmä komponentin upottamiseksi alustaan ja elektroniikkamoduuli
FI20031341A (fi) 2003-09-18 2005-03-19 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
TWI239611B (en) * 2004-04-19 2005-09-11 Advanced Semiconductor Eng Multi chip module with embedded package configuration and method for manufacturing the same
FI117814B (fi) * 2004-06-15 2007-02-28 Imbera Electronics Oy Menetelmä elektroniikkamoduulin valmistamiseksi
WO2006134220A1 (en) * 2005-06-16 2006-12-21 Imbera Electronics Oy Method for manufacturing a circuit board structure, and a circuit board structure
FI122128B (fi) * 2005-06-16 2011-08-31 Imbera Electronics Oy Menetelmä piirilevyrakenteen valmistamiseksi
FI119714B (fi) 2005-06-16 2009-02-13 Imbera Electronics Oy Piirilevyrakenne ja menetelmä piirilevyrakenteen valmistamiseksi
US20070093084A1 (en) * 2005-10-21 2007-04-26 Rossmax International Ltd. Method for manufacturing antipressure linear circuit board and circuit board manufactured therefrom
US20070126445A1 (en) * 2005-11-30 2007-06-07 Micron Technology, Inc. Integrated circuit package testing devices and methods of making and using same
CN101872936A (zh) * 2010-06-09 2010-10-27 中国科学院半导体研究所 半导体激光器老化夹具
CN103326231B (zh) * 2012-03-20 2015-06-24 山东浪潮华光光电子股份有限公司 一种半导体激光器老化方法及固定夹具
US20140284040A1 (en) * 2013-03-22 2014-09-25 International Business Machines Corporation Heat spreading layer with high thermal conductivity

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3777221A (en) * 1972-12-18 1973-12-04 Ibm Multi-layer circuit package
FR2320633A1 (fr) * 1975-08-04 1977-03-04 Itt Boitier de circuit integre
JPS58125853A (ja) * 1982-01-22 1983-07-27 Toshiba Corp 半導体装置
JPS59158540A (ja) * 1983-02-28 1984-09-08 Hitachi Ltd フラツトパツク形集積回路
US4565314A (en) * 1983-09-09 1986-01-21 At&T Bell Laboratories Registration and assembly of integrated circuit packages
EP0312217A1 (de) * 1987-09-30 1989-04-19 AT&T Corp. Zusammenbau von integrierten Schaltungschips
AU645283B2 (en) * 1990-01-23 1994-01-13 Sumitomo Electric Industries, Ltd. Substrate for packaging a semiconductor device
US5182782A (en) * 1990-07-11 1993-01-26 Gte Laboratories Incorporated Waferboard structure and method of fabricating
JPH0770806B2 (ja) * 1990-08-22 1995-07-31 株式会社エーユーイー研究所 超音波溶着による電子回路およびその製造方法
US5521427A (en) * 1992-12-18 1996-05-28 Lsi Logic Corporation Printed wiring board mounted semiconductor device having leadframe with alignment feature
US5342206A (en) * 1993-07-15 1994-08-30 The Whitaker Corporation Socket for direct electrical connection to an integrated circuit chip

Also Published As

Publication number Publication date
JPH0778897A (ja) 1995-03-20
KR950005138A (ko) 1995-02-18
DE69405832D1 (de) 1997-10-30
EP0637070B1 (de) 1997-09-24
EP0637070A1 (de) 1995-02-01
US5637919A (en) 1997-06-10

Similar Documents

Publication Publication Date Title
DE69405832D1 (de) Von der Peripherie-unabhängiges präzises Positionsglied für einen Halbleiterchip und Herstellungsverfahren dafür
DE69232611T2 (de) Gestapelte Chip-Anordnung und Herstellungsverfahren für dieselbe
DE69133497D1 (de) Leiterrahmen für eine Halbleiteranordnung und dessen Herstellungsverfahren
DE69434234D1 (de) Chipkarte und Herstellungsmethode
DE69435045D1 (de) Halbleiter-Anordnung und Herstellungsverfahren dafür
DE69518793D1 (de) Herstellungsverfahren für eine Halbleitervorrichtung
DE69832324D1 (de) Herstellungsverfahren für einen Halbleiter
DE69739485D1 (de) Herstellungsverfahren von einem Kondensator für eine Halbleitervorrichtung
DE69425592T2 (de) Dünne Chipkarte und ihr Herstellungsverfahren.
DE69430341T2 (de) Halbleiteranordnung mit schmallem Träger und Herstellungsverfahren
KR960015869A (ko) 반도체 칩과 일체화된 반도체 패키지 및 그 제조방법
DE69132153T2 (de) Halbleiterbauelemente mit niedrigem Versetzungsfehler und Herstellungsverfahren desselben
IT1248860B (it) Dispositivo a semiconduttore e suo metodo di fabbricazione
ITMI941237A0 (it) Disposizione a semiconduttori e procedimento di fabbricazione
FI946026A (fi) LC-elementti, puolijohdelaite ja LC-elementin valmistusmenetelmä
DE4294151T1 (de) Magnetoresistives Element und Herstellungsverfahren dafür
KR890015418A (ko) 반도체 집적회로와 그 제조방법
IT1248814B (it) Dispositivo a semiconduttore e relativo metodo di fabbricazione
DE69224617T2 (de) Herstellungsverfahren für einen Halbleiterlaser
FI943504A (fi) LC-elementti, puolijohdelaite ja LC-elementin valmistusmenetelmä
DE69025561D1 (de) Speicherzelle mit schwebendem Gatter und ihre Anwendung für einen Halbleiterspeicher
KR900012281A (ko) 불휘발성 반도체메모리와 그 제조방법
DE69333098D1 (de) Integriertes Halbleiterschaltkreisbauelement und dessen Herstellungsverfahren
DE69321432D1 (de) Integrierte magnetische Speicherelementschaltung und ihr Herstellungsverfahren
DE69421156T2 (de) Steuerverfahren für eine Halbleiterspeicherschaltung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee