DE69832324D1 - Herstellungsverfahren für einen Halbleiter - Google Patents

Herstellungsverfahren für einen Halbleiter

Info

Publication number
DE69832324D1
DE69832324D1 DE69832324T DE69832324T DE69832324D1 DE 69832324 D1 DE69832324 D1 DE 69832324D1 DE 69832324 T DE69832324 T DE 69832324T DE 69832324 T DE69832324 T DE 69832324T DE 69832324 D1 DE69832324 D1 DE 69832324D1
Authority
DE
Germany
Prior art keywords
semiconductor
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69832324T
Other languages
English (en)
Other versions
DE69832324T2 (de
Inventor
David Linn Edwards
Armando Salvatore Cammarano
Jeffrey Thomas Coffin
Mark Gerard Courtney
Drofitz, Jr
Ellsworth, Jr
Lewis Sigmund Goldmann
Sushumna Iruvanti
Frank Louis Pompeo
William Edward Sablinski
Raed A Sherif
Hilton T Toy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69832324D1 publication Critical patent/DE69832324D1/de
Publication of DE69832324T2 publication Critical patent/DE69832324T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
    • H01L2924/097—Glass-ceramics, e.g. devitrified glass
    • H01L2924/09701—Low temperature co-fired ceramic [LTCC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
DE69832324T 1997-04-30 1998-04-14 Herstellungsverfahren für einen Halbleiter Expired - Lifetime DE69832324T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US846935 1997-04-30
US08/846,935 US5881945A (en) 1997-04-30 1997-04-30 Multi-layer solder seal band for semiconductor substrates and process

Publications (2)

Publication Number Publication Date
DE69832324D1 true DE69832324D1 (de) 2005-12-22
DE69832324T2 DE69832324T2 (de) 2006-07-27

Family

ID=25299353

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69832324T Expired - Lifetime DE69832324T2 (de) 1997-04-30 1998-04-14 Herstellungsverfahren für einen Halbleiter

Country Status (9)

Country Link
US (1) US5881945A (de)
EP (1) EP0875932B1 (de)
JP (1) JP2999992B2 (de)
KR (1) KR100294968B1 (de)
CN (1) CN1160780C (de)
DE (1) DE69832324T2 (de)
MY (1) MY120319A (de)
SG (1) SG63843A1 (de)
TW (1) TW373276B (de)

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US6070321A (en) 1997-07-09 2000-06-06 International Business Machines Corporation Solder disc connection
US6390353B1 (en) * 1998-01-06 2002-05-21 Williams Advanced Materials, Inc. Integral solder and plated sealing cover and method of making the same
US6053394A (en) * 1998-01-13 2000-04-25 International Business Machines Corporation Column grid array substrate attachment with heat sink stress relief
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US6136128A (en) * 1998-06-23 2000-10-24 Amerasia International Technology, Inc. Method of making an adhesive preform lid for electronic devices
JP4135268B2 (ja) * 1998-09-04 2008-08-20 株式会社豊田中央研究所 無鉛はんだ合金
US6218730B1 (en) * 1999-01-06 2001-04-17 International Business Machines Corporation Apparatus for controlling thermal interface gap distance
US6091603A (en) * 1999-09-30 2000-07-18 International Business Machines Corporation Customizable lid for improved thermal performance of modules using flip chips
US6592019B2 (en) * 2000-04-27 2003-07-15 Advanpack Solutions Pte. Ltd Pillar connections for semiconductor chips and method of manufacture
US6292369B1 (en) 2000-08-07 2001-09-18 International Business Machines Corporation Methods for customizing lid for improved thermal performance of modules using flip chips
US6342407B1 (en) * 2000-12-07 2002-01-29 International Business Machines Corporation Low stress hermetic seal
KR100396551B1 (ko) * 2001-02-03 2003-09-03 삼성전자주식회사 웨이퍼 레벨 허메틱 실링 방법
GB2372633A (en) * 2001-02-24 2002-08-28 Mitel Semiconductor Ab Flip-chip mounted optical device
US6806568B2 (en) * 2001-07-20 2004-10-19 The Board Of Trustees Of The University Of Arkansas Decoupling capacitor for integrated circuit package and electrical components using the decoupling capacitor and associated methods
EP1345486A3 (de) * 2002-03-11 2006-04-19 Helmut Kahl Gerätegehäuse mit leitfähig beschichteter Abschirmdichtung bzw.- wand
DE10238581B4 (de) 2002-08-22 2008-11-27 Qimonda Ag Halbleiterbauelement
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US7690551B2 (en) * 2003-12-31 2010-04-06 Chippac, Inc. Die attach by temperature gradient lead free soft solder metal sheet or film
US20050174738A1 (en) * 2004-02-06 2005-08-11 International Business Machines Corporation Method and structure for heat sink attachment in semiconductor device packaging
JP2007532002A (ja) * 2004-03-30 2007-11-08 ハネウェル・インターナショナル・インコーポレーテッド 熱拡散器構造、集積回路、熱拡散器構造を形成する方法、および集積回路を形成する方法
US20050253282A1 (en) * 2004-04-27 2005-11-17 Daoqiang Lu Temperature resistant hermetic sealing formed at low temperatures for MEMS packages
JP4513513B2 (ja) * 2004-11-09 2010-07-28 株式会社村田製作所 電子部品の製造方法
US7743963B1 (en) 2005-03-01 2010-06-29 Amerasia International Technology, Inc. Solderable lid or cover for an electronic circuit
US20080175748A1 (en) * 2005-08-12 2008-07-24 John Pereira Solder Composition
US20070037004A1 (en) * 2005-08-12 2007-02-15 Antaya Technologies Corporation Multilayer solder article
US20070036670A1 (en) * 2005-08-12 2007-02-15 John Pereira Solder composition
US20070292708A1 (en) * 2005-08-12 2007-12-20 John Pereira Solder composition
JP5696173B2 (ja) * 2005-08-12 2015-04-08 アンタヤ・テクノロジーズ・コープ はんだ組成物
US20070231594A1 (en) * 2005-08-12 2007-10-04 John Pereira Multilayer solder article
JP4764159B2 (ja) * 2005-12-20 2011-08-31 富士通セミコンダクター株式会社 半導体装置
US7629684B2 (en) * 2006-04-04 2009-12-08 Endicott Interconnect Technologies, Inc. Adjustable thickness thermal interposer and electronic package utilizing same
WO2007129496A1 (ja) * 2006-04-07 2007-11-15 Murata Manufacturing Co., Ltd. 電子部品およびその製造方法
KR100703458B1 (ko) * 2006-04-20 2007-04-03 삼성에스디아이 주식회사 유기전계발광 표시 장치 및 그의 제작 방법
US7849914B2 (en) * 2006-05-02 2010-12-14 Clockspeed, Inc. Cooling apparatus for microelectronic devices
US7513035B2 (en) * 2006-06-07 2009-04-07 Advanced Micro Devices, Inc. Method of integrated circuit packaging
US20080296756A1 (en) * 2007-05-30 2008-12-04 Koch James L Heat spreader compositions and materials, integrated circuitry, methods of production and uses thereof
US20090004500A1 (en) * 2007-06-26 2009-01-01 Daewoong Suh Multilayer preform for fast transient liquid phase bonding
JP5310309B2 (ja) * 2009-06-26 2013-10-09 千住金属工業株式会社 はんだコートリッド
JP5537119B2 (ja) * 2009-10-28 2014-07-02 京セラ株式会社 蓋体並びに蓋体の製造方法および電子装置の製造方法
KR100976812B1 (ko) * 2010-02-08 2010-08-20 옵토팩 주식회사 전자 소자 패키지 및 그 제조 방법
US8558374B2 (en) 2011-02-08 2013-10-15 Endicott Interconnect Technologies, Inc. Electronic package with thermal interposer and method of making same
EP2541593B1 (de) * 2011-06-30 2019-04-17 Rohm Co., Ltd. Laminierte Lötschicht mit hohem Schmelzpunkt
US8240545B1 (en) * 2011-08-11 2012-08-14 Western Digital (Fremont), Llc Methods for minimizing component shift during soldering
DE102011112476A1 (de) * 2011-09-05 2013-03-07 Epcos Ag Bauelement und Verfahren zum Herstellen eines Bauelements
US20140238726A1 (en) * 2013-02-28 2014-08-28 Cooper Technologies Company External moisture barrier package for circuit board electrical component
EP2992551B1 (de) * 2013-04-29 2017-03-29 ABB Schweiz AG Modulanordnung für leistungshalbleitervorrichtungen
US8912641B1 (en) * 2013-09-09 2014-12-16 Harris Corporation Low profile electronic package and associated methods
JP6499886B2 (ja) * 2015-03-11 2019-04-10 田中貴金属工業株式会社 電子部品封止用キャップ
US10453786B2 (en) * 2016-01-19 2019-10-22 General Electric Company Power electronics package and method of manufacturing thereof
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US11626343B2 (en) * 2018-10-30 2023-04-11 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device with enhanced thermal dissipation and method for making the same
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Also Published As

Publication number Publication date
EP0875932A2 (de) 1998-11-04
TW373276B (en) 1999-11-01
JP2999992B2 (ja) 2000-01-17
DE69832324T2 (de) 2006-07-27
EP0875932B1 (de) 2005-11-16
SG63843A1 (en) 1999-03-30
MY120319A (en) 2005-10-31
US5881945A (en) 1999-03-16
CN1226746A (zh) 1999-08-25
JPH113952A (ja) 1999-01-06
CN1160780C (zh) 2004-08-04
EP0875932A3 (de) 1999-08-04
KR19980079651A (ko) 1998-11-25
KR100294968B1 (ko) 2001-07-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8328 Change in the person/name/address of the agent

Representative=s name: DUSCHER, R., DIPL.-PHYS. DR.RER.NAT., PAT.-ANW., 7