DE69712080D1 - Herstellungsverfahren für eine halbleitervorrichtung - Google Patents

Herstellungsverfahren für eine halbleitervorrichtung

Info

Publication number
DE69712080D1
DE69712080D1 DE69712080T DE69712080T DE69712080D1 DE 69712080 D1 DE69712080 D1 DE 69712080D1 DE 69712080 T DE69712080 T DE 69712080T DE 69712080 T DE69712080 T DE 69712080T DE 69712080 D1 DE69712080 D1 DE 69712080D1
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69712080T
Other languages
English (en)
Other versions
DE69712080T2 (de
Inventor
Takashi Akahori
Shuichi Ishizuka
Shunichi Endo
Takeshi Aoki
Tadashi Hirata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of DE69712080D1 publication Critical patent/DE69712080D1/de
Application granted granted Critical
Publication of DE69712080T2 publication Critical patent/DE69712080T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE69712080T 1996-11-14 1997-11-11 Herstellungsverfahren für eine halbleitervorrichtung Expired - Lifetime DE69712080T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP32091296A JP3400918B2 (ja) 1996-11-14 1996-11-14 半導体装置の製造方法
PCT/JP1997/004099 WO1998021745A1 (fr) 1996-11-14 1997-11-11 Procede de fabrication d'un dispositif semi-conducteur

Publications (2)

Publication Number Publication Date
DE69712080D1 true DE69712080D1 (de) 2002-05-23
DE69712080T2 DE69712080T2 (de) 2002-11-14

Family

ID=18126663

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69712080T Expired - Lifetime DE69712080T2 (de) 1996-11-14 1997-11-11 Herstellungsverfahren für eine halbleitervorrichtung

Country Status (7)

Country Link
US (1) US6727182B2 (de)
EP (1) EP0933802B1 (de)
JP (1) JP3400918B2 (de)
KR (1) KR100563610B1 (de)
DE (1) DE69712080T2 (de)
TW (1) TW349241B (de)
WO (1) WO1998021745A1 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100464384B1 (ko) * 1997-05-31 2005-02-28 삼성전자주식회사 반도체장치의비아홀형성방법
JP3429171B2 (ja) * 1997-11-20 2003-07-22 東京エレクトロン株式会社 プラズマ処理方法及び半導体デバイスの製造方法
KR100407542B1 (ko) * 1999-03-09 2003-11-28 동경 엘렉트론 주식회사 반도체 장치 및 그 제조 방법
JP4260764B2 (ja) * 1999-03-09 2009-04-30 東京エレクトロン株式会社 半導体装置の製造方法
WO2000054328A1 (fr) * 1999-03-09 2000-09-14 Tokyo Electron Limited Systeme de fabrication de dispositif semi-conducteur
US6465159B1 (en) * 1999-06-28 2002-10-15 Lam Research Corporation Method and apparatus for side wall passivation for organic etch
JP3803523B2 (ja) * 1999-12-28 2006-08-02 株式会社東芝 ドライエッチング方法及び半導体装置の製造方法
JP2001274143A (ja) * 2000-03-28 2001-10-05 Tdk Corp ドライエッチング方法、微細加工方法及びドライエッチング用マスク
JP3770790B2 (ja) * 2000-11-15 2006-04-26 シャープ株式会社 アッシング方法
US6835663B2 (en) 2002-06-28 2004-12-28 Infineon Technologies Ag Hardmask of amorphous carbon-hydrogen (a-C:H) layers with tunable etch resistivity
US6865939B2 (en) * 2002-09-16 2005-03-15 Sandia Naitonal Laboratories Fluorinated silica microchannel surfaces
JP4413556B2 (ja) 2003-08-15 2010-02-10 東京エレクトロン株式会社 成膜方法、半導体装置の製造方法
JP2005123406A (ja) * 2003-10-16 2005-05-12 Tokyo Electron Ltd プラズマエッチング方法。
KR100780944B1 (ko) * 2005-10-12 2007-12-03 삼성전자주식회사 탄소함유막 식각 방법 및 이를 이용한 반도체 소자의 제조방법
JP4919871B2 (ja) 2007-02-09 2012-04-18 東京エレクトロン株式会社 エッチング方法、半導体装置の製造方法および記憶媒体
JP5261964B2 (ja) * 2007-04-10 2013-08-14 東京エレクトロン株式会社 半導体装置の製造方法
US7838426B2 (en) 2007-08-20 2010-11-23 Lam Research Corporation Mask trimming

Family Cites Families (31)

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Publication number Priority date Publication date Assignee Title
JPS55107781A (en) 1979-02-13 1980-08-19 Fujitsu Ltd Etching method for metal film
JPS6199332A (ja) 1984-10-19 1986-05-17 Fujitsu Ltd プラズマエツチング方法
JPH0697660B2 (ja) 1985-03-23 1994-11-30 日本電信電話株式会社 薄膜形成方法
JPS6243335A (ja) 1985-08-21 1987-02-25 Arita Seisakusho:Kk 自動車のドアが開く事を表示する装置
JPS63233549A (ja) 1987-03-20 1988-09-29 Nippon Telegr & Teleph Corp <Ntt> 薄膜形成法
JPH033380A (ja) 1989-05-31 1991-01-09 Mitsubishi Electric Corp 気体レーザ装置
JPH04271122A (ja) 1991-02-27 1992-09-28 Fuji Electric Co Ltd プラズマ処理装置
JPH0555575A (ja) * 1991-08-29 1993-03-05 Sharp Corp 半導体装置
JPH05151619A (ja) * 1991-10-01 1993-06-18 Ricoh Co Ltd 光情報記録媒体及び記録方法
US5442237A (en) 1991-10-21 1995-08-15 Motorola Inc. Semiconductor device having a low permittivity dielectric
US5417826A (en) 1992-06-15 1995-05-23 Micron Technology, Inc. Removal of carbon-based polymer residues with ozone, useful in the cleaning of plasma reactors
US5489538A (en) * 1992-08-21 1996-02-06 Lsi Logic Corporation Method of die burn-in
JPH06163479A (ja) 1992-11-17 1994-06-10 Sony Corp ドライエッチング方法
JPH06196421A (ja) 1992-12-23 1994-07-15 Sumitomo Metal Ind Ltd プラズマ装置
JPH06264270A (ja) 1993-03-09 1994-09-20 Citizen Watch Co Ltd 硬質カーボン膜のパターニング方法
US5498657A (en) * 1993-08-27 1996-03-12 Asahi Glass Company Ltd. Fluorine-containing polymer composition
JPH083842A (ja) 1994-06-15 1996-01-09 Toyota Autom Loom Works Ltd 織機のモニタ装置
CA2157257C (en) * 1994-09-12 1999-08-10 Kazuhiko Endo Semiconductor device with amorphous carbon layer and method of fabricating the same
JP2748864B2 (ja) 1994-09-12 1998-05-13 日本電気株式会社 半導体装置及びその製造方法及び非晶質炭素膜の製造方法及びプラズマｃｖｄ装置
JP2748879B2 (ja) 1995-02-23 1998-05-13 日本電気株式会社 フッ素化非晶質炭素膜材料の製造方法
EP0784713A4 (de) 1994-10-11 2000-03-01 Gelest Inc Gleichförmige titanbasisfilme und deren herstellung
WO1996019826A1 (en) 1994-12-20 1996-06-27 National Semiconductor Corporation A method of fabricating integrated circuits using bilayer dielectrics
US5654228A (en) * 1995-03-17 1997-08-05 Motorola VCSEL having a self-aligned heat sink and method of making
US5905517A (en) * 1995-04-12 1999-05-18 Eastman Kodak Company Heater structure and fabrication process for monolithic print heads
US5840455A (en) * 1995-05-24 1998-11-24 Ricoh Company, Ltd. Electrophotographic photoconductor
JP3274324B2 (ja) * 1995-09-01 2002-04-15 株式会社東芝 半導体装置の製造方法
US5733808A (en) * 1996-01-16 1998-03-31 Vanguard International Semiconductor Corporation Method for fabricating a cylindrical capacitor for a semiconductor device
JP2956571B2 (ja) * 1996-03-07 1999-10-04 日本電気株式会社 半導体装置
JP3228183B2 (ja) * 1996-12-02 2001-11-12 日本電気株式会社 絶縁膜ならびにその絶縁膜を有する半導体装置とその製造方法
US5854134A (en) * 1997-05-05 1998-12-29 Taiwan Semiconductor Manufacturing Company Ltd. Passivation layer for a metal film to prevent metal corrosion
US6066893A (en) * 1997-09-24 2000-05-23 Texas Instruments Incorporated Contaminant resistant barriers to prevent outgassing

Also Published As

Publication number Publication date
KR19990077239A (ko) 1999-10-25
EP0933802B1 (de) 2002-04-17
DE69712080T2 (de) 2002-11-14
EP0933802A1 (de) 1999-08-04
TW349241B (en) 1999-01-01
US6727182B2 (en) 2004-04-27
WO1998021745A1 (fr) 1998-05-22
EP0933802A4 (de) 1999-10-27
KR100563610B1 (ko) 2006-06-15
JPH10144676A (ja) 1998-05-29
JP3400918B2 (ja) 2003-04-28
US20010001741A1 (en) 2001-05-24

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