DE69529583D1 - Formbrett und Herstellungsverfahren für eine Halbleiteranordnung - Google Patents

Formbrett und Herstellungsverfahren für eine Halbleiteranordnung

Info

Publication number
DE69529583D1
DE69529583D1 DE69529583T DE69529583T DE69529583D1 DE 69529583 D1 DE69529583 D1 DE 69529583D1 DE 69529583 T DE69529583 T DE 69529583T DE 69529583 T DE69529583 T DE 69529583T DE 69529583 D1 DE69529583 D1 DE 69529583D1
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
mold board
mold
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69529583T
Other languages
English (en)
Other versions
DE69529583T2 (de
Inventor
Fumiaki Kirihata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Publication of DE69529583D1 publication Critical patent/DE69529583D1/de
Application granted granted Critical
Publication of DE69529583T2 publication Critical patent/DE69529583T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67121—Apparatus for making assemblies not otherwise provided for, e.g. package constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
DE69529583T 1994-03-17 1995-03-15 Formbrett und Herstellungsverfahren für eine Halbleiteranordnung Expired - Fee Related DE69529583T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP4625994 1994-03-17
JP02642195A JP3284811B2 (ja) 1994-03-17 1995-02-15 半田接合方法および半導体製造治具と半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69529583D1 true DE69529583D1 (de) 2003-03-20
DE69529583T2 DE69529583T2 (de) 2003-12-11

Family

ID=26364204

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69529583T Expired - Fee Related DE69529583T2 (de) 1994-03-17 1995-03-15 Formbrett und Herstellungsverfahren für eine Halbleiteranordnung

Country Status (4)

Country Link
US (1) US5669546A (de)
EP (1) EP0673060B1 (de)
JP (1) JP3284811B2 (de)
DE (1) DE69529583T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5212295A (en) * 1990-01-11 1993-05-18 Isis Pharmaceuticals Monomers for preparation of oligonucleotides having chiral phosphorus linkages
US6339066B1 (en) 1990-01-11 2002-01-15 Isis Pharmaceuticals, Inc. Antisense oligonucleotides which have phosphorothioate linkages of high chiral purity and which modulate βI, βII, γ, δ, Ε, ζ and η isoforms of human protein kinase C
US5654284A (en) * 1991-10-15 1997-08-05 Isis Pharmaceuticals, Inc. Oligonucleotides for modulating RAF kinase having phosphorothioate linkages of high chiral purity
US5576302A (en) * 1991-10-15 1996-11-19 Isis Pharmaceuticals, Inc. Oligonucleotides for modulating hepatitis C virus having phosphorothioate linkages of high chiral purity
US6537973B1 (en) 1992-03-16 2003-03-25 Isis Pharmaceuticals, Inc. Oligonucleotide inhibition of protein kinase C
JP3018971B2 (ja) * 1995-12-18 2000-03-13 富士電機株式会社 半導体装置
US6703707B1 (en) * 1999-11-24 2004-03-09 Denso Corporation Semiconductor device having radiation structure
US7354659B2 (en) * 2005-03-30 2008-04-08 Reactive Nanotechnologies, Inc. Method for fabricating large dimension bonds using reactive multilayer joining
US9214442B2 (en) * 2007-03-19 2015-12-15 Infineon Technologies Ag Power semiconductor module, method for producing a power semiconductor module, and semiconductor chip
JP2013132643A (ja) * 2011-12-22 2013-07-08 Hitachi Chemical Co Ltd はんだ接着体
RU2636034C1 (ru) * 2016-05-25 2017-11-20 Акционерное общество "Научно-производственное предприятие "Пульсар" Способ пайки кристаллов дискретных полупроводниковых приборов к корпусу
CN108216330B (zh) * 2018-01-19 2019-06-11 河海大学 一种水利灌溉用闸门传送装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2487579A1 (fr) * 1980-07-24 1982-01-29 Silicium Semiconducteur Ssc Procede d'assemblage de diodes semiconductrices et dispositif de mise en oeuvre de ce procede
JPS61123163A (ja) * 1984-11-19 1986-06-11 Mitsubishi Electric Corp ダブル・ヒ−トシンク・ダイオ−ドの製造方法
US4892245A (en) * 1988-11-21 1990-01-09 Honeywell Inc. Controlled compression furnace bonding
US5261157A (en) * 1991-01-22 1993-11-16 Olin Corporation Assembly of electronic packages by vacuum lamination
EP0499707B1 (de) * 1991-02-22 1996-04-03 Asea Brown Boveri Ag Abschaltbares Hochleistungs-Halbleiterbauelement

Also Published As

Publication number Publication date
EP0673060A1 (de) 1995-09-20
DE69529583T2 (de) 2003-12-11
US5669546A (en) 1997-09-23
EP0673060B1 (de) 2003-02-12
JPH07307354A (ja) 1995-11-21
JP3284811B2 (ja) 2002-05-20

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee