WO1998021745A1 - Procede de fabrication d'un dispositif semi-conducteur - Google Patents
Procede de fabrication d'un dispositif semi-conducteur Download PDFInfo
- Publication number
- WO1998021745A1 WO1998021745A1 PCT/JP1997/004099 JP9704099W WO9821745A1 WO 1998021745 A1 WO1998021745 A1 WO 1998021745A1 JP 9704099 W JP9704099 W JP 9704099W WO 9821745 A1 WO9821745 A1 WO 9821745A1
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- Prior art keywords
- film
- etching
- fluorine
- plasma
- forming
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 34
- 230000008569 process Effects 0.000 title claims abstract description 12
- 239000004065 semiconductor Substances 0.000 title claims abstract description 12
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 8
- 238000005530 etching Methods 0.000 claims abstract description 58
- 239000012212 insulator Substances 0.000 claims abstract 3
- 239000007789 gas Substances 0.000 claims description 41
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 28
- 229910052799 carbon Inorganic materials 0.000 claims description 28
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 13
- 239000001301 oxygen Substances 0.000 claims description 13
- 229910052760 oxygen Inorganic materials 0.000 claims description 13
- 229910052751 metal Inorganic materials 0.000 claims description 10
- 239000002184 metal Substances 0.000 claims description 10
- 230000001681 protective effect Effects 0.000 claims description 9
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 8
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 6
- 229910000077 silane Inorganic materials 0.000 claims description 6
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 4
- 229910052786 argon Inorganic materials 0.000 claims description 2
- 150000001875 compounds Chemical class 0.000 claims description 2
- 239000011229 interlayer Substances 0.000 abstract description 17
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 abstract description 14
- 229910052782 aluminium Inorganic materials 0.000 abstract description 12
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 12
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 3
- 230000009471 action Effects 0.000 abstract description 2
- 230000008021 deposition Effects 0.000 abstract 2
- 229910015844 BCl3 Inorganic materials 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- TXEYQDLBPFQVAA-UHFFFAOYSA-N tetrafluoromethane Chemical compound FC(F)(F)F TXEYQDLBPFQVAA-UHFFFAOYSA-N 0.000 abstract 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
- 239000010408 film Substances 0.000 description 158
- 239000010410 layer Substances 0.000 description 21
- 238000010586 diagram Methods 0.000 description 6
- 239000000463 material Substances 0.000 description 5
- 229910052721 tungsten Inorganic materials 0.000 description 5
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 4
- 239000010937 tungsten Substances 0.000 description 4
- -1 azide compounds Chemical class 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000005380 borophosphosilicate glass Substances 0.000 description 2
- 230000003993 interaction Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 239000012528 membrane Substances 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 241000282693 Cercopithecidae Species 0.000 description 1
- CERQOIWHTDAKMF-UHFFFAOYSA-N Methacrylic acid Chemical class CC(=C)C(O)=O CERQOIWHTDAKMF-UHFFFAOYSA-N 0.000 description 1
- 229920001665 Poly-4-vinylphenol Polymers 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910020177 SiOF Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910008599 TiW Inorganic materials 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 238000010504 bond cleavage reaction Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000011049 filling Methods 0.000 description 1
- 238000004334 fluoridation Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000002156 mixing Methods 0.000 description 1
- 229920003986 novolac Polymers 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 238000007517 polishing process Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 229920005990 polystyrene resin Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 238000005546 reactive sputtering Methods 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 230000008961 swelling Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31144—Etching the insulating layers by chemical or physical means using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/5329—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Definitions
- the present invention relates to a method for manufacturing a semiconductor device using a fluorine-added carbon film.
- a typical example of this interlayer insulating film is the strength of the SiO 2 film.
- S I_ ⁇ 2 is 4 relative dielectric constant of approximately, which are forces poured into discovering less material than.
- the realization power of the Si OF having a relative dielectric constant of 3.5 is being advanced, and the present inventor is focusing on a fluorine-added carbon film having a lower relative dielectric constant. .
- the present invention has been made in view of the problems relating to the etching process, among which the etching of a fluorine-added carbon film can be performed, and the practical use of an interlayer insulating film using a fluorine-added carbon film has been made. Its primary purpose.
- an insulating film made of a fluorine-added carbon film is formed on an object to be processed: E and
- the present invention specifically includes, for example, the following steps.
- the resist film remains on the insulating film at the time when a predetermined concave force is formed in the insulating film by etching.
- the etching rate of the fluorine-added carbon film by oxygen plasma and the etching rate of the resist film are well aligned.
- the second invention of the present application includes a step of forming an insulating film made of a fluorine-added carbon film on the object to be processed,
- a step of forming a pattern on the insulating film by a resist film and thereafter, a process gas containing an oxygen plasma generation gas and a silane-based compound gas is formed into a plasma, and the plasma is used to etch the fluorine-added carbon film to form a resist film. And a step of removing.
- the third invention of the present application includes a step of forming an insulating film made of a fluorine-added carbon film on the object to be processed,
- the protective film may be, for example, an insulating film or a conductive film.
- the fourth invention of the present application is a step of forming an insulating film made of a fluorine-added carbon film on the object to be processed,
- FIG. 1 is an explanatory view showing a part of a semiconductor device manufactured by the method of the present invention.
- FIG. 2 is an explanatory diagram showing an embodiment of the method of the present invention.
- FIG. 3 is an explanatory view showing another embodiment of the method of the present invention.
- FIG. 4 is an explanatory diagram of a method compared with the method of the present invention.
- FIG. 5 is a vertical side view showing an example of a plasma processing apparatus for carrying out the method of the present invention.
- FIG. 6 is an explanatory diagram showing still another embodiment of the present invention.
- FIG. 7 is an explanatory diagram showing still another embodiment of the present invention.
- FIG. 8 is a characteristic diagram showing the etching characteristics of the CF film.
- the embodiment of the present invention is characterized by a step of etching a fluorine-added carbon film (hereinafter referred to as a “CF film”).
- CF film fluorine-added carbon film
- IS ⁇ l5 made of, for example, aluminum is formed in multiple layers, and upper and lower 12 ⁇ 15, 15 (not shown) are embedded in via holes formed in the interlayer insulating film 16. For example, they are connected to each other by a conductive layer 17 made of W.
- FIG. 2 (a) shows a state in which, for example, an n-th layer aluminum wiring is formed.
- a first-layer interlayer insulating film made of a CF film is formed on the insulating film 14.
- the membrane is formed with 16 forces.
- the CF film is formed by plasma CVD (Chemical
- Vapor deposition method can be used to form a film.
- a film is formed to a thickness of, for example, 0.7 zm by using an ECR (Electron Cyclotron Resonance) plasma processing apparatus 3 which will be described later as an etching apparatus.
- ECR Electro Cyclotron Resonance
- a resist film 18 is formed on the surface of the CF film (interlayer insulating film 16) with a predetermined pattern.
- the resist film 18 is, for example, a spin coater. It is formed by applying a resist solution to the wafer surface by the coating method, exposing and developing. Organic materials such as azide compounds, polyvinylphenols, methacrylic acid compounds, novolak resins, and polystyrene resins are used as resist materials.
- the wafer surface is irradiated with O 2 plasma (oxygen plasma) to etch the CF film.
- O 2 plasma oxygen plasma
- 0 9 active species with scattered becomes C one F bonds and C one C bond cleavage to CO or C_ ⁇ 2, is also such as F 2 for F Scatter. It will be chemically etched CF film by 0 2 plasma thus.
- resist film 1 8 would be also removed by I ⁇ etched by O n plasma for an organic material. Therefore, the etching of the CF film and the removal of the resist film 18 by etching proceed simultaneously, but before the entire resist film 18 is removed by etching, the etching from the CF film surface to the aluminum wiring 15 is completed.
- a planned via hole 19 is formed as shown in FIG. 2 (d).
- the thickness of the resist film 18 may be set by previously grasping the removal speed of the resist film 18 by etching and the etching speed of the CF film.
- the removal speed of the resist film 18 by etching is the same as the etching speed of the CF film, the surface strength of the CF film is flattened. Generally, after the resist film 18 is removed, the surface of the interlayer insulating film is flattened by CMP or the like; a ftt-like polishing process is performed. There is an advantage that it becomes. If the etching speed of the resist film is different from the etching speed of the CF film, make sure that the resist film 18 is not completely removed before the intended hole force is formed (before the aluminum surface is etched). Power is desirable.
- the resist film 18 remains when the hole is formed, then the resist film 18
- the etching end point for example, by detecting based on the change in CO and C_ ⁇ 2 emission amount, it can be removed and the formation of holes in the resist film without varying the thickness of the CF film.
- FIG. Figure 3 is a diagram showing a state of such etching, the side wall of the hole 1 9 at the same time as etching, S I_ ⁇ by reaction with S i H 4 and ⁇ 2.
- a protective film 19a is formed, and etching of the side wall is suppressed.
- the method of the present invention can be carried out, for example, by a plasma processing apparatus shown in FIG.
- This apparatus has a vacuum vessel 2 made of aluminum or the like, and this vacuum vessel 2 is connected to a cylindrical plasma chamber 21 located above and generating plasma, and to a lower part thereof. And a cylindrical processing chamber 22 having a larger diameter than the plasma chamber 21.
- the vacuum vessel 2 is grounded and is at a zero-potential.
- the upper end of the vacuum vessel 2 is provided with a transparent window 23 made of a material such as quartz, which is opened and allows microwaves to pass therethrough. Is to be maintained.
- a high-frequency power supply section 24 as a high-frequency supply means for generating plasma of 2.45 GHz is connected.
- the microwave M generated in the high-frequency power supply 24 is guided by the waveguide 25 and introduced into the plasma chamber 21 from the transmission window 23. It has become.
- a plasma gas nozzle 26 is arranged on the side wall of the plasma chamber 21 evenly along the circumferential direction thereof.
- a ring-shaped main electromagnetic coil 27 is arranged as a magnetic field forming means in close proximity to the outer periphery of the side wall that partitions the plasma chamber 21, and at the lower side of the film forming chamber 22.
- a ring-shaped auxiliary electromagnetic coil 28 is arranged to form a magnetic field B extending from the top to the bottom, for example, 875 gauss, from the plasma chamber 21 to the processing chamber 22. ECR plasma conditions are satisfied. Note that a permanent magnet may be used instead of the electromagnetic coil.
- this device constitutes an electron cyclotron resonance (ECR) plasma treatment.
- the mounting table 3 includes a ceramic body 33 having a built-in heater 32 provided on a main body 31 made of, for example, aluminum, and the mounting surface is configured as an electrostatic chuck. Further, for example, a high-frequency power supply unit 34 is connected to the main body 31 of the mounting table 3 so as to apply a bias voltage for drawing ions into the wafer W. The bias voltage electrode is also used, for example, as the electrode of the electrostatic chuck. An exhaust pipe 35 is connected to the bottom of the vacuum vessel 2.
- Reference numeral 30 denotes a ring-shaped film-forming gas supply unit used for performing processing.
- a gate valve (not shown) provided on the side wall of the vacuum vessel 2 is opened, and the wafer 10 is loaded by a load arm (not shown) by a transfer arm (not shown). It is carried from the work room and placed on the mounting table 3.
- the 0 2 gas from the plasma gas nozzles 26 into the bra Zuma chamber 21 introduced
- a silane-based gas such as SiH 4 gas is introduced from the gas supply unit 30.
- the inside of the vacuum vessel 2 is maintained at a predetermined process pressure, and a 13.56 MHz bias voltage is applied to the mounting table 3 by the high frequency power supply unit 34.
- the 2.45 GHz high frequency (microwave) from the high frequency power supply 24 for plasma generation is transported through the waveguide 25 and reaches the ceiling of the vacuum vessel 2, passes through the transmission window 23 here, and passes through the microwave.
- M is introduced into the plasma chamber 21.
- a magnetic field B generated by the electromagnetic coils 27 and 28 is applied from above to below with a strength of, for example, 875 gauss.
- the interaction between the magnetic field B and the microphone mouth wave M causes occurs electron cyclotron resonance to induce E (electric field) XB (magnetic field), ⁇ 2 gas by this resonance is plasma, is and densified.
- the plasma flow that has flowed into the processing chamber 22 from the plasma generation chamber 21 is drawn into the wafer 10 by the bias voltage, and the etching of the surface of the wafer 10 is performed.
- C 4 F 8 gas and C are used as a film forming gas
- an Ar gas is used as a plasma gas to form a CF film on the wafer 10
- an azide compound-based resist film is used to form a CF film on the CF film.
- a pattern formed was prepared.
- ⁇ 2 gas was supplied at a flow rate of l OO sc cm from the plasma gas nozzles 26, the width 0. 3 m, ho Asupeku Ratio 1 one
- the resist film could be etched at the same time.
- the process pressure was set to 0.2 Pa
- the microwave power to 2500 W
- the bias power to 1500 W
- the surface temperature of the mounting table 3 to 270 ° C.
- the film 41 is formed.
- the TiN film 41 has, for example, Ti as an overnight get, and Ar gas and N. Monkey in be formed by reactive sputtering using a gas 0
- a mask is formed on the surface of the TiN film 41 with a resist film 42 (FIG. 6B).
- the swelling of the CF film is omitted.
- Etchingu to T i N film 4 1 to the surface of FIG. 6 BC for example, as shown in (c) 1 eta CF film Due to the 4 plasma gas after it. This etching can be performed by, for example, a plasma processing apparatus. Thereafter, when the wafer surface is irradiated with 2 plasma, the CF film 4 is etched, and the resist film 42 is also removed by etching (FIG. 6 (d)).
- the TiN film 41 serves as a mask. Only the area of the CF film corresponding to the turn is etched, and the expected via hole and through hole can be formed (Fig. 7 (a)).
- CF film ends rather etching power of Aruminiumu E ⁇ surface exposed 0 2 instead switch to A r gas from the gas, by sputtering evening etching with A r ions to remove oxides of aluminum 13 ⁇ 4 Izumi surface (FIG. 7 (b)).
- the holes are filled with a metal 43 such as tungsten (W) to form a connection layer and, for example, a second layer ⁇ 3 ⁇ 4 is formed (FIG. 7 (c)).
- the filling of holes and the formation of hot springs may be performed by sputtering using aluminum.
- the TiN film 41 functions as a so-called hard mask. Because, even if both of the resist film and the CF film is not resistant against 0 2 plasma, it is possible to perform the etching of the CF film. Since the resist film 4 2 is removed during the etching of the CF film, the resist film 4 2 removing process is not required by the 0 2 Atsushingu enough 3 ⁇ 4 ⁇ . In forming a tungsten layer or an aluminum layer on the CF film, the TiN film 41 plays a role of an adhesion layer for directly adhering the metal layer and the CF film. There is no need to remove it. Unnecessary portions of the TiN film 41 can be removed at the same time when 1 ⁇ is formed, that is, when the metal layer is etched.
- an adhesion layer is originally required, and since it has been conventionally used with a high TiN strength, the method of using iN as a hard mask simultaneously includes the adhesion layer. This is an effective method because it is formed. Further, since TiN is a conductive layer, it can be regarded as a part of the interlayer insulating film instead of being included, so that an increase in the relative dielectric constant of the interlayer film can be suppressed. Furthermore, even if the aluminum is disconnected, a conductive path is secured by the TiN film underlying the wiring, so that a malfunction of the device can be prevented. As the conductive film, other than TiN, A1, W, Ti, TiW, TiWN, polysilicon, or the like can be used.
- an insulating film may be used instead of the conductive film as the hard mask.
- the material of the insulating film for example, Si ⁇ ⁇ Q , SiOF, or Si can be used.
- the step of etching the film is, for example, as follows. The insulating film is etched by fluorine radicals using CF 4 gas.
- the hard mask Since the hard mask becomes " ⁇ " of the interlayer insulating film, the hard mask may be left as it is and subjected to the next step, for example, a step of embedding aluminum and tungsten. However, for example, the entire insulating film is etched by an HF solution by wet etching.
- an insulating film When an insulating film is used as a hard mask, its thickness is, for example, 100 ⁇ or more. If it is left in the device, it will function as a hard mask, but if it is too thick, the total relative dielectric constant of the interlayer insulating film, including this insulating film, will increase. It is considered that the thickness of the film is preferably about 13 or less.
- pattern etching of a CF film can be performed, and for example, an interlayer insulating film using a CF film can be put to practical use.
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- Physics & Mathematics (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Plasma & Fusion (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP97911513A EP0933802B1 (en) | 1996-11-14 | 1997-11-11 | Process for the production of semiconductor device |
DE69712080T DE69712080T2 (de) | 1996-11-14 | 1997-11-11 | Herstellungsverfahren für eine halbleitervorrichtung |
US09/101,308 US6727182B2 (en) | 1996-11-14 | 1997-11-11 | Process for the production of semiconductor device |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP32091296A JP3400918B2 (ja) | 1996-11-14 | 1996-11-14 | 半導体装置の製造方法 |
JP8/320912 | 1996-11-14 |
Publications (1)
Publication Number | Publication Date |
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WO1998021745A1 true WO1998021745A1 (fr) | 1998-05-22 |
Family
ID=18126663
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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PCT/JP1997/004099 WO1998021745A1 (fr) | 1996-11-14 | 1997-11-11 | Procede de fabrication d'un dispositif semi-conducteur |
Country Status (7)
Country | Link |
---|---|
US (1) | US6727182B2 (ja) |
EP (1) | EP0933802B1 (ja) |
JP (1) | JP3400918B2 (ja) |
KR (1) | KR100563610B1 (ja) |
DE (1) | DE69712080T2 (ja) |
TW (1) | TW349241B (ja) |
WO (1) | WO1998021745A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000054328A1 (fr) * | 1999-03-09 | 2000-09-14 | Tokyo Electron Limited | Systeme de fabrication de dispositif semi-conducteur |
WO2000054329A1 (fr) * | 1999-03-09 | 2000-09-14 | Tokyo Electron Limited | Dispositif semi-conducteur et procede de fabrication correspondant |
US8383519B2 (en) | 2007-02-09 | 2013-02-26 | Tokyo Electron Limited | Etching method and recording medium |
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KR100464384B1 (ko) * | 1997-05-31 | 2005-02-28 | 삼성전자주식회사 | 반도체장치의비아홀형성방법 |
JP3429171B2 (ja) * | 1997-11-20 | 2003-07-22 | 東京エレクトロン株式会社 | プラズマ処理方法及び半導体デバイスの製造方法 |
JP4260764B2 (ja) * | 1999-03-09 | 2009-04-30 | 東京エレクトロン株式会社 | 半導体装置の製造方法 |
US6465159B1 (en) * | 1999-06-28 | 2002-10-15 | Lam Research Corporation | Method and apparatus for side wall passivation for organic etch |
JP3803523B2 (ja) * | 1999-12-28 | 2006-08-02 | 株式会社東芝 | ドライエッチング方法及び半導体装置の製造方法 |
JP2001274143A (ja) * | 2000-03-28 | 2001-10-05 | Tdk Corp | ドライエッチング方法、微細加工方法及びドライエッチング用マスク |
JP3770790B2 (ja) * | 2000-11-15 | 2006-04-26 | シャープ株式会社 | アッシング方法 |
US6835663B2 (en) | 2002-06-28 | 2004-12-28 | Infineon Technologies Ag | Hardmask of amorphous carbon-hydrogen (a-C:H) layers with tunable etch resistivity |
US6865939B2 (en) * | 2002-09-16 | 2005-03-15 | Sandia Naitonal Laboratories | Fluorinated silica microchannel surfaces |
JP4413556B2 (ja) | 2003-08-15 | 2010-02-10 | 東京エレクトロン株式会社 | 成膜方法、半導体装置の製造方法 |
JP2005123406A (ja) * | 2003-10-16 | 2005-05-12 | Tokyo Electron Ltd | プラズマエッチング方法。 |
KR100780944B1 (ko) * | 2005-10-12 | 2007-12-03 | 삼성전자주식회사 | 탄소함유막 식각 방법 및 이를 이용한 반도체 소자의 제조방법 |
JP5261964B2 (ja) * | 2007-04-10 | 2013-08-14 | 東京エレクトロン株式会社 | 半導体装置の製造方法 |
US7838426B2 (en) | 2007-08-20 | 2010-11-23 | Lam Research Corporation | Mask trimming |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55107781A (en) * | 1979-02-13 | 1980-08-19 | Fujitsu Ltd | Etching method for metal film |
JPH0653193A (ja) * | 1992-06-15 | 1994-02-25 | Micron Technol Inc | プラズマ反応容器のクリーニングに有用なオゾンを用いた炭素系ポリマー残留物の除去 |
JPH06163479A (ja) * | 1992-11-17 | 1994-06-10 | Sony Corp | ドライエッチング方法 |
JPH06264270A (ja) * | 1993-03-09 | 1994-09-20 | Citizen Watch Co Ltd | 硬質カーボン膜のパターニング方法 |
JPH0883842A (ja) * | 1994-09-12 | 1996-03-26 | Nec Corp | 半導体装置 |
JPH08236517A (ja) * | 1995-02-23 | 1996-09-13 | Nec Corp | フッ素化非晶質炭素膜材料およびその製造方法および半導体装置 |
Family Cites Families (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6199332A (ja) | 1984-10-19 | 1986-05-17 | Fujitsu Ltd | プラズマエツチング方法 |
JPH0697660B2 (ja) | 1985-03-23 | 1994-11-30 | 日本電信電話株式会社 | 薄膜形成方法 |
JPS6243335A (ja) | 1985-08-21 | 1987-02-25 | Arita Seisakusho:Kk | 自動車のドアが開く事を表示する装置 |
JPS63233549A (ja) | 1987-03-20 | 1988-09-29 | Nippon Telegr & Teleph Corp <Ntt> | 薄膜形成法 |
JPH033380A (ja) | 1989-05-31 | 1991-01-09 | Mitsubishi Electric Corp | 気体レーザ装置 |
JPH04271122A (ja) | 1991-02-27 | 1992-09-28 | Fuji Electric Co Ltd | プラズマ処理装置 |
JPH0555575A (ja) * | 1991-08-29 | 1993-03-05 | Sharp Corp | 半導体装置 |
JPH05151619A (ja) * | 1991-10-01 | 1993-06-18 | Ricoh Co Ltd | 光情報記録媒体及び記録方法 |
US5442237A (en) * | 1991-10-21 | 1995-08-15 | Motorola Inc. | Semiconductor device having a low permittivity dielectric |
US5489538A (en) * | 1992-08-21 | 1996-02-06 | Lsi Logic Corporation | Method of die burn-in |
JPH06196421A (ja) | 1992-12-23 | 1994-07-15 | Sumitomo Metal Ind Ltd | プラズマ装置 |
US5498657A (en) * | 1993-08-27 | 1996-03-12 | Asahi Glass Company Ltd. | Fluorine-containing polymer composition |
JPH083842A (ja) | 1994-06-15 | 1996-01-09 | Toyota Autom Loom Works Ltd | 織機のモニタ装置 |
CA2157257C (en) * | 1994-09-12 | 1999-08-10 | Kazuhiko Endo | Semiconductor device with amorphous carbon layer and method of fabricating the same |
EP0784713A4 (en) | 1994-10-11 | 2000-03-01 | Gelest Inc | TITANIUM BASED CONFORMING LAYERS AND PREPARATION METHOD |
WO1996019826A1 (en) * | 1994-12-20 | 1996-06-27 | National Semiconductor Corporation | A method of fabricating integrated circuits using bilayer dielectrics |
US5654228A (en) * | 1995-03-17 | 1997-08-05 | Motorola | VCSEL having a self-aligned heat sink and method of making |
US5905517A (en) * | 1995-04-12 | 1999-05-18 | Eastman Kodak Company | Heater structure and fabrication process for monolithic print heads |
US5840455A (en) * | 1995-05-24 | 1998-11-24 | Ricoh Company, Ltd. | Electrophotographic photoconductor |
JP3274324B2 (ja) * | 1995-09-01 | 2002-04-15 | 株式会社東芝 | 半導体装置の製造方法 |
US5733808A (en) * | 1996-01-16 | 1998-03-31 | Vanguard International Semiconductor Corporation | Method for fabricating a cylindrical capacitor for a semiconductor device |
JP2956571B2 (ja) * | 1996-03-07 | 1999-10-04 | 日本電気株式会社 | 半導体装置 |
JP3228183B2 (ja) * | 1996-12-02 | 2001-11-12 | 日本電気株式会社 | 絶縁膜ならびにその絶縁膜を有する半導体装置とその製造方法 |
US5854134A (en) * | 1997-05-05 | 1998-12-29 | Taiwan Semiconductor Manufacturing Company Ltd. | Passivation layer for a metal film to prevent metal corrosion |
US6066893A (en) * | 1997-09-24 | 2000-05-23 | Texas Instruments Incorporated | Contaminant resistant barriers to prevent outgassing |
-
1996
- 1996-11-14 JP JP32091296A patent/JP3400918B2/ja not_active Expired - Fee Related
-
1997
- 1997-11-11 DE DE69712080T patent/DE69712080T2/de not_active Expired - Lifetime
- 1997-11-11 KR KR1019980705381A patent/KR100563610B1/ko not_active IP Right Cessation
- 1997-11-11 WO PCT/JP1997/004099 patent/WO1998021745A1/ja active IP Right Grant
- 1997-11-11 US US09/101,308 patent/US6727182B2/en not_active Expired - Fee Related
- 1997-11-11 EP EP97911513A patent/EP0933802B1/en not_active Expired - Lifetime
- 1997-11-13 TW TW086116927A patent/TW349241B/zh not_active IP Right Cessation
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS55107781A (en) * | 1979-02-13 | 1980-08-19 | Fujitsu Ltd | Etching method for metal film |
JPH0653193A (ja) * | 1992-06-15 | 1994-02-25 | Micron Technol Inc | プラズマ反応容器のクリーニングに有用なオゾンを用いた炭素系ポリマー残留物の除去 |
JPH06163479A (ja) * | 1992-11-17 | 1994-06-10 | Sony Corp | ドライエッチング方法 |
JPH06264270A (ja) * | 1993-03-09 | 1994-09-20 | Citizen Watch Co Ltd | 硬質カーボン膜のパターニング方法 |
JPH0883842A (ja) * | 1994-09-12 | 1996-03-26 | Nec Corp | 半導体装置 |
JPH08236517A (ja) * | 1995-02-23 | 1996-09-13 | Nec Corp | フッ素化非晶質炭素膜材料およびその製造方法および半導体装置 |
Non-Patent Citations (2)
Title |
---|
See also references of EP0933802A4 * |
SENSORS AND ACTUATORS A, Vol. 41, No. 1/3, 1994, "Applications of Fluorocarbon Polymers in Micromechanics and Micromachining", pp. 136-140. * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2000054328A1 (fr) * | 1999-03-09 | 2000-09-14 | Tokyo Electron Limited | Systeme de fabrication de dispositif semi-conducteur |
WO2000054329A1 (fr) * | 1999-03-09 | 2000-09-14 | Tokyo Electron Limited | Dispositif semi-conducteur et procede de fabrication correspondant |
US8383519B2 (en) | 2007-02-09 | 2013-02-26 | Tokyo Electron Limited | Etching method and recording medium |
Also Published As
Publication number | Publication date |
---|---|
EP0933802A4 (en) | 1999-10-27 |
KR100563610B1 (ko) | 2006-06-15 |
JP3400918B2 (ja) | 2003-04-28 |
US20010001741A1 (en) | 2001-05-24 |
TW349241B (en) | 1999-01-01 |
DE69712080D1 (de) | 2002-05-23 |
EP0933802A1 (en) | 1999-08-04 |
DE69712080T2 (de) | 2002-11-14 |
EP0933802B1 (en) | 2002-04-17 |
US6727182B2 (en) | 2004-04-27 |
JPH10144676A (ja) | 1998-05-29 |
KR19990077239A (ko) | 1999-10-25 |
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