DE69522195T2 - Herstellungsverfahren für Halbleiteranordnungen - Google Patents

Herstellungsverfahren für Halbleiteranordnungen

Info

Publication number
DE69522195T2
DE69522195T2 DE69522195T DE69522195T DE69522195T2 DE 69522195 T2 DE69522195 T2 DE 69522195T2 DE 69522195 T DE69522195 T DE 69522195T DE 69522195 T DE69522195 T DE 69522195T DE 69522195 T2 DE69522195 T2 DE 69522195T2
Authority
DE
Germany
Prior art keywords
manufacturing process
semiconductor devices
semiconductor
devices
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69522195T
Other languages
English (en)
Other versions
DE69522195D1 (de
Inventor
Kazuyuki Yahiro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69522195D1 publication Critical patent/DE69522195D1/de
Publication of DE69522195T2 publication Critical patent/DE69522195T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
    • H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour
    • H01L21/31608—Deposition of SiO2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31604—Deposition from a gas or vapour
    • H01L21/31608—Deposition of SiO2
    • H01L21/31612—Deposition of SiO2 on a silicon body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76822—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc.
    • H01L21/76828—Modification of the material of dielectric layers, e.g. grading, after-treatment to improve the stability of the layers, to increase their density etc. thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/902—Capping layer
DE69522195T 1994-12-26 1995-12-21 Herstellungsverfahren für Halbleiteranordnungen Expired - Lifetime DE69522195T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6322950A JPH08181276A (ja) 1994-12-26 1994-12-26 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69522195D1 DE69522195D1 (de) 2001-09-20
DE69522195T2 true DE69522195T2 (de) 2002-04-18

Family

ID=18149458

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69522195T Expired - Lifetime DE69522195T2 (de) 1994-12-26 1995-12-21 Herstellungsverfahren für Halbleiteranordnungen

Country Status (8)

Country Link
US (2) US5683940A (de)
EP (1) EP0720212B1 (de)
JP (1) JPH08181276A (de)
KR (1) KR0184378B1 (de)
CN (1) CN1082721C (de)
DE (1) DE69522195T2 (de)
SG (1) SG42823A1 (de)
TW (1) TW312817B (de)

Families Citing this family (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH08181276A (ja) * 1994-12-26 1996-07-12 Toshiba Corp 半導体装置の製造方法
JP3522917B2 (ja) * 1995-10-03 2004-04-26 株式会社東芝 半導体装置の製造方法および半導体製造装置
EP0820095A3 (de) * 1996-07-19 1999-01-27 Sony Corporation Herstellungsverfahren für eine Zwischenschicht
KR100213439B1 (ko) * 1996-10-24 1999-08-02 윤종용 더미 웨이퍼를 사용하지 않는 웨이퍼상에 막형성 방법
JP3123449B2 (ja) * 1996-11-01 2001-01-09 ヤマハ株式会社 多層配線形成法
KR100256823B1 (ko) * 1997-06-30 2000-05-15 김영환 반도체소자의 보호막 형성방법
JPH1126449A (ja) * 1997-06-30 1999-01-29 Sony Corp 絶縁膜の成膜方法
US6627532B1 (en) * 1998-02-11 2003-09-30 Applied Materials, Inc. Method of decreasing the K value in SiOC layer deposited by chemical vapor deposition
US6340435B1 (en) 1998-02-11 2002-01-22 Applied Materials, Inc. Integrated low K dielectrics and etch stops
US6593247B1 (en) * 1998-02-11 2003-07-15 Applied Materials, Inc. Method of depositing low k films using an oxidizing plasma
US6413583B1 (en) 1998-02-11 2002-07-02 Applied Materials, Inc. Formation of a liquid-like silica layer by reaction of an organosilicon compound and a hydroxyl forming compound
US6287990B1 (en) 1998-02-11 2001-09-11 Applied Materials, Inc. CVD plasma assisted low dielectric constant films
US6054379A (en) * 1998-02-11 2000-04-25 Applied Materials, Inc. Method of depositing a low k dielectric with organo silane
US6303523B2 (en) 1998-02-11 2001-10-16 Applied Materials, Inc. Plasma processes for depositing low dielectric constant films
US6660656B2 (en) 1998-02-11 2003-12-09 Applied Materials Inc. Plasma processes for depositing low dielectric constant films
US6159871A (en) 1998-05-29 2000-12-12 Dow Corning Corporation Method for producing hydrogenated silicon oxycarbide films having low dielectric constant
US6667553B2 (en) 1998-05-29 2003-12-23 Dow Corning Corporation H:SiOC coated substrates
US6148761A (en) * 1998-06-16 2000-11-21 Applied Materials, Inc. Dual channel gas distribution plate
US6800571B2 (en) * 1998-09-29 2004-10-05 Applied Materials Inc. CVD plasma assisted low dielectric constant films
US6399489B1 (en) 1999-11-01 2002-06-04 Applied Materials, Inc. Barrier layer deposition using HDP-CVD
US6451390B1 (en) * 2000-04-06 2002-09-17 Applied Materials, Inc. Deposition of TEOS oxide using pulsed RF plasma
US6531398B1 (en) 2000-10-30 2003-03-11 Applied Materials, Inc. Method of depositing organosillicate layers
US6709721B2 (en) 2001-03-28 2004-03-23 Applied Materials Inc. Purge heater design and process development for the improvement of low k film properties
US6486082B1 (en) * 2001-06-18 2002-11-26 Applied Materials, Inc. CVD plasma assisted lower dielectric constant sicoh film
GB0118417D0 (en) * 2001-07-28 2001-09-19 Trikon Holdings Ltd A method of depositing a dielectric film
US6926926B2 (en) * 2001-09-10 2005-08-09 Applied Materials, Inc. Silicon carbide deposited by high density plasma chemical-vapor deposition with bias
US6936309B2 (en) * 2002-04-02 2005-08-30 Applied Materials, Inc. Hardness improvement of silicon carboxy films
US20030194496A1 (en) * 2002-04-11 2003-10-16 Applied Materials, Inc. Methods for depositing dielectric material
US20030194495A1 (en) * 2002-04-11 2003-10-16 Applied Materials, Inc. Crosslink cyclo-siloxane compound with linear bridging group to form ultra low k dielectric
US20030211244A1 (en) * 2002-04-11 2003-11-13 Applied Materials, Inc. Reacting an organosilicon compound with an oxidizing gas to form an ultra low k dielectric
US6815373B2 (en) * 2002-04-16 2004-11-09 Applied Materials Inc. Use of cyclic siloxanes for hardness improvement of low k dielectric films
KR20030095630A (ko) * 2002-06-12 2003-12-24 삼성전자주식회사 매립 특성이 우수한 실리콘 산화물 형성 방법
US6927178B2 (en) 2002-07-11 2005-08-09 Applied Materials, Inc. Nitrogen-free dielectric anti-reflective coating and hardmask
US7105460B2 (en) * 2002-07-11 2006-09-12 Applied Materials Nitrogen-free dielectric anti-reflective coating and hardmask
US6897163B2 (en) * 2003-01-31 2005-05-24 Applied Materials, Inc. Method for depositing a low dielectric constant film
US20050003659A1 (en) * 2003-07-03 2005-01-06 Tower Semiconductor Ltd. Transparent inter-metal dielectric stack for CMOS image sensors
US7288205B2 (en) 2004-07-09 2007-10-30 Applied Materials, Inc. Hermetic low dielectric constant layer for barrier applications
US20060021703A1 (en) * 2004-07-29 2006-02-02 Applied Materials, Inc. Dual gas faceplate for a showerhead in a semiconductor wafer processing system
CN106118636A (zh) * 2016-06-27 2016-11-16 高大元 一种荧光氧化硅纳米颗粒的制备方法

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Publication number Priority date Publication date Assignee Title
US5190792A (en) * 1989-09-27 1993-03-02 International Business Machines Corporation High-throughput, low-temperature process for depositing oxides
US5314724A (en) * 1991-01-08 1994-05-24 Fujitsu Limited Process for forming silicon oxide film
US5874367A (en) * 1992-07-04 1999-02-23 Trikon Technologies Limited Method of treating a semi-conductor wafer
JPH08181210A (ja) * 1994-12-26 1996-07-12 Toshiba Corp 半導体装置の製造方法
JPH08181276A (ja) * 1994-12-26 1996-07-12 Toshiba Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
US6153542A (en) 2000-11-28
TW312817B (de) 1997-08-11
EP0720212B1 (de) 2001-08-16
JPH08181276A (ja) 1996-07-12
SG42823A1 (en) 1997-10-17
KR0184378B1 (ko) 1999-04-15
CN1082721C (zh) 2002-04-10
EP0720212A2 (de) 1996-07-03
DE69522195D1 (de) 2001-09-20
US5683940A (en) 1997-11-04
EP0720212A3 (de) 1997-07-02
CN1134604A (zh) 1996-10-30

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