DE69521579T2 - Herstellungsverfahren für MOS-Halbleiterbauelement - Google Patents

Herstellungsverfahren für MOS-Halbleiterbauelement

Info

Publication number
DE69521579T2
DE69521579T2 DE69521579T DE69521579T DE69521579T2 DE 69521579 T2 DE69521579 T2 DE 69521579T2 DE 69521579 T DE69521579 T DE 69521579T DE 69521579 T DE69521579 T DE 69521579T DE 69521579 T2 DE69521579 T2 DE 69521579T2
Authority
DE
Germany
Prior art keywords
semiconductor device
manufacturing process
mos semiconductor
mos
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69521579T
Other languages
English (en)
Other versions
DE69521579D1 (de
Inventor
James A Cunningham
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
STMicroelectronics lnc USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics lnc USA filed Critical STMicroelectronics lnc USA
Application granted granted Critical
Publication of DE69521579D1 publication Critical patent/DE69521579D1/de
Publication of DE69521579T2 publication Critical patent/DE69521579T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • H01L29/42392Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor fully surrounding the channel, e.g. gate-all-around
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/6675Amorphous silicon or polysilicon transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/66772Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
DE69521579T 1994-09-30 1995-09-15 Herstellungsverfahren für MOS-Halbleiterbauelement Expired - Fee Related DE69521579T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/315,955 US5705405A (en) 1994-09-30 1994-09-30 Method of making the film transistor with all-around gate electrode

Publications (2)

Publication Number Publication Date
DE69521579D1 DE69521579D1 (de) 2001-08-09
DE69521579T2 true DE69521579T2 (de) 2002-05-29

Family

ID=23226822

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69521579T Expired - Fee Related DE69521579T2 (de) 1994-09-30 1995-09-15 Herstellungsverfahren für MOS-Halbleiterbauelement

Country Status (4)

Country Link
US (2) US5705405A (de)
EP (1) EP0704909B1 (de)
JP (1) JP3869037B2 (de)
DE (1) DE69521579T2 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005006153B4 (de) * 2004-02-10 2010-02-04 Samsung Electronics Co., Ltd., Suwon Verfahren zum Herstellen eines Feldeffekttransistors (FETs)

Families Citing this family (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6060375A (en) * 1996-07-31 2000-05-09 Lsi Logic Corporation Process for forming re-entrant geometry for gate electrode of integrated circuit structure
US6962883B2 (en) * 1996-08-01 2005-11-08 Texas Instruments Incorporated Integrated circuit insulator and method
KR100331845B1 (ko) * 1998-01-10 2002-05-10 박종섭 박막트랜지스터제조방법
US6117712A (en) * 1998-03-13 2000-09-12 Texas Instruments - Acer Incorporated Method of forming ultra-short channel and elevated S/D MOSFETS with a metal gate on SOI substrate
US6207530B1 (en) 1998-06-19 2001-03-27 International Business Machines Corporation Dual gate FET and process
EP0975021B1 (de) * 1998-07-22 2005-11-02 STMicroelectronics S.r.l. Herstellungsverfahren für ein elektronisches Bauelement, das MOS Transistoren mit salizidierten Übergängen und nicht salizidierten Widerständen enthält
US6162688A (en) * 1999-01-14 2000-12-19 Advanced Micro Devices, Inc. Method of fabricating a transistor with a dielectric underlayer and device incorporating same
US6103563A (en) * 1999-03-17 2000-08-15 Advanced Micro Devices, Inc. Nitride disposable spacer to reduce mask count in CMOS transistor formation
DE19924571C2 (de) 1999-05-28 2001-03-15 Siemens Ag Verfahren zur Herstellung eines Doppel-Gate-MOSFET-Transistors
DE19928564A1 (de) * 1999-06-22 2001-01-04 Infineon Technologies Ag Mehrkanal-MOSFET und Verfahren zu seiner Herstellung
FR2799305B1 (fr) 1999-10-05 2004-06-18 St Microelectronics Sa Procede de fabrication d'un dispositif semi-conducteur a grille enveloppante et dispositif obtenu
US6376286B1 (en) * 1999-10-20 2002-04-23 Advanced Micro Devices, Inc. Field effect transistor with non-floating body and method for forming same on a bulk silicon wafer
US6465852B1 (en) 1999-10-20 2002-10-15 Advanced Micro Devices, Inc. Silicon wafer including both bulk and SOI regions and method for forming same on a bulk silicon wafer
US6245636B1 (en) 1999-10-20 2001-06-12 Advanced Micro Devices, Inc. Method of formation of pseudo-SOI structures with direct contact of transistor body to the substrate
US6391658B1 (en) * 1999-10-26 2002-05-21 International Business Machines Corporation Formation of arrays of microelectronic elements
ATE378692T1 (de) * 2000-02-29 2007-11-15 Nxp Bv Halbleiterbauelement mit zweifachem gate und dessen herstellungsverfahren
DE10012112C2 (de) * 2000-03-13 2002-01-10 Infineon Technologies Ag Steg-Feldeffekttransistor und Verfahren zum Herstellen eines Steg-Feldeffekttransistors
US6982460B1 (en) * 2000-07-07 2006-01-03 International Business Machines Corporation Self-aligned gate MOSFET with separate gates
US6563131B1 (en) 2000-06-02 2003-05-13 International Business Machines Corporation Method and structure of a dual/wrap-around gate field effect transistor
JP2002034179A (ja) * 2000-07-14 2002-01-31 Toshiba Corp 電力制御装置
DE10045045C2 (de) * 2000-09-12 2002-09-19 Infineon Technologies Ag Herstellungsverfahren von Feldeffekttransistoren in integrierten Halbleiterschaltungen
FR2822293B1 (fr) * 2001-03-13 2007-03-23 Nat Inst Of Advanced Ind Scien Transistor a effet de champ et double grille, circuit integre comportant ce transistor, et procede de fabrication de ce dernier
US7189997B2 (en) 2001-03-27 2007-03-13 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US6982194B2 (en) * 2001-03-27 2006-01-03 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method for manufacturing the same
US6740938B2 (en) * 2001-04-16 2004-05-25 Semiconductor Energy Laboratory Co., Ltd. Transistor provided with first and second gate electrodes with channel region therebetween
FR2838238B1 (fr) * 2002-04-08 2005-04-15 St Microelectronics Sa Dispositif semiconducteur a grille enveloppante encapsule dans un milieu isolant
US6995430B2 (en) * 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
US20030227057A1 (en) * 2002-06-07 2003-12-11 Lochtefeld Anthony J. Strained-semiconductor-on-insulator device structures
US7074623B2 (en) * 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
US6833588B2 (en) * 2002-10-22 2004-12-21 Advanced Micro Devices, Inc. Semiconductor device having a U-shaped gate structure
US6686231B1 (en) * 2002-12-06 2004-02-03 Advanced Micro Devices, Inc. Damascene gate process with sacrificial oxide in semiconductor devices
US6864164B1 (en) 2002-12-17 2005-03-08 Advanced Micro Devices, Inc. Finfet gate formation using reverse trim of dummy gate
US6855606B2 (en) * 2003-02-20 2005-02-15 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor nano-rod devices
US7074656B2 (en) * 2003-04-29 2006-07-11 Taiwan Semiconductor Manufacturing Company, Ltd. Doping of semiconductor fin devices
KR100471173B1 (ko) 2003-05-15 2005-03-10 삼성전자주식회사 다층채널을 갖는 트랜지스터 및 그 제조방법
US6855582B1 (en) 2003-06-12 2005-02-15 Advanced Micro Devices, Inc. FinFET gate formation using reverse trim and oxide polish
US7271444B2 (en) * 2003-12-11 2007-09-18 International Business Machines Corporation Wrap-around gate field effect transistor
US7041542B2 (en) * 2004-01-12 2006-05-09 Advanced Micro Devices, Inc. Damascene tri-gate FinFET
US7084018B1 (en) 2004-05-05 2006-08-01 Advanced Micro Devices, Inc. Sacrificial oxide for minimizing box undercut in damascene FinFET
US7452778B2 (en) * 2004-06-10 2008-11-18 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor nano-wire devices and methods of fabrication
JP2008526040A (ja) * 2004-12-28 2008-07-17 エヌエックスピー ビー ヴィ 帯状のチャネルを有する半導体装置及びその製造方法
JP4405412B2 (ja) * 2005-03-02 2010-01-27 株式会社東芝 半導体集積回路
US7709313B2 (en) * 2005-07-19 2010-05-04 International Business Machines Corporation High performance capacitors in planar back gates CMOS
WO2007038164A2 (en) * 2005-09-23 2007-04-05 Nanosys, Inc. Methods for nanostructure doping
US9054194B2 (en) 2009-04-29 2015-06-09 Taiwan Semiconductor Manufactruing Company, Ltd. Non-planar transistors and methods of fabrication thereof
WO2014168876A2 (en) 2013-04-08 2014-10-16 Perkinelmer Health Sciences, Inc. Capacitively coupled devices and oscillators
KR102191215B1 (ko) 2013-12-20 2020-12-16 삼성전자주식회사 에스램 셀 및 그 제조 방법

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62274662A (ja) * 1986-05-22 1987-11-28 Seiko Epson Corp Mis型半導体装置
JPS63308386A (ja) * 1987-01-30 1988-12-15 Sony Corp 半導体装置とその製造方法
JPH0227772A (ja) * 1988-07-15 1990-01-30 Sony Corp 電界効果型薄膜トランジスタ
US5135888A (en) * 1989-01-18 1992-08-04 Sgs-Thomson Microelectronics, Inc. Field effect device with polycrystalline silicon channel
JPH02302044A (ja) * 1989-05-16 1990-12-14 Fujitsu Ltd 半導体装置の製造方法
NL8902372A (nl) * 1989-09-21 1991-04-16 Imec Inter Uni Micro Electr Werkwijze voor het vervaardigen van een veldeffecttransistor en halfgeleiderelement.
JP2804539B2 (ja) * 1989-09-28 1998-09-30 沖電気工業株式会社 半導体装置およびその製造方法
JP2660451B2 (ja) * 1990-11-19 1997-10-08 三菱電機株式会社 半導体装置およびその製造方法
JPH0479424U (de) * 1990-11-23 1992-07-10
JP2794678B2 (ja) * 1991-08-26 1998-09-10 株式会社 半導体エネルギー研究所 絶縁ゲイト型半導体装置およびその作製方法
JPH04318972A (ja) * 1991-04-17 1992-11-10 Kawasaki Steel Corp 半導体素子
US5204279A (en) * 1991-06-03 1993-04-20 Sgs-Thomson Microelectronics, Inc. Method of making SRAM cell and structure with polycrystalline p-channel load devices
US5187114A (en) * 1991-06-03 1993-02-16 Sgs-Thomson Microelectronics, Inc. Method of making SRAM cell and structure with polycrystalline P-channel load devices
JPH0529573A (ja) * 1991-07-24 1993-02-05 Mitsubishi Electric Corp 半導体記憶装置およびその製造方法
JP2650543B2 (ja) * 1991-11-25 1997-09-03 カシオ計算機株式会社 マトリクス回路駆動装置
KR950002202B1 (ko) * 1992-07-01 1995-03-14 현대전자산업주식회사 적층 박막 트랜지스터 제조방법
US5302842A (en) * 1992-07-20 1994-04-12 Bell Communications Research, Inc. Field-effect transistor formed over gate electrode
US5324673A (en) * 1992-11-19 1994-06-28 Motorola, Inc. Method of formation of vertical transistor
KR960002088B1 (ko) * 1993-02-17 1996-02-10 삼성전자주식회사 에스오아이(SOI : silicon on insulator) 구조의 반도체 장치 제조방법
US5482871A (en) * 1994-04-15 1996-01-09 Texas Instruments Incorporated Method for forming a mesa-isolated SOI transistor having a split-process polysilicon gate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005006153B4 (de) * 2004-02-10 2010-02-04 Samsung Electronics Co., Ltd., Suwon Verfahren zum Herstellen eines Feldeffekttransistors (FETs)

Also Published As

Publication number Publication date
JP3869037B2 (ja) 2007-01-17
DE69521579D1 (de) 2001-08-09
US5705405A (en) 1998-01-06
JPH08181328A (ja) 1996-07-12
EP0704909A2 (de) 1996-04-03
EP0704909B1 (de) 2001-07-04
EP0704909A3 (de) 1997-09-10
US5801397A (en) 1998-09-01

Similar Documents

Publication Publication Date Title
DE69521579D1 (de) Herstellungsverfahren für MOS-Halbleiterbauelement
DE69522195D1 (de) Herstellungsverfahren für Halbleiteranordnungen
DE59406621D1 (de) Herstellungsverfahren für vertikal kontaktierte halbleiterbauelemente
DE69503396T2 (de) Herstellungsverfahren für MOS-Transistor
DE69518793D1 (de) Herstellungsverfahren für eine Halbleitervorrichtung
KR960012575A (ko) 반도체 장치 제조 방법
DE69522600T2 (de) Halbleiteranordnung und Herstellungsverfahren für diese Halbleiteranordnung
DE69600261T2 (de) Herstellungsmethode für Halbleiterbauelement mit Salizid-Bereich
DE69131762D1 (de) Herstellungsverfahren für Halbleitereinrichtungen
KR960012574A (ko) 반도체장치 제조방법
DE69527668D1 (de) Anschlussstelle für Halbleiterbauelement
DE69131241D1 (de) Herstellungsverfahren für Halbleiteranordnungen
DE69518684T2 (de) Herstellungsverfahren für ein Feldeffekt-Halbleiterbauelement
DE69712080T2 (de) Herstellungsverfahren für eine halbleitervorrichtung
FI954241A (fi) Puolijohdelaitteen valmistusmenetelmä
DE69826865D1 (de) Herstellungsverfahren für verkapselte halbleiteranordnungen
DE69606932T2 (de) MOS-Kapazität für Halbleiteranordnung
DE69212897D1 (de) Herstellungsverfahren für MIS-Halbleiterbauelement
DE69631879D1 (de) Herstellungsverfahren für einen integrierten Dickoxydtransistor
DE69627800D1 (de) Herstellungsverfahren für halbleiteranordnung
KR960015805A (ko) 반도체 장치의 제조 방법
DE69826046D1 (de) Herstellungsverfahren für Halbleitervorrichtung
DE69529386D1 (de) Verbesserungen für Halbleiteranordnungen
DE69534487D1 (de) Herstellungsverfahren für Kompressionshalbleiterbauelement
DE69718733D1 (de) Herstellungsverfahren für Halbleiteranordnung

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee