DE69503396T2 - Herstellungsverfahren für MOS-Transistor - Google Patents

Herstellungsverfahren für MOS-Transistor

Info

Publication number
DE69503396T2
DE69503396T2 DE69503396T DE69503396T DE69503396T2 DE 69503396 T2 DE69503396 T2 DE 69503396T2 DE 69503396 T DE69503396 T DE 69503396T DE 69503396 T DE69503396 T DE 69503396T DE 69503396 T2 DE69503396 T2 DE 69503396T2
Authority
DE
Germany
Prior art keywords
manufacturing process
mos transistor
mos
transistor
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69503396T
Other languages
English (en)
Other versions
DE69503396D1 (de
Inventor
Hirofumi Sumi
Naoki Nagashima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of DE69503396D1 publication Critical patent/DE69503396D1/de
Publication of DE69503396T2 publication Critical patent/DE69503396T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/456Ohmic electrodes on silicon
    • H01L29/458Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742Thin film unipolar transistors
    • H01L29/66772Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651Silicon transistors
    • H01L29/78654Monocrystalline silicon transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)
DE69503396T 1994-01-19 1995-01-12 Herstellungsverfahren für MOS-Transistor Expired - Lifetime DE69503396T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6018991A JPH07211916A (ja) 1994-01-19 1994-01-19 トランジスタ素子及びその作製方法

Publications (2)

Publication Number Publication Date
DE69503396D1 DE69503396D1 (de) 1998-08-20
DE69503396T2 true DE69503396T2 (de) 1999-03-11

Family

ID=11987046

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69503396T Expired - Lifetime DE69503396T2 (de) 1994-01-19 1995-01-12 Herstellungsverfahren für MOS-Transistor

Country Status (6)

Country Link
US (1) US5597739A (de)
EP (1) EP0664566B1 (de)
JP (1) JPH07211916A (de)
KR (1) KR950034750A (de)
DE (1) DE69503396T2 (de)
MY (1) MY111990A (de)

Families Citing this family (34)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07335907A (ja) * 1994-06-14 1995-12-22 Sony Corp Soi基板に形成したcmosトランジスタおよびそのsoi基板の製造方法
JPH09270398A (ja) * 1996-04-01 1997-10-14 Sony Corp Soi基板の形成方法
KR0176202B1 (ko) * 1996-04-09 1999-04-15 김광호 에스.오.아이형 트랜지스터 및 그 제조방법
KR100248507B1 (ko) * 1997-09-04 2000-03-15 윤종용 소이 트랜지스터 및 그의 제조 방법
US5891763A (en) * 1997-10-22 1999-04-06 Wanlass; Frank M. Damascene pattering of SOI MOS transistors
KR100281109B1 (ko) * 1997-12-15 2001-03-02 김영환 에스오아이(soi)소자및그의제조방법
US6348715B1 (en) 1997-12-15 2002-02-19 Lg Semicon Co., Ltd. SOI (silicon on insulator) device
TW449869B (en) * 1998-06-04 2001-08-11 United Microelectronics Corp Manufacturing method for stacked integrated circuit
US6252275B1 (en) 1999-01-07 2001-06-26 International Business Machines Corporation Silicon-on-insulator non-volatile random access memory device
WO2001065609A1 (en) * 2000-02-29 2001-09-07 Koninklijke Philips Electronics N.V. Semiconductor device and method of manufacturing same
US6294413B1 (en) * 2000-12-27 2001-09-25 Vanguard International Semiconductor Corp. Method for fabricating a SOI (silicon on insulator) device
US6804502B2 (en) 2001-10-10 2004-10-12 Peregrine Semiconductor Corporation Switch circuit and method of switching radio frequency signals
EP3570374B1 (de) 2004-06-23 2022-04-20 pSemi Corporation Integriertes hf-frontend
USRE48965E1 (en) 2005-07-11 2022-03-08 Psemi Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
US7890891B2 (en) 2005-07-11 2011-02-15 Peregrine Semiconductor Corporation Method and apparatus improving gate oxide reliability by controlling accumulated charge
US20080076371A1 (en) * 2005-07-11 2008-03-27 Alexander Dribinsky Circuit and method for controlling charge injection in radio frequency switches
US8742502B2 (en) 2005-07-11 2014-06-03 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
US7910993B2 (en) 2005-07-11 2011-03-22 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFET's using an accumulated charge sink
US9653601B2 (en) 2005-07-11 2017-05-16 Peregrine Semiconductor Corporation Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction
KR100677048B1 (ko) * 2005-10-04 2007-02-01 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조 방법
US7960772B2 (en) * 2007-04-26 2011-06-14 Peregrine Semiconductor Corporation Tuning capacitance to enhance FET stack voltage withstand
EP2255443B1 (de) 2008-02-28 2012-11-28 Peregrine Semiconductor Corporation Verfahren und vorrichtung für digitale abstimmung eines kondensators bei einer integrierten schaltung
US8723260B1 (en) 2009-03-12 2014-05-13 Rf Micro Devices, Inc. Semiconductor radio frequency switch with body contact
CN102122658B (zh) * 2010-01-11 2013-03-20 中国科学院微电子研究所 半导体结构及其形成方法
CN103389443B (zh) * 2012-05-07 2015-12-09 无锡华润上华科技有限公司 绝缘体上硅mos器件动态击穿电压的测试方法
US9590674B2 (en) 2012-12-14 2017-03-07 Peregrine Semiconductor Corporation Semiconductor devices with switchable ground-body connection
US20150236748A1 (en) 2013-03-14 2015-08-20 Peregrine Semiconductor Corporation Devices and Methods for Duplexer Loss Reduction
US9406695B2 (en) 2013-11-20 2016-08-02 Peregrine Semiconductor Corporation Circuit and method for improving ESD tolerance and switching speed
US9831857B2 (en) 2015-03-11 2017-11-28 Peregrine Semiconductor Corporation Power splitter with programmable output phase shift
US9948281B2 (en) 2016-09-02 2018-04-17 Peregrine Semiconductor Corporation Positive logic digitally tunable capacitor
US10505530B2 (en) 2018-03-28 2019-12-10 Psemi Corporation Positive logic switch with selectable DC blocking circuit
US10886911B2 (en) 2018-03-28 2021-01-05 Psemi Corporation Stacked FET switch bias ladders
US10236872B1 (en) 2018-03-28 2019-03-19 Psemi Corporation AC coupling modules for bias ladders
US11476849B2 (en) 2020-01-06 2022-10-18 Psemi Corporation High power positive logic switch

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4146504A (en) * 1974-09-26 1979-03-27 Graham Magnetics Inc. Porous powders and a method for their preparation
JPS6148975A (ja) * 1984-08-16 1986-03-10 Seiko Epson Corp 薄膜トランジスタ
JPH0824189B2 (ja) * 1988-05-12 1996-03-06 三菱電機株式会社 半導体装置の製造方法
JP2670309B2 (ja) * 1988-09-28 1997-10-29 株式会社東芝 半導体装置の製造方法
US5316960A (en) * 1989-07-11 1994-05-31 Ricoh Company, Ltd. C-MOS thin film transistor device manufacturing method
US5066613A (en) * 1989-07-13 1991-11-19 The United States Of America As Represented By The Secretary Of The Navy Process for making semiconductor-on-insulator device interconnects
JPH0719839B2 (ja) * 1989-10-18 1995-03-06 株式会社東芝 半導体基板の製造方法
JP3416163B2 (ja) * 1992-01-31 2003-06-16 キヤノン株式会社 半導体基板及びその作製方法
JPH05226364A (ja) * 1992-02-14 1993-09-03 Fujitsu Ltd Mis型電界効果トランジスタの製造方法
JP3506445B2 (ja) * 1992-05-12 2004-03-15 沖電気工業株式会社 半導体装置の製造方法
US5407837A (en) * 1992-08-31 1995-04-18 Texas Instruments Incorporated Method of making a thin film transistor
US5338698A (en) * 1992-12-18 1994-08-16 International Business Machines Corporation Method of fabricating an ultra-short channel field effect transistor
US5449642A (en) * 1994-04-14 1995-09-12 Duke University Method of forming metal-disilicide layers and contacts

Also Published As

Publication number Publication date
JPH07211916A (ja) 1995-08-11
DE69503396D1 (de) 1998-08-20
US5597739A (en) 1997-01-28
EP0664566A1 (de) 1995-07-26
KR950034750A (ko) 1995-12-28
EP0664566B1 (de) 1998-07-15
MY111990A (en) 2001-03-31

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Legal Events

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8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)