DE69511160T2 - Herstellungsverfahren für ein Halbleiterbauelement mit DMOS-Transistor - Google Patents

Herstellungsverfahren für ein Halbleiterbauelement mit DMOS-Transistor

Info

Publication number
DE69511160T2
DE69511160T2 DE69511160T DE69511160T DE69511160T2 DE 69511160 T2 DE69511160 T2 DE 69511160T2 DE 69511160 T DE69511160 T DE 69511160T DE 69511160 T DE69511160 T DE 69511160T DE 69511160 T2 DE69511160 T2 DE 69511160T2
Authority
DE
Germany
Prior art keywords
semiconductor device
manufacturing process
dmos transistor
dmos
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69511160T
Other languages
English (en)
Other versions
DE69511160D1 (de
Inventor
Mutsumi Kitamura
Naoto Fujishima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Application granted granted Critical
Publication of DE69511160D1 publication Critical patent/DE69511160D1/de
Publication of DE69511160T2 publication Critical patent/DE69511160T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248—Combination of bipolar and field-effect technology
    • H01L21/8249—Bipolar and MOS technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0873—Drain regions
    • H01L29/0878—Impurity concentration or distribution

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE69511160T 1994-05-13 1995-05-12 Herstellungsverfahren für ein Halbleiterbauelement mit DMOS-Transistor Expired - Fee Related DE69511160T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP09940994A JP3186421B2 (ja) 1994-05-13 1994-05-13 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69511160D1 DE69511160D1 (de) 1999-09-09
DE69511160T2 true DE69511160T2 (de) 2000-01-27

Family

ID=14246690

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69511160T Expired - Fee Related DE69511160T2 (de) 1994-05-13 1995-05-12 Herstellungsverfahren für ein Halbleiterbauelement mit DMOS-Transistor

Country Status (3)

Country Link
EP (1) EP0682362B1 (de)
JP (1) JP3186421B2 (de)
DE (1) DE69511160T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0880183A3 (de) * 1997-05-23 1999-07-28 Texas Instruments Incorporated LDMOS-Leistungsanordnung
JP5183835B2 (ja) * 2000-11-02 2013-04-17 ローム株式会社 半導体装置およびその製造方法
JP2002314065A (ja) * 2001-04-13 2002-10-25 Sanyo Electric Co Ltd Ｍｏｓ半導体装置およびその製造方法
JP2003060199A (ja) * 2001-08-10 2003-02-28 Sanyo Electric Co Ltd 半導体装置とその製造方法
US6747332B2 (en) * 2002-04-01 2004-06-08 Motorola, Inc. Semiconductor component having high voltage MOSFET and method of manufacture
JP2005236142A (ja) * 2004-02-20 2005-09-02 Shindengen Electric Mfg Co Ltd 横型短チャネルｄｍｏｓ及びその製造方法並びに半導体装置
DE102004043284A1 (de) * 2004-09-08 2006-03-23 X-Fab Semiconductor Foundries Ag DMOS-Transistor für hohe Drain- und Sourcespannungen
KR100734143B1 (ko) * 2006-08-30 2007-06-29 동부일렉트로닉스 주식회사 디모스 트랜지스터 및 그 제조방법
KR101405310B1 (ko) 2007-09-28 2014-06-12 삼성전자 주식회사 반도체 집적 회로 장치 및 그 제조 방법
JP5354951B2 (ja) * 2008-05-13 2013-11-27 ラピスセミコンダクタ株式会社 半導体装置及びその製造方法
JP5359107B2 (ja) * 2008-08-11 2013-12-04 ミツミ電機株式会社 半導体装置及びその製造方法
KR101175228B1 (ko) 2009-12-04 2012-08-21 매그나칩 반도체 유한회사 반도체 장치
KR101098447B1 (ko) * 2009-12-04 2011-12-26 매그나칩 반도체 유한회사 반도체 장치
JP5542623B2 (ja) 2010-11-09 2014-07-09 株式会社東芝 半導体装置及びその製造方法
JP2013187263A (ja) 2012-03-06 2013-09-19 Canon Inc 半導体装置、記録装置及びそれらの製造方法
JP2016207830A (ja) * 2015-04-22 2016-12-08 トヨタ自動車株式会社 絶縁ゲート型スイッチング素子とその制御方法
JP6075816B1 (ja) * 2016-10-20 2017-02-08 株式会社ツインズ 多目的運動器具

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0766968B2 (ja) * 1987-08-24 1995-07-19 株式会社日立製作所 半導体装置及びその製造方法
JPH07176640A (ja) * 1993-10-26 1995-07-14 Fuji Electric Co Ltd 半導体装置の製造方法

Also Published As

Publication number Publication date
EP0682362B1 (de) 1999-08-04
DE69511160D1 (de) 1999-09-09
JP3186421B2 (ja) 2001-07-11
EP0682362A3 (de) 1996-11-27
EP0682362A2 (de) 1995-11-15
JPH07307401A (ja) 1995-11-21

Similar Documents

Publication Publication Date Title
DE69511160T2 (de) Herstellungsverfahren für ein Halbleiterbauelement mit DMOS-Transistor
DE69738595D1 (de) Herstellungsmethode für ein Halbleiter-Bauteil
DE69518793D1 (de) Herstellungsverfahren für eine Halbleitervorrichtung
DE69521579D1 (de) Herstellungsverfahren für MOS-Halbleiterbauelement
DE69534888D1 (de) Herstellungsverfahren für Halbleiterbauelement mit Graben
DE69600261T2 (de) Herstellungsmethode für Halbleiterbauelement mit Salizid-Bereich
DE69522195T2 (de) Herstellungsverfahren für Halbleiteranordnungen
DE69503396D1 (de) Herstellungsverfahren für MOS-Transistor
DE69408549T2 (de) Gehäuse für ein Halbleiterbauelement
DE69627226D1 (de) Herstellungsverfahren für eine Licht emittierende Halbleitervorrichtung
DE69832324D1 (de) Herstellungsverfahren für einen Halbleiter
DE59406621D1 (de) Herstellungsverfahren für vertikal kontaktierte halbleiterbauelemente
DE790641T1 (de) Kühlvorrichtung für ein Wafer
DE69128264T2 (de) Kühlvorrichtung für ein Wafer
DE60034548D1 (de) Herstellungsverfahren für dünnfilmtransistor mit obenliegendem gate
DE19581837T1 (de) Mehrlagiger Leitungsrahmen für eine Halbleitervorrichtung
DE69333864D1 (de) Herstellungsverfahren für Halbleiterbauelement mit Kondensator
DE69518684D1 (de) Herstellungsverfahren für ein Feldeffekt-Halbleiterbauelement
FI952719A0 (fi) Menetelmä puolijohdelaitteen valmistamiseksi
DE69131241T2 (de) Herstellungsverfahren für Halbleiteranordnungen
DE69508639T2 (de) Treiberschaltung für ein lichtemittierendes Halbleiterelement
DE69712080D1 (de) Herstellungsverfahren für eine halbleitervorrichtung
DE69507445D1 (de) Reinigungsverfahren für ein Halbleitersubstrat
DE69500586D1 (de) Herstellungsverfahren für ein Halbleiter-Bauelement zur Speicherung mehrerer Zustände
DE69531754D1 (de) Gate-Treiber-Schaltungsvorrichtung für ein spannungsgesteuertes Halbleiterelement

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee