KR950005138A - 반도체 칩용 위치설정부재 및 그 제조방법 - Google Patents

반도체 칩용 위치설정부재 및 그 제조방법 Download PDF

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KR950005138A
KR950005138A KR1019940017463A KR19940017463A KR950005138A KR 950005138 A KR950005138 A KR 950005138A KR 1019940017463 A KR1019940017463 A KR 1019940017463A KR 19940017463 A KR19940017463 A KR 19940017463A KR 950005138 A KR950005138 A KR 950005138A
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semiconductor chip
positioning member
chip
contact position
manufacturing
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KR1019940017463A
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지. 그라베 디미트리
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제이 엘. 사이칙
더 휘태커 코포레이션
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Publication of KR950005138A publication Critical patent/KR950005138A/ko

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/564—Details not otherwise provided for, e.g. protection against moisture
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
    • H05K13/04—Mounting of components, e.g. of leadless components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/52—Mounting semiconductor bodies in containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

반도체 칩(10)을 위한 주변영역 독립적인 정밀한 위치설정부재(22)는 칩 상의 콘택위치가 콘택 또는 리드와 같은 연결부재(18)에 대하여 신뢰성 있게 위치하도록 하여 칩이 전기적으로 맞물릴 수 있게 한다. 위치설정부재(22)는 칩의 주변영역(24)내에서 콘택위치에 대한 특정한 위치로 반도체 칩(10)의 표면상에 배치되며, 연결부재(18)를 포함하는 하우징의 상보적 부분과 밀접하게 결합할 수 있다. 반도체 칩(10)을 위한 주변영역 독립적인 정밀한 위치설정부재(22)를 제조하는 방법에는 칩을 광경화성 재질의 층으로 코팅하고, 위치설정부재(22)로 되는 재질의 부분이 노출되도록 콘택위치와 연관하여 재질을 마스킹하여, 광경화성 재질의 노출된 부분에 광을 조사하며, 경화되지 않은 부분을 칩으로부터 벗겨내어 위치설정부재 (22)를 규정하는 것을 포함한다.

Description

반도체 칩용 위치설정부재 및 그 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도는 반도체 칩을 다른 전기장치에 연결시키는 두 부분으로 된 하우징 위의 반도체 칩을 도시한 부분 분해사시도, 제2도는 콘택위치와 위치설정부재를 도시한 반도체 칩의 사시도, 제3도는 반도체 칩 상의 위치설정부재의 대안적 실시예의 사시도, 제4도는 다이싱 공정 이전의 개개의 반도체 칩을 도시한 반도체 웨이퍼의 상면도이다.

Claims (10)

  1. 전기적 연결을 이루기 위한 콘택위치를 가지며, 적어도 몇개의 콘택위치에 대응하여 배치된 연결부재를 가진 하우징에 수용가능한 반도체 칩으로써, 반도체 칩이 하우징에 수용될 때 연결부재는 그 각각의 콘택위치에 전기적으로 맞물리는 반도체 칩에 있어서, 위치설정부재는 칩의 주표면을 따라 반도체 칩의 주변영역내에 배치되며, 콘택위치에 대한 특정위치에서 위치설정부재는 하우징의 상보적 부재와 결합가능하고, 이렇게 결합될 때 콘택위치는 그 대응하는 연결부재와 정렬되는 것을 특징으로 하는 반도체 칩.
  2. 제1항에 있어서, 위치설정부재는 극성화된 구성을 가지며, 칩이 특정한 방향으로 있어 각각의 콘택위치 및 연결부재가 대응하는 관계로 될 때에만 위치설정부재가 상보적 부분과 결합하는 것을 특징으로 하는 반도체 칩.
  3. 제1항에 있어서, 위치설정부재는 상이한 직경을 가진 한 쌍의 원통형 보스인 것을 특징으로 하는 반도체 칩.
  4. 제1항에 있어서, 위치설정부재는 반도체 칩 상에 광경화성 재질을 구비하는 것을 특징으로 하는 반도체 칩.
  5. 반도체 칩이 하우징의 상보적 부분에 의해 수용될 때 칩의 콘택위치가 하우징의 연결부재와 전기적으로 맞물리는 것을 보장하는 반도체 칩을 위한 주변영역 독립적인 정밀한 위치설정부재를 제조하는 방법에 있어서, (a) 반도체 칩 상에 재질층을 적층하는 단계와, (b) 반도체 칩 상의 콘택위치의 설정을 결정하는 단계와, (c) 위치설정부재에 대응하는 반도체 칩 상에 적층된 층의 부분을 경화시키는 단계와, (d) 반도체 칩으로부터 경화가능한 층의 경화되지 않은 부분을 벗겨내어, 콘택패드와 정밀한 관계로 반도체 칩 상에 경화된 위치설정부재를 남겨놓는 단계를 포함하는 것을 특징으로 하는 위치설정부재 제조방법.
  6. 제5항에 있어서, 상기 단계 (a)와 (b)가 바뀌어 있는 위치설정부재 제조방법.
  7. 제5항에 있어서, 상기 단계 (a) 내지 (d)는 반도체 칩이 반도체 웨이퍼의 일부분인 동안 이루어지며, (f) 반도체 웨이퍼로부터 개개의 반도체 칩을 다이싱하는 단계를 더 포함하는 위치설정부재 제조방법.
  8. 제5항에 있어서, 칩 상에 배치된 재질의 층은 광경화성인 위치설정부재 제조방법.
  9. 제8항에 있어서, 콘택위치의 설정을 결정한 후에, 위치설정부재가 개구를 통해 노출되도록 콘택위치의 설정과 연관하여 개구를 가진 광학적으로 불투명한 재질로 반도체 칩을 마스킹하는 단계를 더 포함하며, 위치설정부재에 대응하는 재질층의 노출된 부분에 광을 조사하여 경화단계를 완성시키는 위치설정부재 제조방법.
  10. 제9항에 있어서, 재질층의 경화되지 않은 부분을 벗겨내는 것은 경화되지 않은 층을 용액으로 세척하여 이루어지는 위치설정부재 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019940017463A 1993-07-28 1994-07-20 반도체 칩용 위치설정부재 및 그 제조방법 KR950005138A (ko)

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US9865693A 1993-07-28 1993-07-28
US8/098,656 1993-07-28

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KR950005138A true KR950005138A (ko) 1995-02-18

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Country Link
US (1) US5637919A (ko)
EP (1) EP0637070B1 (ko)
JP (1) JPH0778897A (ko)
KR (1) KR950005138A (ko)
DE (1) DE69405832T2 (ko)

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EP0637070A1 (en) 1995-02-01
DE69405832T2 (de) 1998-02-05
DE69405832D1 (de) 1997-10-30
EP0637070B1 (en) 1997-09-24
US5637919A (en) 1997-06-10
JPH0778897A (ja) 1995-03-20

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