WO2007129526A1 - インダクタ及びこれを利用した電源回路 - Google Patents
インダクタ及びこれを利用した電源回路 Download PDFInfo
- Publication number
- WO2007129526A1 WO2007129526A1 PCT/JP2007/058011 JP2007058011W WO2007129526A1 WO 2007129526 A1 WO2007129526 A1 WO 2007129526A1 JP 2007058011 W JP2007058011 W JP 2007058011W WO 2007129526 A1 WO2007129526 A1 WO 2007129526A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- inductor
- substrate
- embedded
- hole
- conductor
- Prior art date
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- 239000004020 conductor Substances 0.000 claims abstract description 96
- 239000000758 substrate Substances 0.000 claims abstract description 91
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 53
- 229910052802 copper Inorganic materials 0.000 claims abstract description 47
- 239000010949 copper Substances 0.000 claims abstract description 47
- 229910000859 α-Fe Inorganic materials 0.000 claims abstract description 40
- 238000000034 method Methods 0.000 claims description 82
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- 229920005989 resin Polymers 0.000 claims description 29
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- 239000004519 grease Substances 0.000 claims description 7
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- 229910052751 metal Inorganic materials 0.000 claims description 7
- 238000000059 patterning Methods 0.000 claims description 5
- 239000003989 dielectric material Substances 0.000 claims description 4
- 239000006247 magnetic powder Substances 0.000 claims description 4
- QMQXDJATSGGYDR-UHFFFAOYSA-N methylidyneiron Chemical compound [C].[Fe] QMQXDJATSGGYDR-UHFFFAOYSA-N 0.000 claims 2
- 239000000843 powder Substances 0.000 claims 2
- 239000011248 coating agent Substances 0.000 abstract 1
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- 239000011162 core material Substances 0.000 description 77
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- 230000000052 comparative effect Effects 0.000 description 4
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 3
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- RNFJDJUURJAICM-UHFFFAOYSA-N 2,2,4,4,6,6-hexaphenoxy-1,3,5-triaza-2$l^{5},4$l^{5},6$l^{5}-triphosphacyclohexa-1,3,5-triene Chemical compound N=1P(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP(OC=2C=CC=CC=2)(OC=2C=CC=CC=2)=NP=1(OC=1C=CC=CC=1)OC1=CC=CC=C1 RNFJDJUURJAICM-UHFFFAOYSA-N 0.000 description 1
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- FFBHFFJDDLITSX-UHFFFAOYSA-N benzyl N-[2-hydroxy-4-(3-oxomorpholin-4-yl)phenyl]carbamate Chemical compound OC1=C(NC(=O)OCC2=CC=CC=C2)C=CC(=C1)N1CCOCC1=O FFBHFFJDDLITSX-UHFFFAOYSA-N 0.000 description 1
- 239000013590 bulk material Substances 0.000 description 1
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- PEVJCYPAFCUXEZ-UHFFFAOYSA-J dicopper;phosphonato phosphate Chemical compound [Cu+2].[Cu+2].[O-]P([O-])(=O)OP([O-])([O-])=O PEVJCYPAFCUXEZ-UHFFFAOYSA-J 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4046—Through-connections; Vertical interconnect access [VIA] connections using auxiliary conductive elements, e.g. metallic spheres, eyelets, pieces of wire
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F5/00—Coils
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
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- H—ELECTRICITY
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- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/04—Fixed inductances of the signal type with magnetic core
- H01F17/06—Fixed inductances of the signal type with magnetic core with core substantially closed in itself, e.g. toroid
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- H—ELECTRICITY
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- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F41/00—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties
- H01F41/02—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets
- H01F41/04—Apparatus or processes specially adapted for manufacturing or assembling magnets, inductances or transformers; Apparatus or processes specially adapted for manufacturing materials characterised by their magnetic properties for manufacturing cores, coils, or magnets for manufacturing coils
- H01F41/041—Printed circuit coils
- H01F41/046—Printed circuit coils structurally combined with ferromagnetic material
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/645—Inductive arrangements
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
- H05K1/0233—Filters, inductors or a magnetic substance
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/0006—Printed inductances
- H01F17/0013—Printed inductances with stacked layers
- H01F2017/002—Details of via holes for interconnecting the layers
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- H—ELECTRICITY
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- H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
- H01F17/00—Fixed inductances of the signal type
- H01F17/04—Fixed inductances of the signal type with magnetic core
- H01F17/06—Fixed inductances of the signal type with magnetic core with core substantially closed in itself, e.g. toroid
- H01F2017/065—Core mounted around conductor to absorb noise, e.g. EMI filter
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/01078—Platinum [Pt]
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- H01L2924/01087—Francium [Fr]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/08—Magnetic details
- H05K2201/083—Magnetic materials
- H05K2201/086—Magnetic materials for inductive purposes, e.g. printed inductor with ferrite core
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09581—Applying an insulating coating on the walls of holes
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/4902—Electromagnet, transformer or inductor
Definitions
- the present invention relates to an inductor and a power supply circuit using the same, and more specifically to an inductor used in a smoothing circuit of an LSI power supply circuit mounted on a printed circuit board and a power supply circuit using the same.
- the elements constituting the smoothing circuit are mainly composed of an inductor and a capacitor, and both are mainly surface-mounted components.
- a surface mounting component is mounted on a printed circuit board, a mounting area having a certain size is required.
- Patent Document 1 Japanese Patent Laid-Open No. 1-312885 “Inductor Embedded Circuit Board” (Published December 18, 1989) Patent Document 1 shows that FIGS. 1 and 2 have a cylindrical ferrite 20 fitted into a through-hole 18 and a cylindrical ferrite. An inductor in which a conductor 24 is inserted into 20 through holes 22 is disclosed.
- the microscopic structure is different from the "inductor including a conductor and a magnetic body in close contact with the conductor without leaving a gap", which will be described later. There is a gap between them, so you can not get a large inductance.
- an object of the present invention is to provide a novel inductor and a method for manufacturing the inductor.
- the present invention aims to provide a power supply circuit using a novel inductor.
- an inductor according to the present invention includes a magnetic body having a through hole and a conductor formed on the surface of the through hole, and constitutes a part of a power supply circuit.
- the conductor may be made of copper.
- the conductor may also have a generally cylindrical copper force.
- the conductor is formed of a substantially hollow cylindrical copper force.
- the magnetic body may have a shape that generally surrounds the conductor.
- the magnetic body may be composed of a ferrite force.
- the magnetic body may be composed of a composite material force including a magnetic body and a non-magnetic body.
- the magnetic body is made of a composite material of magnetic powder and resin.
- the magnetic body may be made of a composite material of carbonyl iron powder and resin.
- the inductor may further include a dielectric material, and the dielectric material may have a shape that generally surrounds the magnetic body.
- the board-embedded inductor according to the present invention includes a magnetic body extending in the thickness direction of the printed board and having a through hole, and a conductor formed on the surface of the through hole.
- the conductor may also have a copper force.
- the conductor may be made of a generally cylindrical copper.
- the conductor may be made of substantially hollow cylindrical copper.
- the magnetic body may surround a side surface of the conductor.
- the magnetic body may be made of ferrite!
- the magnetic body may be made of a composite material including a magnetic body and a non-magnetic body.
- the magnetic body may be made of a composite material of magnetic powder and resin.
- the magnetic body may be made of a composite material of carbonyl iron powder and a resin.
- the substrate-embedded inductor may further include a dielectric, and the dielectric may surround a side surface of the magnetic body.
- the above-described substrate-embedded inductor may further include a dielectric, and the dielectric may be formed of an underfill material having low thermal expansion characteristics.
- an electronic device is an electronic device comprising a substrate, a semiconductor device mounted on the substrate, and a power supply circuit formed on the substrate and supplying power to the semiconductor device.
- the power supply circuit has at least an inductor formed in the thickness direction of the substrate.
- the power supply circuit includes a thin film capacitor formed in a main surface direction of the substrate, an inductor formed in a thickness direction of the substrate, and the semiconductor device of the substrate. It can also have a power supply IC device mounted on the surface opposite to the mounting surface
- the power supply circuit includes a thin film capacitor formed in a main surface direction of the substrate, an inductor formed in a thickness direction of the substrate, and a front of the substrate.
- a power supply IC device mounted on a surface opposite to the mounting surface of the semiconductor device, wherein the thin film capacitor, the substrate embedded type inductor and the power supply IC device are formed close to the semiconductor device, and the power supply
- the circuit and the semiconductor device may be connected by a short conductive circuit.
- the inductor includes a magnetic body extending in the thickness direction of the substrate and having a through hole, and a conductor formed on the surface of the through hole.
- a plurality of sets of the power supply circuits may be provided on the substrate.
- a magnetic body extending in a longitudinal direction is prepared, a through hole is formed in an axial direction of the magnetic body, and an inner surface of the through hole is metal-plated.
- the metal plating may be copper plating! /.
- the magnetic body may be made of ferrite.
- the magnetic body also has a composite material force including a magnetic body and a non-magnetic body.
- the method of incorporating an inductor into a substrate provides a magnetic body that extends in the longitudinal direction, and an inductor manufactured by metal-plating the inner surface of the axial through hole of the magnetic body. And a step of forming a through hole in the substrate, inserting the inductor into the through hole, and filling and fixing the gap between the inductor and the substrate with grease.
- the method of incorporating the inductor into the plate may further include a step of filling the through hole of the inductor with a resin.
- the inductor may be closed at both ends of the through hole with a metal.
- the method for incorporating the inductor into the plate may further include a step of performing copper plating on the surface of the substrate and the inner surface of the through hole of the inductor and patterning after the inductor is fixed to the substrate. Oh ,.
- a method for incorporating an inductor into a substrate includes preparing a cylindrical magnetic body, drilling a through-hole in the substrate, inserting the magnetic body into the through-hole, Filling and fixing between the substrate with a resin, fixing the surface of the substrate and the inner surface of the through hole of the magnetic material, and patterning.
- the method of incorporating the inductor into the substrate may further include a step of filling the through hole of the inductor with a resin.
- a power supply circuit using a novel inductor can be provided.
- FIG. 1 is a diagram showing a configuration of an electronic device such as a printed circuit board mounted with a power supply circuit.
- FIG. 2 is a diagram showing a basic configuration of a circuit diagram of a power supply circuit used in the electronic device of FIG.
- FIGS. 3 (A) to (D) are voltage and current waveform diagrams for explaining the operation of the power supply circuit of FIG. 2, and the horizontal axis is the time axis t.
- FIG. 4A is a cross-sectional view showing a state of being embedded in an embedded inductor package.
- FIG. 4B is a cross-sectional view showing a state in which the embedded inductor is embedded in the package according to another embodiment.
- FIG. 4C is a cross-sectional view showing a state in which the embedded inductor is embedded in the semiconductor / cage according to still another embodiment.
- FIG. 5A is a diagram defining the outer shape of the inductor of FIG.
- FIG. 5B is a chart comparing the inductances of the ferrite core and the FR-4 core inductor.
- FIG. 5C is a diagram comparing the inductance when the current is increased from 0.01 to 10A.
- FIG. 5D is a BT characteristic diagram comparing a composite material core inductor and a ferrite core inductor.
- FIG. 6 is a diagram for explaining a method of forming an inductor.
- FIG. 7A is a diagram for explaining a method of embedding a formed inductor in a printed board.
- FIG. 7B is a diagram illustrating a method of another embodiment in which the formed inductor is embedded in a printed circuit board.
- FIG. 7C is a diagram for explaining a method of still another embodiment in which the formed inductor is embedded in a printed circuit board.
- FIG. 8 is a diagram for explaining a method of manufacturing a printed circuit board used in the electronic device of FIG.
- FIG. 9 is a diagram showing an electronic device such as a printed circuit board mounted with a current power supply circuit.
- FIG. 1 is a diagram showing a configuration of an electronic device 1 such as a printed circuit board having a power supply circuit.
- the electronic device 1 includes a knock (PK) 2 and a mother board (MB) 4 on which the electronic device 1 is mounted.
- the two are electrically connected by, for example, a pin junction 16.
- the mother board 4 also has an appropriate printed circuit board force, and a direct current voltage Vin of an appropriate magnitude is supplied to the conductor circuit 14 and sent to the package 2 through the pin junction 16.
- the knock 2 also has an appropriate printed circuit board force.
- the core board 13 the lower insulating layers 15u and 15d formed on both surfaces of the core substrate 13, and the upper layer insulating layers formed on both surfaces of the core substrate 13, respectively.
- the core substrate 13 is formed with conductor circuits 52u and 52d and through-hole conductors 28 for connecting both the conductors.
- Conductor circuits 54u and 54d and via-hole conductors 53u and 53d are formed in the lower insulating layers 15u and 15d.
- conductor circuits 56u and 56d and via Honoré conductors 55u and 55d force S are formed on the upper insulating layers 25u and 25d.
- the core substrate 13 is formed by a plating through hole method, and the lower insulating layers 15u and 15d and the upper insulating layers 25u and 25d are formed by a build-up method.
- the knock 2 has a substrate-embedded inductor (L) 10 and a thin film capacitor (C) 8 formed between the conductor circuits 52u-1 and 54u-1.
- a semiconductor device (MPU Micro Processor Unit) 6 is mounted on the front side of the knocker 2 and a power supply IC (PW IC) 12 is mounted on the back side, preferably at a position corresponding to the MPU 6.
- the thin film capacitor (C) 8 is a thin film capacitor formed with a core substrate conductor circuit 52u-l, a lower layer conductor circuit 54u-l, and a dielectric 8 interposed between the two conductor circuits. Preferably, it is formed in the vicinity of MPU6.
- the embedded substrate inductor (L) 10 and the power supply IC (PW IC) 12 will be described in detail later.
- a power supply circuit for supplying power to the MPU 6 is configured by a circuit including all or any one of the thin film capacitor (C) 8, the embedded inductor (L) 10 and the power IC (PW IC) 12.
- the Power supply circuit power Power is supplied to MPU6 by the conductor circuit (including through-hole conductors and via-hole conductors; the same applies hereinafter) formed in package 2.
- the conductor circuit including through-hole conductors and via-hole conductors; the same applies hereinafter
- the distance from the output of the power supply circuit to the MPU 6 as a load is very short, for example, within lmm. Because the length of the conductor circuit used for power supply is very short, Voltage fluctuation due to parasitic resistance or parasitic inductance can be suppressed.
- the substrate-embedded inductor (L) 10 is formed on the core substrate 13 of the knock 2 but may be formed on a part or the whole of the knock 2.
- the substrate embedded inductor (L) 10 is formed in the core substrate 13 will be described as an example.
- the power supply to the knock 2 is not limited to a set of power supply circuits (that is, a set of thin film capacitors 8, a substrate embedded inductor 10 and a switching IC 12).
- a plurality of sets of power supply circuits can be prepared and connected in parallel so that each power supply circuit can share power supply.
- the required number of thin film capacitors 8, substrate embedded inductors 10 and power supply ICs (PW ICs) 12 are prepared.
- FIG. 2 is a diagram showing a basic configuration of the power supply circuit 3 used in the electronic device of FIG.
- This power supply circuit is a DC-DC converter that steps down an input DC voltage.
- a power supply IC (PW IC) 12 an embedded inductor (L) 10 and a load MPU6 are connected in series to an input power supply Vin, and a thin film is formed at both ends of the load MPU6.
- Type capacitor (C) 8 is connected in parallel.
- the power supply IC (PW IC) 12 has a switching element (SW) 9 and a diode (D) 11, and the diode 11 functions as a free-wheeling diode connected in parallel to the load MPU 16.
- the frequency of the switching element (SW) 9 is about 0.1 to 10 MHz.
- the input voltage Vin is changed by the power supply IC (PW IC) 12 by changing the ratio of the cycle T and the ON time ton to obtain the average value of the load voltage.
- the output voltage is smoothed in the subsequent stage.
- the voltage generated across the load is Vout.
- the basic operation of the DC-DC converter shown in Fig. 2 is that when the power supply IC (PW IC) 12 is turned on, the embedded inductor (L) 10, which is a choke coil, the thin film capacitor (C) 8, and the negative Current flows through MPU6, which is a load. At this time, electromagnetic energy is stored in the embedded inductor (L) 10 and the thin film capacitor (C) 8. Next, when the power supply IC (PW IC) 12 is turned OFF The electromagnetic energy stored in the thin film capacitor (C) 8 continues to flow through the MPU 6 as a load. Similarly, electromagnetic energy stored in the embedded inductor (L) 10 continues to flow through the diode (D) 11, which is a flywheel 'diode.
- the voltage Vout applied to the load MPU6 includes a pulsating component
- the pulsating component of the voltage / current includes the embedded inductor (L) 10 and the thin film capacitor (C) 8 It is determined by the capacity.
- the pulsating component current fluctuation A IL
- a design specification value is determined in advance, and a smoothing circuit (embedded inductor (L) 10 and thin film capacitor (C )
- the pulsating flow is suppressed by the filter circuit comprising 8).
- the filter circuit comprising 8
- this power supply circuit is used for the MPU 16 having a drive voltage of about 1 volt. At such a low voltage, a voltage drop due to resistance must be avoided as much as possible. Therefore, the embedded inductor (L) 10 needs to have a small resistance value, a large inductance, and a small size for electronic device miniaturization and high density mounting.
- FIGS. 3A to 3D are voltage and current waveform diagrams illustrating these operations, and the horizontal axis is the time axis t.
- Fig. 3 (A) shows the input DC voltage Vin when the switching element (SW) 9 is ON
- Fig. 3 (B) shows the current IL flowing through the embedded inductor (L) 10. As long as the switching element (SW) 9 is ON, the input DC voltage Vin and the DC current IL are constant.
- FIG. 4A is a cross-sectional view showing a state in which the embedded inductor 10 is embedded in the package 2. It is preferable that the inductor (L) 10 has a resistance value as low as possible, a inductance as large as possible, and a size as small as possible. In general, increasing the conductor length increases the inductance but also increases the resistance. On the other hand, placing the magnetic material near the conductor increases the inductance.
- the present inventor adopts metallic copper as the conductor for the inductor, reduces the resistance value by shortening the length, and increases the inductance by arranging a magnetic body in the vicinity. It was decided. From this point of view, the present inventor proposes an embedded substrate type inductor 10 shown in FIGS. 4A to 4C as an embodiment. As described above, the case where the inductor 10 is formed on the core substrate 13 will be described here, but it may be formed on the entire package 2 or a part thereof.
- the embedded inductor (L) 10 shown in Fig. 4 (A) is composed of a conductor (con.) 32 made of through-hole copper and a core 30 made of a cylindrical flight surrounding the periphery thereof.
- the inside of the through-hole copper is formed as a hollow 34.
- the embedded inductor 10 is disposed in a through hole 27 opened in the core substrate 13, and the periphery is covered with a resin 38. Via conductors 39 are formed so as to close the openings at both end faces of the embedded inductor 10, and are connected to the conductor layers 52u and 52d, respectively.
- FIG. 4 (B) shows another embodiment of the embedded inductor (L) 10, and the through-hole conductor 32 is a conductor circuit on the surface of the core substrate (wiring, power supply or It is electrically connected to a substantially planar conductor circuit constituting the ground pattern or a through-hole land for connection to a via-hole conductor that conducts to the upper layer.
- the through-hole land is not re-wired on the core substrate surface.
- the through hole conductor 32 in FIG. 4B is filled with a filling agent 36 and a lid-like conductor 39 that closes the filling agent is formed.
- a via hole conductor may be formed thereon.
- the hole filling material 36 is preferably a low-elasticity material. This is because the stress caused by the difference in thermal expansion between the magnetic material, the through-hole conductor, and the core substrate can be relieved.
- 5B-5D are charts showing the performance of the embedded inductor 10 using the ferrite core of FIG. 5A.
- FIG. 5A is a diagram defining the outer shape of inductor (L) 10 in FIG.
- the organic material (FR-4) core inductor which is a comparative example, has the same size.
- FIG. 5C is a diagram comparing the inductance when the current is increased from 0.01 to 10 A for both inductors.
- FR-4 insulating material
- the inductor 30-1 of the ferrite core has a high inductance when the current is in the range of 0.01 to 0.1, but the current is 1 to 10A. When it increases, it is saturated and gradually decreases.
- the inductor 30-2 of the composite material core has a lower inductance than the inductor 30 of the ferrite core, but the current further increases by about 3 times compared to the inductor 30-3 of the air core. However, it has a characteristic of maintaining a constant value.
- FIG. 5D is a BT characteristic diagram comparing the inductor 30-2 of the composite material core and the inductor 30-1 of the ferrite core.
- the ferrite core inductance 30-1 has a high magnetic permeability, and thus immediately undergoes magnetic saturation.
- the inductance 30-2 of the composite material core is magnetized almost in proportion to the magnetic field strength without causing magnetic saturation because the relative permeability is relatively low.
- FIG. 5C where the ferrite core inductor 30-1 has high inductance but saturates and gradually decreases as the current increases, while the composite core inductor 30-2 has relatively low inductance. Is presumed to be a cause of maintaining a constant value.
- the inductance 10 Since the inductance 10 according to the present embodiment is used in a power supply circuit, a large current may flow. When the current value is relatively low, a ferrite core inductor 30-1 having a high inductance is preferable. On the other hand, when the current is relatively large (for example, 0.1A or more or 1A or more), the inductance is relatively low, but the inductance remains constant as the current increases. Is preferred. Of course, the ultimate development goal of the present inventors is to develop an inductor that has a high inductance and maintains a constant inductance even when the current increases.
- the inductor of the present embodiment is large in the high frequency region (for example, in a switching power supply circuit, to convert AC power into DC or to block high frequency components from DC current or low frequency AC current). It can be used for inductors that form part of a power supply circuit that controls current.
- FIG. 6 is a diagram for explaining a method of forming an inductor using ferrite as a core material. The same applies when a composite material is used as the core material.
- a ferrite bulk material 30 that is a magnetic material is prepared (step 1).
- this ferrite 30 is formed into a cylindrical shape having through holes 31 and fired (step 2).
- the dimension of the cylindrical ferrite 30 after firing is preferably 0.05 to 1.00 mm in the height direction.
- the molding and firing conditions for the ferrite material should be such that the relative density after firing is 95% or more, preferably 98% or more.
- the sintered ferrite 30 has a relative magnetic permeability of 100 to 150 and a saturation magnetic field of about 0.4 T (Tesla).
- T saturation magnetic field
- the core portion 30 is formed.
- the ferrite may be formed into a circular shape, fired, and then drilled along the axis by an appropriate means (for example, a drill).
- both end surfaces of the cylindrical ferrite 30 are covered with a resist film except for the through-hole 34, and the ferrite surface (inner peripheral surface of the through-hole 31) is formed by a chemical copper plating method (electroless copper plating).
- a thin copper plating is applied, and a copper plating with a thickness of about 20 m is applied by the copper pyrophosphate plating method (electrolytic copper plating) to form the conductor 32 (step 3).
- the conductor 32 on the core portion 30 with a metal, the two are in close contact with each other without leaving a gap. Thereafter, the dry film is removed. At this time, if the through-hole conductor 30 protrudes from the core 30, it is removed by polishing.
- the through-hole conductor 32 was used as the cathode, and the plating head impregnated with the plating solution was contacted with the substrate surface. Then, the measurement pads 32t are formed one by one (step 4 (a) or (b)). Ni ZAu plating can be applied to the surface of the pad 32t!
- FIGS. 5 (B) to (D) 30-2 shown as another form of the ferrite core 30-1 is provided with a composite material instead of ferrite, and a comparative example is used instead of ferrite.
- FR-4 flame retardant epoxy resin
- FIG. 7A to 7C show a method of embedding the formed inductor 10 in the core substrate 13, respectively. It is a figure explaining. As described above, the inductor 10 may be embedded in all or part of the knock 2.
- a through hole 27 for embedding an inductor is drilled in the core substrate 13 by, for example, a drill (step A-1).
- the inductor 10 formed in steps (1) to (4a or 4b) in Fig. 6 is inserted into this through hole (step A-2).
- the resin 38 is embedded around the inductor 10.
- This resin 38 is preferably a low CTE (thermal expansion coefficient) underfill resin used in Philip chip mounting.
- the center of the resin 38 on both end faces is drilled with a laser to form an opening 38a (step A-3).
- Filled via 39 is formed by electroless copper plating and electrolytic copper plating, and is further connected to surface conductor layers 52u and 52d of package 2 (step A-4).
- a solder resist layer is further formed as an insulating layer.
- the core substrate 13 with the copper foil 40 is drilled (process B-1), the inductor 10 is inserted (process B-2), and the grease is put around the inductor.
- the inductor opening is filled and filled with grease (Step B-4b), electroless copper plating and electrolytic copper plating 42 are applied (step B-5a), and patterning is performed.
- Step B-6a The core substrate 13 may have no copper foil 40.
- the embedding method shown in FIG. 7C is an example in which the core substrate 13 without the copper foil 40 is used, and the conductor 32 is formed after the core 30 of the inductor 10 is inserted into the substrate.
- Drill the core board 13 (process C-1), insert the cylindrical ferrite 30 formed in (process 1) to (process 2) in Fig. 6 (process C-2), and surround the cylindrical ferrite 30
- the resin is embedded in and then electroless copper plating and electrolytic copper plating 42 are applied (step C-3) and patterned (step C-4a).
- the inductor opening is filled and filled with grease (Step C-4b), and electroless copper plating and electrolytic copper plating 42 are applied (Step C-5b).
- Step C-6b The core substrate 13 may have a copper foil 40.
- the substrate can be either a resin substrate or a ceramic substrate.
- FIG. 8 briefly describes a method of manufacturing a printed circuit board used as the package 2 and the mother board 4 of the electronic device 1 in FIG.
- a plating through-hole method and a new process method are known.
- New process methods include the Meki method build-up method, the conductive paste method build-up method, the build-up transfer method, the transfer method, the columnar build-up method, and the batch lamination method.
- the plating method build-up method is classified into a copper foil method with a resin, a thermosetting resin method, a photosensitive insulating resin method, etc., depending on the material and the drilling method.
- a description will be given along with the thermosetting resin method of the Mekki method build-up method, which is used relatively often by the applicant.
- a core substrate 130 is prepared.
- the core substrate 130 is manufactured by the Metz through hole method.
- An inner layer conductor pattern is formed on a glass cloth epoxy greaves copper clad laminate or glass cloth high heat resistant greave copper clad laminate, and the required number of layers are prepared and laminated and bonded with an adhesive sheet called a pre-preda. To do. Holes are drilled in this hole, and the inner and outer conductor layers are connected to each other on the wall surface and surface of the hole using the through-hole method. Thereafter, the surface pattern 134 is formed, and the core substrate is manufactured.
- it is a multi-layer core board that also has a conductor circuit in the inner layer, but with a double-sided copper-clad laminate as the starting material, no conductor circuit is provided in the inner layer, and the conductor circuits on the front and back are connected by through-hole conductors.
- a double-sided core substrate may be used.
- an insulating layer 150 is formed on the core substrate 130.
- the insulating layer 150 is formed by a laminating method in which a liquid material is coated and a film-like material is heated and pressed in a vacuum.
- holes 150a are formed in the insulating layer with a laser.
- the inner surface of the hole and the surface of the insulating layer are made conductive by electroless copper plating and electrolytic copper plating. At this time, in order to improve the adhesion of the plating, the inner surface of the hole and the surface of the insulating layer are roughened.
- the conductor pattern 158 on the front surface side is formed.
- the conductor pattern is formed by performing panel plating with the electrolytic copper plating 160 over the entire surface, forming an etching resist on the upper surface of the copper plating, and then forming the conductive pattern 158 by etching (subtractive method). Other methods, such as semi-additive method, full additive method, etc. You can use it.
- the back side conductor pattern 158 is similarly formed. At this stage, a one-layer conductor pattern is formed, so the steps of FIGS. 8B to 8F are repeated as many times as desired.
- the multilayer printed circuit board is manufactured by repeating the steps of FIGS. 8B to 8F once more.
- a solder resist layer (not shown) may be formed on the outermost layer.
- the outermost conductor pattern 258 is formed in conformity with the pattern of the package 2 and the mother board 4 of FIG. Inductors are embedded in the completed package 2 by one of the methods described in Figs. 7 (A) to (C).
- Corresponding to the substrate 13 in FIGS. 7A to 7C is the core substrate 130 in FIG. 8 or a printed wiring board in which an interlayer resin insulation layer and a conductor circuit are alternately laminated on the core substrate. is there.
- the present embodiment has the following advantages and effects.
- An inductor having a large inductance can be provided. By configuring the conductor and the magnetic body to be in close contact with each other without leaving a gap, the inductance can be increased.
- a small-sized inductor can be provided.
- the inductor has a radius of about 0.25 to 2 mm and a length of about 1 mm, and can provide a small-sized inductor.
- An inductor that can be formed in the same manufacturing process as a printed circuit board can be provided.
- the manufacturing process of the inductor can be formed in the same manufacturing process as that of the printed circuit board.
- It can be placed near the load. Since it is embedded in the board, it can be formed even in the load mounting area. For example, it can be embedded in a printed wiring board or core substrate directly under the IC.
- a board embedded inductor that can be embedded in the same manufacturing process as a printed circuit board can be provided. It can be formed on the printed circuit board in the same manufacturing process as the printed circuit board, including drilling, insertion, anti-grease, opening formation, via formation, and conductor pattern formation.
- Load An electronic device having a power circuit arranged in the vicinity of the MPU can be provided.
- the distance from the output of the power supply circuit to the load MPU is very short, for example, within lmm, so that the conductor circuit length used for power supply is very short, which suppresses voltage fluctuations due to the parasitic resistance and parasitic inductance of the wiring. be able to.
- FIG. 9 is a diagram showing an electronic device 100 such as a printed circuit board mounted with a current power supply circuit.
- the electronic device 100 includes a knock (PK) 200 and a mother board (MB) 400 on which the electronic device 100 is mounted, and the two are electrically connected by, for example, a pin junction 160.
- PK knock
- MB mother board
- the power supply IC 120, the inductor element 100, and the capacitor element 80 that form the power supply circuit are all surface-mounted individual components, and each requires a certain mounting area on the printed circuit board. For this reason, in the electronic device 100, these surface-mounted components 120, 100, 80 are mounted near the input voltage Vin feeding end portion of the mother board MB400. Power is supplied from the power supply circuit to the MPU 60 by a conductor circuit 140 formed on the mother board 400, a pin connection 160, and a conductor circuit formed on the package 200 (including through-hole conductors and via-hole conductors) 180, 280, etc.
- the output force of the power supply circuit is also very long, for example, several centimeters to 10 centimeters, the distance force to the MPU60 that is the load. Salary Because the conductor circuit length used for electricity is very long, voltage fluctuations due to wiring parasitic resistance and parasitic inductance are likely to occur!
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Abstract
Description
Claims
Priority Applications (3)
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JP2007554365A JPWO2007129526A1 (ja) | 2006-05-08 | 2007-04-11 | インダクタ及びこれを利用した電源回路 |
EP07741447A EP2018092A4 (en) | 2006-05-08 | 2007-04-11 | INDUCTOR AND ELECTRIC POWER SOURCE THEREOF |
CN2007800008340A CN101341807B (zh) | 2006-05-08 | 2007-04-11 | 电感器、电感器的制造方法以及组装电感器的方法 |
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US11/429,157 | 2006-05-08 | ||
US11/429,157 US7843302B2 (en) | 2006-05-08 | 2006-05-08 | Inductor and electric power supply using it |
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PCT/JP2007/058011 WO2007129526A1 (ja) | 2006-05-08 | 2007-04-11 | インダクタ及びこれを利用した電源回路 |
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US (5) | US7843302B2 (ja) |
EP (1) | EP2018092A4 (ja) |
JP (1) | JPWO2007129526A1 (ja) |
KR (1) | KR100973447B1 (ja) |
CN (2) | CN101341807B (ja) |
TW (2) | TWI344805B (ja) |
WO (1) | WO2007129526A1 (ja) |
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US7843302B2 (en) * | 2006-05-08 | 2010-11-30 | Ibiden Co., Ltd. | Inductor and electric power supply using it |
US7751205B2 (en) * | 2006-07-10 | 2010-07-06 | Ibiden Co., Ltd. | Package board integrated with power supply |
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JP7364010B2 (ja) | 2020-09-01 | 2023-10-18 | 株式会社村田製作所 | 半導体複合装置および半導体複合装置の製造方法 |
WO2022163588A1 (ja) * | 2021-01-29 | 2022-08-04 | 日本碍子株式会社 | コア基板およびインターポーザ |
WO2022162888A1 (ja) * | 2021-01-29 | 2022-08-04 | 日本碍子株式会社 | コア基板 |
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EP2018092A4 (en) | 2012-11-14 |
US20090225525A1 (en) | 2009-09-10 |
TWI344325B (en) | 2011-06-21 |
TW200803644A (en) | 2008-01-01 |
US7868728B2 (en) | 2011-01-11 |
US20090224863A1 (en) | 2009-09-10 |
CN101697305A (zh) | 2010-04-21 |
US7812702B2 (en) | 2010-10-12 |
TW201106819A (en) | 2011-02-16 |
US20110102122A1 (en) | 2011-05-05 |
KR20080027371A (ko) | 2008-03-26 |
TWI344805B (en) | 2011-07-01 |
CN101341807A (zh) | 2009-01-07 |
EP2018092A1 (en) | 2009-01-21 |
US20100117779A1 (en) | 2010-05-13 |
US7855626B2 (en) | 2010-12-21 |
CN101697305B (zh) | 2012-10-17 |
US20070257761A1 (en) | 2007-11-08 |
KR100973447B1 (ko) | 2010-08-02 |
CN101341807B (zh) | 2012-09-19 |
US7843302B2 (en) | 2010-11-30 |
US8207811B2 (en) | 2012-06-26 |
JPWO2007129526A1 (ja) | 2009-09-17 |
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