WO2003100853A1 - Substrat a multiples couches avec une bobine integree, puce a semi-conducteurs, procedes de facturation - Google Patents

Substrat a multiples couches avec une bobine integree, puce a semi-conducteurs, procedes de facturation Download PDF

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Publication number
WO2003100853A1
WO2003100853A1 PCT/JP2003/006648 JP0306648W WO03100853A1 WO 2003100853 A1 WO2003100853 A1 WO 2003100853A1 JP 0306648 W JP0306648 W JP 0306648W WO 03100853 A1 WO03100853 A1 WO 03100853A1
Authority
WO
WIPO (PCT)
Prior art keywords
coil
multilayer substrate
multilayer
forming
built
Prior art date
Application number
PCT/JP2003/006648
Other languages
English (en)
Japanese (ja)
Inventor
Kouichirou Sagawa
Masahiko Oshimura
Original Assignee
Ajinomoto Co.,Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ajinomoto Co.,Inc. filed Critical Ajinomoto Co.,Inc.
Priority to AU2003241820A priority Critical patent/AU2003241820A1/en
Publication of WO2003100853A1 publication Critical patent/WO2003100853A1/fr

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type 
    • H01F17/0006—Printed inductances
    • H01F17/0033—Printed inductances with the coil helically wound around a magnetic core
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/34—Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields
    • H01F27/36—Electric or magnetic shields or screens
    • H01F27/363—Electric or magnetic shields or screens made of electrically conductive material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/645—Inductive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F27/00—Details of transformers or inductances, in general
    • H01F27/34—Special means for preventing or reducing unwanted electric or magnetic effects, e.g. no-load losses, reactive currents, harmonics, oscillations, leakage fields
    • H01F27/36—Electric or magnetic shields or screens
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/165—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors

Abstract

L'invention concerne un substrat à multiples couches avec une bobine intégrée, peu influencée par le bruit et l'empreinte magnétique, ou une capacité parasite attribuée à la bobine intégrée. L'invention traite également d'un procédé de fabrication de ce dernier. Le substrat à multiples couches comprend une bobine formée de manière solidaire avec ce substrat, et comprend une partie d'enroulement parallèle au substrat, et une partie d'enroulement verticale par rapport à ce dernier. En outre, il comprend un isolant supportant la bobine formant au moins une partie d'une partie isolante du substrat et formée de plusieurs couches isolantes empilées. Ce substrat se caractérise en ce que la bobine se compose de divers enroulements comportant chacun un motif de spiral dont le sens est opposé à celui des enroulements adjacents, lorsqu'on les regarde dans le même sens, et en ce que l'extrémité de tête du motif en spirale de l'enroulement est reliée à une extrémité de tête d'un enroulement unitaire adjacent, et l'extrémité arrière de la spirale de l'enroulement adjacent est reliée à l'extrémité arrière de cette autre unité adjacente, et ainsi les enroulements sont reliés.
PCT/JP2003/006648 2002-05-29 2003-05-28 Substrat a multiples couches avec une bobine integree, puce a semi-conducteurs, procedes de facturation WO2003100853A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2003241820A AU2003241820A1 (en) 2002-05-29 2003-05-28 Multilayer substrate with built-in coil, semiconductor chip, methods for manufacturing them

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002156261A JP2005347286A (ja) 2002-05-29 2002-05-29 コイル内蔵多層基板、半導体チップ、及びそれらの製造方法
JP2002-156261 2002-05-29

Publications (1)

Publication Number Publication Date
WO2003100853A1 true WO2003100853A1 (fr) 2003-12-04

Family

ID=29561465

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2003/006648 WO2003100853A1 (fr) 2002-05-29 2003-05-28 Substrat a multiples couches avec une bobine integree, puce a semi-conducteurs, procedes de facturation

Country Status (4)

Country Link
JP (1) JP2005347286A (fr)
AU (1) AU2003241820A1 (fr)
TW (1) TW200410376A (fr)
WO (1) WO2003100853A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012521089A (ja) * 2009-03-18 2012-09-10 アギア システムズ インコーポレーテッド 磁気結合が低減された集積回路インダクタ

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5433199B2 (ja) * 2008-10-21 2014-03-05 学校法人慶應義塾 電子回路
US9113569B2 (en) * 2011-03-25 2015-08-18 Ibiden Co., Ltd. Wiring board and method for manufacturing same
US20120314389A1 (en) * 2011-03-25 2012-12-13 Ibiden Co., Ltd. Wiring board and method for manufacturing same
JP5767495B2 (ja) 2011-03-29 2015-08-19 パナソニック株式会社 可変インダクタ及びこれを用いた半導体装置
JP2013070035A (ja) * 2011-09-22 2013-04-18 Ibiden Co Ltd 多層プリント配線板
US9275950B2 (en) * 2012-05-29 2016-03-01 Taiwan Semiconductor Manufacturing Co., Ltd. Bead for 2.5D/3D chip packaging application
JP6306288B2 (ja) 2013-05-13 2018-04-04 日東電工株式会社 コイルプリント配線基板、受電モジュール、電池ユニットおよび受電通信モジュール
JP5907124B2 (ja) * 2013-07-24 2016-04-20 株式会社村田製作所 高周波部品およびフィルタ部品
JP5970714B2 (ja) 2013-10-30 2016-08-17 株式会社村田製作所 電子部品
JP6327639B2 (ja) * 2014-04-18 2018-05-23 日本電信電話株式会社 直交型ソレノイドインダクタ
JP6582401B2 (ja) * 2014-12-01 2019-10-02 富士電機株式会社 信号伝達装置
JP6989465B2 (ja) 2018-09-05 2022-01-05 株式会社東芝 磁気カプラ及び通信システム
JP7219136B2 (ja) * 2019-03-27 2023-02-07 本田技研工業株式会社 半導体装置
CN117957622A (zh) * 2021-09-21 2024-04-30 罗姆股份有限公司 变压器芯片

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04237106A (ja) * 1991-01-21 1992-08-25 Nippon Telegr & Teleph Corp <Ntt> 集積化インダクタンス素子及び集積化トランス
JPH0555043A (ja) * 1991-08-22 1993-03-05 Fujitsu Ltd 小型コイルとその製造方法，磁気ヘツドの製造方法及び磁気記憶装置
EP0588503A2 (fr) * 1992-09-10 1994-03-23 National Semiconductor Corporation Circuit intégré d'élément de mémoire magnétique et sa méthode de fabrication
JPH08250333A (ja) * 1995-03-14 1996-09-27 Taiyo Yuden Co Ltd インダクタアレイ
JPH0945866A (ja) * 1995-08-02 1997-02-14 Hitachi Ltd マイクロ波集積回路
JPH10154795A (ja) * 1996-11-19 1998-06-09 Advanced Materials Eng Res Inc 半導体チップにおけるインダクター及びその製造方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04237106A (ja) * 1991-01-21 1992-08-25 Nippon Telegr & Teleph Corp <Ntt> 集積化インダクタンス素子及び集積化トランス
JPH0555043A (ja) * 1991-08-22 1993-03-05 Fujitsu Ltd 小型コイルとその製造方法，磁気ヘツドの製造方法及び磁気記憶装置
EP0588503A2 (fr) * 1992-09-10 1994-03-23 National Semiconductor Corporation Circuit intégré d'élément de mémoire magnétique et sa méthode de fabrication
JPH08250333A (ja) * 1995-03-14 1996-09-27 Taiyo Yuden Co Ltd インダクタアレイ
JPH0945866A (ja) * 1995-08-02 1997-02-14 Hitachi Ltd マイクロ波集積回路
JPH10154795A (ja) * 1996-11-19 1998-06-09 Advanced Materials Eng Res Inc 半導体チップにおけるインダクター及びその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012521089A (ja) * 2009-03-18 2012-09-10 アギア システムズ インコーポレーテッド 磁気結合が低減された集積回路インダクタ

Also Published As

Publication number Publication date
TW200410376A (en) 2004-06-16
AU2003241820A1 (en) 2003-12-12
JP2005347286A (ja) 2005-12-15

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