WO2006059586A1 - 直接接合ウェーハの製造方法及び直接接合ウェーハ - Google Patents
直接接合ウェーハの製造方法及び直接接合ウェーハ Download PDFInfo
- Publication number
- WO2006059586A1 WO2006059586A1 PCT/JP2005/021841 JP2005021841W WO2006059586A1 WO 2006059586 A1 WO2006059586 A1 WO 2006059586A1 JP 2005021841 W JP2005021841 W JP 2005021841W WO 2006059586 A1 WO2006059586 A1 WO 2006059586A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- wafer
- bond
- oxide film
- directly bonded
- voids
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 45
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 32
- 239000010408 film Substances 0.000 claims abstract description 92
- 238000000137 annealing Methods 0.000 claims abstract description 45
- 239000010409 thin film Substances 0.000 claims abstract description 37
- 239000012298 atmosphere Substances 0.000 claims abstract description 18
- 239000007789 gas Substances 0.000 claims abstract description 13
- 239000001257 hydrogen Substances 0.000 claims abstract description 13
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 13
- 239000011261 inert gas Substances 0.000 claims abstract description 12
- 235000012431 wafers Nutrition 0.000 claims description 253
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 34
- 229910052710 silicon Inorganic materials 0.000 claims description 34
- 239000010703 silicon Substances 0.000 claims description 34
- 238000005468 ion implantation Methods 0.000 claims description 12
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 claims description 10
- 238000005498 polishing Methods 0.000 claims description 8
- 230000003746 surface roughness Effects 0.000 claims description 8
- 229910052786 argon Inorganic materials 0.000 claims description 5
- 238000000926 separation method Methods 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims 1
- 239000011800 void material Substances 0.000 abstract description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 description 13
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 11
- 239000001301 oxygen Substances 0.000 description 11
- 229910052760 oxygen Inorganic materials 0.000 description 11
- 230000000052 comparative effect Effects 0.000 description 10
- 238000005259 measurement Methods 0.000 description 10
- 239000004065 semiconductor Substances 0.000 description 10
- 238000009792 diffusion process Methods 0.000 description 7
- 239000002253 acid Substances 0.000 description 6
- 239000012300 argon atmosphere Substances 0.000 description 6
- 230000007547 defect Effects 0.000 description 6
- 150000002431 hydrogen Chemical class 0.000 description 6
- 230000007423 decrease Effects 0.000 description 5
- -1 hydrogen ions Chemical class 0.000 description 5
- 239000002245 particle Substances 0.000 description 5
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 5
- GPRLSGONYQIRFK-UHFFFAOYSA-N hydron Chemical compound [H+] GPRLSGONYQIRFK-UHFFFAOYSA-N 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- 239000012299 nitrogen atmosphere Substances 0.000 description 4
- 238000009826 distribution Methods 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 230000001590 oxidative effect Effects 0.000 description 3
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 238000005304 joining Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000002775 capsule Substances 0.000 description 1
- 229910052799 carbon Inorganic materials 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 229910001385 heavy metal Inorganic materials 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
- H01L21/2003—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy characterised by the substrate
- H01L21/2007—Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
Definitions
- the present invention relates to a method for manufacturing a direct junction wafer that can be used for a semiconductor device formed by directly joining two wafers, and a direct junction wafer.
- JP 2000-36445 A discloses that a wafer having a natural acid film is joined at room temperature and then heat-treated in an atmosphere other than oxidizing, thereby A method of manufacturing a direct bonding wafer in which the oxide film layer disappears by diffusion is disclosed. The number of voids cannot be sufficiently reduced even by this method.
- the present invention has been made in view of the above problems, and is a direct control in which generation of voids is suppressed. It is an object of the present invention to provide a bonding wafer that can be used for a semiconductor device with a small number of voids and a manufacturing method of the bonding wafer.
- the present invention provides a method for manufacturing a direct bonding wafer, in which a thermal oxide film or a CVD is formed on the surface of at least one of a bond wafer and a base wafer. After forming an acid film and bonding it to the other wafer through the acid film, a bond wafer is formed into a thin film to form a bonded wafer, and then the bonded wafer is formed. Then, an annealing process is performed in an atmosphere containing either an inert gas, hydrogen, or a mixed gas thereof to remove the oxide film between the bond wafer and the base wafer, and thereby bond the bond wafer and the base wafer.
- a method of manufacturing a directly bonded wafer characterized by direct bonding.
- a thermal oxide film or a CVD oxide film is formed on the surface of at least one wafer among a bond wafer forming a thin film layer for device fabrication and a base wafer serving as a support substrate, When bonded to the other wafer via the oxide film, generation of void particles at the bonding interface can be suppressed.
- a bond wafer is formed into a thin film to produce a bonded wafer, and then the bonded wafer is subjected to an annealing process in an atmosphere containing either inert gas, hydrogen, or a mixed gas thereof.
- a silicon wafer is used as the base wafer, and as the bond wafer, a force using a wafer different from the silicon wafer, or a silicon wafer having a direction different from that of the base wafer is used.
- a force using a wafer different from the silicon wafer, or a silicon wafer having a direction different from that of the base wafer is used.
- the bond wafer is a wafer different from the silicon wafer, for example, a silicon-germanium mixed crystal wafer, or the orientation of the bond wafer is the same as that of the base wafer.
- a direct bonding wafer having a high device operating speed can be manufactured.
- the Bondueha thin film is formed by a process including at least an ion implantation separation method.
- ion implantation an ion implantation layer is formed by implanting ions at a predetermined depth in a bond wafer where the control accuracy of the implantation depth is high, and after bonding, the bond wafer can be peeled off at the ion implantation layer. is there. In this way, the thickness of the remaining Bondueha can be adjusted to a high degree to make a thin film.
- the thinning it is desirable to form a thin film so that the thickness of the bondueha remains at 150 nm or more.
- defect enlargement, pit generation, etc. may occur.
- the thin film is bonded so that the thickness of the bondueha layer remains at 150 nm or more in the bondueha thin film, compared to the case of less than 150 nm, defect enlargement, pits, and The generation of voids can be further suppressed, and it is possible to produce a high-quality direct bonding wafer.
- the thin film is subjected to polishing so that the PV value (maximum height difference in the measurement range of 10 m x 10 m) of the surface roughness of the bonded wafer is 20 nm or less before the annealing process. Is desirable.
- the surface roughness PV of the produced bonded wafer is polished to be 20 nm or less after the bond wafer is thinned and before the annealing process, it is compared with the case where it is larger than 20 nm. Therefore, it is possible to further suppress the generation of defects, pits and voids generated by the annealing process, and it is possible to manufacture a high-quality direct bonding wafer.
- argon gas as an inert gas in the atmosphere in the annealing process.
- argon gas as the inert gas because the oxide film can be efficiently vaporized and argon is generally used.
- the annealing temperature be 1100 ° C or higher.
- the annealing temperature is set to 1100 ° C or higher, oxygen near the wafer surface diffuses outwardly, the oxygen concentration decreases, the oxide film is reduced, and oxygen decreases in the oxygen concentration region. Diffusion into the silicon layer! In this way, the outward diffusion of oxygen and the oxide film As the reduction proceeds and eventually the oxide film disappears, the silicon layer, that is, the bond wafer and the direct wafer bonded to the base wafer can be efficiently manufactured.
- the thickness of the bondager can be further reduced to a desired thickness.
- the thickness of the bond wafer can be reduced to a desired thickness suitable for the application to obtain a product.
- the present invention is a direct bonding wafer in which a silicon thin film layer is directly bonded on a base wafer, and the number of voids that are unbonded portions of the base wafer and the silicon thin film layer is 0.02 Zcm Provides 2 or less direct bonding woofers.
- the quality is sufficiently high and it can be used for semiconductor devices.
- the "desired thickness” used above means the film thickness of the bond wafer in a completed state as a product.
- a method for manufacturing a directly bonded wafer in which a thermal oxide film or a CVD oxide film is formed on the surface of at least one of a bond wafer and a base wafer, When bonded to the other wafer via the oxide film, generation of particles, voids and the like at the bonded portion can be suppressed.
- a bond wafer is formed into a thin film to produce a bonded wafer, and then the annealing process is performed on the bonded wafer in an atmosphere containing either an inert gas, hydrogen, or a mixed gas thereof.
- a direct contact in which a silicon thin film layer is directly bonded on a base wafer if several force ⁇ - 02 or ZCM 2 or less is directly bonded Ueha voids are unbonded portion of the base one Suweha and silicon thin film layer, the number of voids is extremely small instrument sufficiently high quality It can be used for semiconductor devices.
- FIG. 1 is a result of measuring the number of voids after annealing in Examples 1 to 6.
- FIG. 2 is a measurement result of film thickness variation after annealing in Examples 1 to 6.
- FIG. 3 is a measurement result of the number of voids after annealing in Examples 7 to 12.
- FIG. 4 is a film thickness variation measurement result after annealing in Examples 7 to 12.
- FIG. 5 shows the number of voids measured after annealing in Example 13 and Comparative Examples 1 to 3.
- the present inventors form a thermal oxide film or a CVD oxide film on the surface of at least one of the bond wafer and the base wafer, and the other wafer passes through the oxide film.
- the bonded wafer is thinned to produce a bonded wafer.
- an annealing process is performed on the bonded wafer in an atmosphere containing any of an inert gas, hydrogen, or a mixed gas thereof, thereby removing an oxide film between the bondue and the base wafer.
- a thermal oxide film or a CVD oxide film is formed on the surface of at least one wafer of the bond wafer and the base wafer, and bonded to the other wafer via the oxide film.
- particles at the bonding interface can be suppressed, and water generated at the wafer interface at the time of bonding can be sufficiently absorbed by the oxide film, thereby suppressing generation of voids.
- Thermal oxide films and CVD oxide films are usually thicker than 5 nm, and are based on the fact that they can be easily obtained in high purity with a dense and uniform thickness.
- a bond wafer is formed into a thin film, and then an annealing process is performed in an atmosphere containing either an inert gas, hydrogen, or a mixed gas thereof, whereby the above-described acid solution between the bond wafer and the base wafer is obtained.
- Capsule can be removed and high quality direct bonding wafers with very few voids can be produced.
- the oxide film can be removed efficiently because the thin film is used for the annealing.
- the silicon thin film layer is directly bonded onto the base wafer, and a directly bonded wafer having a void number of 0.02 or less Zcm 2 can be obtained. Since the number is extremely small and the quality is sufficiently high, it can be used for semiconductor devices.
- a silicon wafer is used as a base wafer.
- the bondue can be a silicon wafer similar to the base wafer, but for example, a silicon wafer different from the silicon wafer or a silicon wafer having a different orientation from the wafer may be used.
- the ability to cite silicon-germanium mixed crystals is not limited to this.
- Bondueha can be 10
- the base wafer as (100)
- the plane orientation force S (110) of the thin film layer for device fabrication makes it possible to make a high-speed device, and the base wafer is a general-purpose product. Using (100) can contribute to low cost.
- heat treatment is performed on at least one wafer of the bond wafer and the base wafer to form a thermal oxide film on the wafer surface.
- a thermal oxide film with a thickness of 30 nm, for example, thicker than the natural oxide film is formed on at least one wafer, particle generation can be suppressed when the two wafers are bonded.
- water generated at the wafer interface at the time of bonding can be sufficiently adsorbed to the thermal oxide film, and the thermal acid film has a dense and uniform thickness, thus suppressing the generation of voids.
- the acid conditions are not particularly limited, and any commonly used method may be used.
- heat treatment may be performed at 600 ° C to 1300 ° C for 1 second to 10 hours in a dry oxygen atmosphere, water vapor atmosphere, or other oxidizing gas atmosphere.
- the two wafers are bonded together through the thermal oxide film, heat-treated at a high temperature (for example, 1000 ° C) and firmly bonded, and then subjected to, for example, polishing or etching.
- a thin film of Bondueha is applied to produce a bonded wafer (SOI UENO).
- a thin film of Bondueha may also be used using the ion implantation delamination method.
- this method first, for example, hydrogen ions are implanted into a bondueha to form an ion implantation layer.
- the bond wafer on which the ion-implanted layer is formed and the base wafer are bonded to each other through the thermal oxide film formed earlier, and heat treatment (about 300 ° C.) is performed to join the two wafers.
- heat treatment is performed at about 500 ° C. to strengthen the bonding, and part of the bond wafer is peeled off by the ion implantation layer to form a thin film.
- heat treatment is performed at a high temperature (for example, 1 000 ° C to 1200 ° C) after thin film formation, and further, for example, polishing is performed to adjust the thickness. May be.
- a high temperature for example, 1 000 ° C to 1200 ° C
- polishing is performed to adjust the thickness. May be.
- the thickness of the remaining Bondueha is 1 in this Bondueha thin film. If the film is made thin so as to remain at 50 nm or more, the generation and expansion of defects such as voids can be more effectively suppressed as compared to the case where the thickness is less than 150 nm.
- the surface of the bonded wafer is larger than 20 nm by polishing the surface of the bonded wafer so that the PV value of the surface roughness of the bonded wafer is 20 nm or less after performing the thin film and before the annealing process. In comparison with this, the generation and expansion of voids and other defects can be more effectively suppressed.
- an annealing process is performed on the bonded wafer in an atmosphere containing any of an inert gas, hydrogen, or a mixed gas thereof.
- an inert gas for example, argon gas may be used as the inert gas.
- the annealing temperature is set to 1100 ° C. or higher, for example, oxygen in the silicon layer is diffused outward at this high temperature, and the oxygen concentration in the silicon layer decreases.
- the thermal oxide film existing between the silicon layer (Bondueno) and the base wafer is reduced, and oxygen is diffused into the silicon layer. This diffusion proceeds, and finally the thermal oxide film is removed, and a direct bonding wafer in which the silicon layer and the base wafer are directly bonded can be obtained.
- the thickness of the bond wafer is thinned to a desired thickness suitable for the application to obtain a product.
- This thinning can also be performed by a general method, such as polishing or etching.
- the direct bonding wafer according to the present invention has a void number of 0.02 or less and Zcm 2 or less, and has a very small number of voids, so that it can be used for various semiconductor devices.
- each Bondueha side silicon layer (SOI layer) before the annealing process is 70 (Example 1), 100 (Example 2), 150 (Example 3), 200 ( Example 4), 250 (Example 5), 300 (Example 6) nm.
- Example 1 the number of voids increased compared to Examples 3 to 6, and Example 1 was 0.4 Zcm 2 and Example 2 was 0.1 Zcm 2 .
- the number of voids was equivalent to 4 hours even if the annealing time was 1 hour.
- the number of voids was 3 or less (0.004 Zcm 2 ) or less.
- Such a directly bonded wafer having an extremely small number of voids can be used for a semiconductor device.
- film thickness variation after annealing (measured approximately 4000 points at 4 mm intervals in the wafer surface).
- the film thickness distributions of Examples 3 to 6 showed less variation than Examples 1 and 2.
- Example 1 the number of voids was larger than that in Examples 3 to 6. This is thought to be because the diffusion of oxygen increases as the SOI layer thickness decreases, resulting in a reaction corresponding to etching.
- Comparative Example 1 to be described later a thermal oxide film is not formed on the surface using a wafer having a silicon layer of the same thickness, but the number of voids in the directly bonded wafer is increased. Compared to low numbers.
- the bondue side of these wafers was thinned by CMP to a thickness of 150 nm for each SOI layer before the annealing process.
- the PV conditions of the surface roughness of the SOI layer were adjusted to 2 (Example 7), 5 (Example 8), 10 (Example 9), and 20 (Example 10) by adjusting the CMP conditions. ), 30 (Example 11), 50 (Example 12) nm.
- the number of voids was 3 or less (0.004 Zcm 2 ) or less.
- Such a direct bonding woofer having an extremely small number of voids can be used for a semiconductor device.
- Example 11 the number of voids in Example 7 to L0 was increased, and Example 11 was 0.06 Zcm 2 and Example 12 was 0.1 Zcm 2 .
- the film thickness variation after annealing showed a little less variation in the film thickness distribution of Examples 7 to 10 than that of Examples 11 to 12.
- the PV value of the surface roughness of the SOI layer before annealing is set to 20 nm or less, a higher quality direct bonding wafer with an extremely small number of voids can be produced.
- the wafer was thinned by CMP and rubbed 250 nm as the thickness of the SOI layer before the annealing process.
- the PV value was 25 nm.
- the wafer was annealed (1200 ° C, 5 hours, argon atmosphere).
- Example 13 as a result of annealing, the thermal oxide film thickness became 0, and a directly bonded wafer in which a bond wafer and a base wafer were directly bonded could be obtained.
- FIG. 5 shows the measurement results of the number of voids of the directly bonded wafer of Example 13.
- the number of voids of this directly bonded wafer manufactured by the method of manufacturing a directly bonded wafer according to the present invention is 8 Z pieces (0.01 Zcm as shown in the graph of 250 nm (BOX 30 nm) in Fig. 5. 2 )
- the value was extremely small, and a high quality direct bonding wafer was obtained. For this reason, it can fully utilize for semiconductor devices.
- the bonder side of these wafers is then thinned by CMP and bonded.
- the thickness of the silicon layer on the side C was set to 70 (Comparative Example 1), 100 (Comparative Example 2), and 250 (Comparative Example 3) nm, and the number of voids was measured as a direct bonding wafer.
- Comparative Examples 1 to 3 The measurement results of Comparative Examples 1 to 3 are shown in the graphs of 70 nm (without the BOX layer), 100 nm (without the BOX layer), and 25 Onm (without the BOX layer) in FIG.
- the number of voids is 940, Z (1.3 Zcm 2 ), 420, Z (0.58), respectively.
- Zcm 2 190 pieces Z pieces (0.26 pieces Zcm 2 ), and there were many voids.
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
Claims
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/659,283 US7521334B2 (en) | 2004-11-30 | 2005-11-29 | Method for producing direct bonded wafer and direct bonded wafer |
EP05811712.8A EP1818971B1 (en) | 2004-11-30 | 2005-11-29 | Method for producing direct bonded wafer |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004-346235 | 2004-11-30 | ||
JP2004346235A JP4830290B2 (ja) | 2004-11-30 | 2004-11-30 | 直接接合ウェーハの製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO2006059586A1 true WO2006059586A1 (ja) | 2006-06-08 |
Family
ID=36565020
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP2005/021841 WO2006059586A1 (ja) | 2004-11-30 | 2005-11-29 | 直接接合ウェーハの製造方法及び直接接合ウェーハ |
Country Status (4)
Country | Link |
---|---|
US (1) | US7521334B2 (ja) |
EP (1) | EP1818971B1 (ja) |
JP (1) | JP4830290B2 (ja) |
WO (1) | WO2006059586A1 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2008182192A (ja) * | 2006-12-26 | 2008-08-07 | Sumco Corp | 貼り合わせウェーハの製造方法 |
DE112007003685T5 (de) | 2007-11-23 | 2010-12-23 | S.O.I.Tec Silicon On Insulator Technologies | Präzises Lösen von Oxid |
USRE43694E1 (en) | 2000-04-28 | 2012-10-02 | Sharp Kabushiki Kaisha | Stamping tool, casting mold and methods for structuring a surface of a work piece |
US8465160B2 (en) | 2008-12-25 | 2013-06-18 | Sharp Kabushiki Kaisha | Liquid tank, viewing device for under-liquid observation, and optical film |
Families Citing this family (273)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100938866B1 (ko) * | 2004-02-25 | 2010-01-27 | 에스.오.아이. 테크 실리콘 온 인슐레이터 테크놀로지스 | 광검출장치 |
JP2008060355A (ja) * | 2006-08-31 | 2008-03-13 | Sumco Corp | 貼り合わせウェーハの製造方法および貼り合わせウェーハ |
JP2008072049A (ja) * | 2006-09-15 | 2008-03-27 | Sumco Corp | 貼り合わせウェーハの製造方法 |
JP2008177530A (ja) * | 2006-12-21 | 2008-07-31 | Covalent Materials Corp | 半導体基板およびその製造方法 |
DE602006017906D1 (de) * | 2006-12-26 | 2010-12-09 | Soitec Silicon On Insulator | Verfahren zum herstellen einer halbleiter-auf-isolator-struktur |
US7939387B2 (en) | 2007-03-19 | 2011-05-10 | S.O.I.Tec Silicon On Insulator Technologies | Patterned thin SOI |
JP2008235776A (ja) * | 2007-03-23 | 2008-10-02 | Sumco Corp | 貼り合わせウェーハの製造方法 |
EP1986229A1 (en) * | 2007-04-27 | 2008-10-29 | S.O.I.T.E.C. Silicon on Insulator Technologies | Method for manufacturing compound material wafer and corresponding compound material wafer |
JP2009176860A (ja) * | 2008-01-23 | 2009-08-06 | Sumco Corp | 貼り合わせウェーハの製造方法 |
JP5040682B2 (ja) * | 2008-01-28 | 2012-10-03 | 信越半導体株式会社 | 直接接合ウェーハの検査方法 |
JP5572914B2 (ja) * | 2008-03-26 | 2014-08-20 | 信越半導体株式会社 | 直接接合ウェーハの製造方法 |
JP5493345B2 (ja) | 2008-12-11 | 2014-05-14 | 信越半導体株式会社 | Soiウェーハの製造方法 |
US9394608B2 (en) | 2009-04-06 | 2016-07-19 | Asm America, Inc. | Semiconductor processing reactor and components thereof |
US8802201B2 (en) | 2009-08-14 | 2014-08-12 | Asm America, Inc. | Systems and methods for thin-film deposition of metal oxides using excited nitrogen-oxygen species |
JP5549167B2 (ja) * | 2009-09-18 | 2014-07-16 | 住友電気工業株式会社 | Sawデバイス |
WO2011034136A1 (ja) * | 2009-09-18 | 2011-03-24 | 住友電気工業株式会社 | 基板、基板の製造方法、sawデバイスおよびデバイス |
WO2012033125A1 (ja) | 2010-09-07 | 2012-03-15 | 住友電気工業株式会社 | 基板、基板の製造方法およびsawデバイス |
FR2972564B1 (fr) | 2011-03-08 | 2016-11-04 | S O I Tec Silicon On Insulator Tech | Procédé de traitement d'une structure de type semi-conducteur sur isolant |
US20130023129A1 (en) | 2011-07-20 | 2013-01-24 | Asm America, Inc. | Pressure transmitter for a semiconductor processing environment |
US9017481B1 (en) | 2011-10-28 | 2015-04-28 | Asm America, Inc. | Process feed management for semiconductor substrate processing |
US10714315B2 (en) | 2012-10-12 | 2020-07-14 | Asm Ip Holdings B.V. | Semiconductor reaction chamber showerhead |
US20160376700A1 (en) | 2013-02-01 | 2016-12-29 | Asm Ip Holding B.V. | System for treatment of deposition reactor |
US11015245B2 (en) | 2014-03-19 | 2021-05-25 | Asm Ip Holding B.V. | Gas-phase reactor and system having exhaust plenum and components thereof |
US10858737B2 (en) | 2014-07-28 | 2020-12-08 | Asm Ip Holding B.V. | Showerhead assembly and components thereof |
US9299600B2 (en) * | 2014-07-28 | 2016-03-29 | United Microelectronics Corp. | Method for repairing an oxide layer and method for manufacturing a semiconductor structure applying the same |
US9890456B2 (en) | 2014-08-21 | 2018-02-13 | Asm Ip Holding B.V. | Method and system for in situ formation of gas-phase compounds |
US10941490B2 (en) | 2014-10-07 | 2021-03-09 | Asm Ip Holding B.V. | Multiple temperature range susceptor, assembly, reactor and system including the susceptor, and methods of using the same |
US10276355B2 (en) | 2015-03-12 | 2019-04-30 | Asm Ip Holding B.V. | Multi-zone reactor, system including the reactor, and method of using the same |
US10458018B2 (en) | 2015-06-26 | 2019-10-29 | Asm Ip Holding B.V. | Structures including metal carbide material, devices including the structures, and methods of forming same |
US10211308B2 (en) | 2015-10-21 | 2019-02-19 | Asm Ip Holding B.V. | NbMC layers |
US11139308B2 (en) | 2015-12-29 | 2021-10-05 | Asm Ip Holding B.V. | Atomic layer deposition of III-V compounds to form V-NAND devices |
US10529554B2 (en) | 2016-02-19 | 2020-01-07 | Asm Ip Holding B.V. | Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches |
US10026642B2 (en) | 2016-03-07 | 2018-07-17 | Sunedison Semiconductor Limited (Uen201334164H) | Semiconductor on insulator structure comprising a sacrificial layer and method of manufacture thereof |
US10865475B2 (en) | 2016-04-21 | 2020-12-15 | Asm Ip Holding B.V. | Deposition of metal borides and silicides |
US10190213B2 (en) | 2016-04-21 | 2019-01-29 | Asm Ip Holding B.V. | Deposition of metal borides |
US10367080B2 (en) | 2016-05-02 | 2019-07-30 | Asm Ip Holding B.V. | Method of forming a germanium oxynitride film |
US11453943B2 (en) | 2016-05-25 | 2022-09-27 | Asm Ip Holding B.V. | Method for forming carbon-containing silicon/metal oxide or nitride film by ALD using silicon precursor and hydrocarbon precursor |
US10612137B2 (en) | 2016-07-08 | 2020-04-07 | Asm Ip Holdings B.V. | Organic reactants for atomic layer deposition |
US9859151B1 (en) | 2016-07-08 | 2018-01-02 | Asm Ip Holding B.V. | Selective film deposition method to form air gaps |
US9887082B1 (en) | 2016-07-28 | 2018-02-06 | Asm Ip Holding B.V. | Method and apparatus for filling a gap |
KR102532607B1 (ko) | 2016-07-28 | 2023-05-15 | 에이에스엠 아이피 홀딩 비.브이. | 기판 가공 장치 및 그 동작 방법 |
US9812320B1 (en) | 2016-07-28 | 2017-11-07 | Asm Ip Holding B.V. | Method and apparatus for filling a gap |
US10643826B2 (en) | 2016-10-26 | 2020-05-05 | Asm Ip Holdings B.V. | Methods for thermally calibrating reaction chambers |
US11532757B2 (en) | 2016-10-27 | 2022-12-20 | Asm Ip Holding B.V. | Deposition of charge trapping layers |
US10229833B2 (en) | 2016-11-01 | 2019-03-12 | Asm Ip Holding B.V. | Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures |
US10714350B2 (en) | 2016-11-01 | 2020-07-14 | ASM IP Holdings, B.V. | Methods for forming a transition metal niobium nitride film on a substrate by atomic layer deposition and related semiconductor device structures |
KR102546317B1 (ko) | 2016-11-15 | 2023-06-21 | 에이에스엠 아이피 홀딩 비.브이. | 기체 공급 유닛 및 이를 포함하는 기판 처리 장치 |
KR20180068582A (ko) | 2016-12-14 | 2018-06-22 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
US11581186B2 (en) | 2016-12-15 | 2023-02-14 | Asm Ip Holding B.V. | Sequential infiltration synthesis apparatus |
US11447861B2 (en) | 2016-12-15 | 2022-09-20 | Asm Ip Holding B.V. | Sequential infiltration synthesis apparatus and a method of forming a patterned structure |
KR102700194B1 (ko) | 2016-12-19 | 2024-08-28 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
US10269558B2 (en) | 2016-12-22 | 2019-04-23 | Asm Ip Holding B.V. | Method of forming a structure on a substrate |
US10867788B2 (en) | 2016-12-28 | 2020-12-15 | Asm Ip Holding B.V. | Method of forming a structure on a substrate |
US11390950B2 (en) | 2017-01-10 | 2022-07-19 | Asm Ip Holding B.V. | Reactor system and method to reduce residue buildup during a film deposition process |
US10468261B2 (en) | 2017-02-15 | 2019-11-05 | Asm Ip Holding B.V. | Methods for forming a metallic film on a substrate by cyclical deposition and related semiconductor device structures |
US10529563B2 (en) | 2017-03-29 | 2020-01-07 | Asm Ip Holdings B.V. | Method for forming doped metal oxide films on a substrate by cyclical deposition and related semiconductor device structures |
KR102457289B1 (ko) | 2017-04-25 | 2022-10-21 | 에이에스엠 아이피 홀딩 비.브이. | 박막 증착 방법 및 반도체 장치의 제조 방법 |
US10892156B2 (en) | 2017-05-08 | 2021-01-12 | Asm Ip Holding B.V. | Methods for forming a silicon nitride film on a substrate and related semiconductor device structures |
US10770286B2 (en) | 2017-05-08 | 2020-09-08 | Asm Ip Holdings B.V. | Methods for selectively forming a silicon nitride film on a substrate and related semiconductor device structures |
US10886123B2 (en) | 2017-06-02 | 2021-01-05 | Asm Ip Holding B.V. | Methods for forming low temperature semiconductor layers and related semiconductor device structures |
US12040200B2 (en) | 2017-06-20 | 2024-07-16 | Asm Ip Holding B.V. | Semiconductor processing apparatus and methods for calibrating a semiconductor processing apparatus |
US11306395B2 (en) | 2017-06-28 | 2022-04-19 | Asm Ip Holding B.V. | Methods for depositing a transition metal nitride film on a substrate by atomic layer deposition and related deposition apparatus |
KR20190009245A (ko) | 2017-07-18 | 2019-01-28 | 에이에스엠 아이피 홀딩 비.브이. | 반도체 소자 구조물 형성 방법 및 관련된 반도체 소자 구조물 |
US11018002B2 (en) | 2017-07-19 | 2021-05-25 | Asm Ip Holding B.V. | Method for selectively depositing a Group IV semiconductor and related semiconductor device structures |
US10541333B2 (en) | 2017-07-19 | 2020-01-21 | Asm Ip Holding B.V. | Method for depositing a group IV semiconductor and related semiconductor device structures |
US11374112B2 (en) | 2017-07-19 | 2022-06-28 | Asm Ip Holding B.V. | Method for depositing a group IV semiconductor and related semiconductor device structures |
US10590535B2 (en) | 2017-07-26 | 2020-03-17 | Asm Ip Holdings B.V. | Chemical treatment, deposition and/or infiltration apparatus and method for using the same |
US10770336B2 (en) | 2017-08-08 | 2020-09-08 | Asm Ip Holding B.V. | Substrate lift mechanism and reactor including same |
US10692741B2 (en) | 2017-08-08 | 2020-06-23 | Asm Ip Holdings B.V. | Radiation shield |
US11769682B2 (en) | 2017-08-09 | 2023-09-26 | Asm Ip Holding B.V. | Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith |
US11139191B2 (en) | 2017-08-09 | 2021-10-05 | Asm Ip Holding B.V. | Storage apparatus for storing cassettes for substrates and processing apparatus equipped therewith |
US11830730B2 (en) | 2017-08-29 | 2023-11-28 | Asm Ip Holding B.V. | Layer forming method and apparatus |
US11295980B2 (en) | 2017-08-30 | 2022-04-05 | Asm Ip Holding B.V. | Methods for depositing a molybdenum metal film over a dielectric surface of a substrate by a cyclical deposition process and related semiconductor device structures |
US11056344B2 (en) | 2017-08-30 | 2021-07-06 | Asm Ip Holding B.V. | Layer forming method |
KR102491945B1 (ko) | 2017-08-30 | 2023-01-26 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
KR102401446B1 (ko) | 2017-08-31 | 2022-05-24 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
KR102630301B1 (ko) | 2017-09-21 | 2024-01-29 | 에이에스엠 아이피 홀딩 비.브이. | 침투성 재료의 순차 침투 합성 방법 처리 및 이를 이용하여 형성된 구조물 및 장치 |
US10844484B2 (en) | 2017-09-22 | 2020-11-24 | Asm Ip Holding B.V. | Apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods |
US10658205B2 (en) | 2017-09-28 | 2020-05-19 | Asm Ip Holdings B.V. | Chemical dispensing apparatus and methods for dispensing a chemical to a reaction chamber |
US10403504B2 (en) | 2017-10-05 | 2019-09-03 | Asm Ip Holding B.V. | Method for selectively depositing a metallic film on a substrate |
US10923344B2 (en) | 2017-10-30 | 2021-02-16 | Asm Ip Holding B.V. | Methods for forming a semiconductor structure and related semiconductor structures |
US10910262B2 (en) | 2017-11-16 | 2021-02-02 | Asm Ip Holding B.V. | Method of selectively depositing a capping layer structure on a semiconductor device structure |
US11022879B2 (en) | 2017-11-24 | 2021-06-01 | Asm Ip Holding B.V. | Method of forming an enhanced unexposed photoresist layer |
WO2019103613A1 (en) | 2017-11-27 | 2019-05-31 | Asm Ip Holding B.V. | A storage device for storing wafer cassettes for use with a batch furnace |
JP7206265B2 (ja) | 2017-11-27 | 2023-01-17 | エーエスエム アイピー ホールディング ビー.ブイ. | クリーン・ミニエンバイロメントを備える装置 |
US10872771B2 (en) | 2018-01-16 | 2020-12-22 | Asm Ip Holding B. V. | Method for depositing a material film on a substrate within a reaction chamber by a cyclical deposition process and related device structures |
TWI799494B (zh) | 2018-01-19 | 2023-04-21 | 荷蘭商Asm 智慧財產控股公司 | 沈積方法 |
KR102695659B1 (ko) | 2018-01-19 | 2024-08-14 | 에이에스엠 아이피 홀딩 비.브이. | 플라즈마 보조 증착에 의해 갭 충진 층을 증착하는 방법 |
US11018047B2 (en) | 2018-01-25 | 2021-05-25 | Asm Ip Holding B.V. | Hybrid lift pin |
USD880437S1 (en) | 2018-02-01 | 2020-04-07 | Asm Ip Holding B.V. | Gas supply plate for semiconductor manufacturing apparatus |
US11081345B2 (en) | 2018-02-06 | 2021-08-03 | Asm Ip Holding B.V. | Method of post-deposition treatment for silicon oxide film |
US10896820B2 (en) | 2018-02-14 | 2021-01-19 | Asm Ip Holding B.V. | Method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process |
WO2019158960A1 (en) | 2018-02-14 | 2019-08-22 | Asm Ip Holding B.V. | A method for depositing a ruthenium-containing film on a substrate by a cyclical deposition process |
KR102636427B1 (ko) | 2018-02-20 | 2024-02-13 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 방법 및 장치 |
US10975470B2 (en) | 2018-02-23 | 2021-04-13 | Asm Ip Holding B.V. | Apparatus for detecting or monitoring for a chemical precursor in a high temperature environment |
US11473195B2 (en) | 2018-03-01 | 2022-10-18 | Asm Ip Holding B.V. | Semiconductor processing apparatus and a method for processing a substrate |
US11629406B2 (en) | 2018-03-09 | 2023-04-18 | Asm Ip Holding B.V. | Semiconductor processing apparatus comprising one or more pyrometers for measuring a temperature of a substrate during transfer of the substrate |
US11114283B2 (en) | 2018-03-16 | 2021-09-07 | Asm Ip Holding B.V. | Reactor, system including the reactor, and methods of manufacturing and using same |
KR102646467B1 (ko) * | 2018-03-27 | 2024-03-11 | 에이에스엠 아이피 홀딩 비.브이. | 기판 상에 전극을 형성하는 방법 및 전극을 포함하는 반도체 소자 구조 |
US11088002B2 (en) | 2018-03-29 | 2021-08-10 | Asm Ip Holding B.V. | Substrate rack and a substrate processing system and method |
US11230766B2 (en) | 2018-03-29 | 2022-01-25 | Asm Ip Holding B.V. | Substrate processing apparatus and method |
KR102501472B1 (ko) | 2018-03-30 | 2023-02-20 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 방법 |
TWI843623B (zh) | 2018-05-08 | 2024-05-21 | 荷蘭商Asm Ip私人控股有限公司 | 藉由循環沉積製程於基板上沉積氧化物膜之方法及相關裝置結構 |
US12025484B2 (en) | 2018-05-08 | 2024-07-02 | Asm Ip Holding B.V. | Thin film forming method |
TW202349473A (zh) | 2018-05-11 | 2023-12-16 | 荷蘭商Asm Ip私人控股有限公司 | 用於基板上形成摻雜金屬碳化物薄膜之方法及相關半導體元件結構 |
KR102596988B1 (ko) | 2018-05-28 | 2023-10-31 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 방법 및 그에 의해 제조된 장치 |
US11718913B2 (en) | 2018-06-04 | 2023-08-08 | Asm Ip Holding B.V. | Gas distribution system and reactor system including same |
TWI840362B (zh) | 2018-06-04 | 2024-05-01 | 荷蘭商Asm Ip私人控股有限公司 | 水氣降低的晶圓處置腔室 |
US11286562B2 (en) | 2018-06-08 | 2022-03-29 | Asm Ip Holding B.V. | Gas-phase chemical reactor and method of using same |
US10797133B2 (en) | 2018-06-21 | 2020-10-06 | Asm Ip Holding B.V. | Method for depositing a phosphorus doped silicon arsenide film and related semiconductor device structures |
KR102568797B1 (ko) | 2018-06-21 | 2023-08-21 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 시스템 |
US11499222B2 (en) | 2018-06-27 | 2022-11-15 | Asm Ip Holding B.V. | Cyclic deposition methods for forming metal-containing material and films and structures including the metal-containing material |
TW202409324A (zh) | 2018-06-27 | 2024-03-01 | 荷蘭商Asm Ip私人控股有限公司 | 用於形成含金屬材料之循環沉積製程 |
US10612136B2 (en) | 2018-06-29 | 2020-04-07 | ASM IP Holding, B.V. | Temperature-controlled flange and reactor system including same |
KR102686758B1 (ko) | 2018-06-29 | 2024-07-18 | 에이에스엠 아이피 홀딩 비.브이. | 박막 증착 방법 및 반도체 장치의 제조 방법 |
US10388513B1 (en) | 2018-07-03 | 2019-08-20 | Asm Ip Holding B.V. | Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition |
US10755922B2 (en) | 2018-07-03 | 2020-08-25 | Asm Ip Holding B.V. | Method for depositing silicon-free carbon-containing film as gap-fill layer by pulse plasma-assisted deposition |
US10767789B2 (en) | 2018-07-16 | 2020-09-08 | Asm Ip Holding B.V. | Diaphragm valves, valve components, and methods for forming valve components |
US11053591B2 (en) | 2018-08-06 | 2021-07-06 | Asm Ip Holding B.V. | Multi-port gas injection system and reactor system including same |
US10883175B2 (en) | 2018-08-09 | 2021-01-05 | Asm Ip Holding B.V. | Vertical furnace for processing substrates and a liner for use therein |
US10829852B2 (en) | 2018-08-16 | 2020-11-10 | Asm Ip Holding B.V. | Gas distribution device for a wafer processing apparatus |
US11430674B2 (en) | 2018-08-22 | 2022-08-30 | Asm Ip Holding B.V. | Sensor array, apparatus for dispensing a vapor phase reactant to a reaction chamber and related methods |
US11024523B2 (en) | 2018-09-11 | 2021-06-01 | Asm Ip Holding B.V. | Substrate processing apparatus and method |
TWI728456B (zh) | 2018-09-11 | 2021-05-21 | 荷蘭商Asm Ip私人控股有限公司 | 相對於基板的薄膜沉積方法 |
US11049751B2 (en) | 2018-09-14 | 2021-06-29 | Asm Ip Holding B.V. | Cassette supply system to store and handle cassettes and processing apparatus equipped therewith |
CN110970344A (zh) | 2018-10-01 | 2020-04-07 | Asm Ip控股有限公司 | 衬底保持设备、包含所述设备的系统及其使用方法 |
US11232963B2 (en) | 2018-10-03 | 2022-01-25 | Asm Ip Holding B.V. | Substrate processing apparatus and method |
KR102592699B1 (ko) | 2018-10-08 | 2023-10-23 | 에이에스엠 아이피 홀딩 비.브이. | 기판 지지 유닛 및 이를 포함하는 박막 증착 장치와 기판 처리 장치 |
KR102546322B1 (ko) | 2018-10-19 | 2023-06-21 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 및 기판 처리 방법 |
KR102605121B1 (ko) | 2018-10-19 | 2023-11-23 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 및 기판 처리 방법 |
USD948463S1 (en) | 2018-10-24 | 2022-04-12 | Asm Ip Holding B.V. | Susceptor for semiconductor substrate supporting apparatus |
US11087997B2 (en) | 2018-10-31 | 2021-08-10 | Asm Ip Holding B.V. | Substrate processing apparatus for processing substrates |
KR20200051105A (ko) | 2018-11-02 | 2020-05-13 | 에이에스엠 아이피 홀딩 비.브이. | 기판 지지 유닛 및 이를 포함하는 기판 처리 장치 |
US11572620B2 (en) | 2018-11-06 | 2023-02-07 | Asm Ip Holding B.V. | Methods for selectively depositing an amorphous silicon film on a substrate |
US11031242B2 (en) | 2018-11-07 | 2021-06-08 | Asm Ip Holding B.V. | Methods for depositing a boron doped silicon germanium film |
US10818758B2 (en) | 2018-11-16 | 2020-10-27 | Asm Ip Holding B.V. | Methods for forming a metal silicate film on a substrate in a reaction chamber and related semiconductor device structures |
US10847366B2 (en) | 2018-11-16 | 2020-11-24 | Asm Ip Holding B.V. | Methods for depositing a transition metal chalcogenide film on a substrate by a cyclical deposition process |
US12040199B2 (en) | 2018-11-28 | 2024-07-16 | Asm Ip Holding B.V. | Substrate processing apparatus for processing substrates |
US11217444B2 (en) | 2018-11-30 | 2022-01-04 | Asm Ip Holding B.V. | Method for forming an ultraviolet radiation responsive metal oxide-containing film |
KR102636428B1 (ko) | 2018-12-04 | 2024-02-13 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치를 세정하는 방법 |
US11158513B2 (en) | 2018-12-13 | 2021-10-26 | Asm Ip Holding B.V. | Methods for forming a rhenium-containing film on a substrate by a cyclical deposition process and related semiconductor device structures |
JP7504584B2 (ja) | 2018-12-14 | 2024-06-24 | エーエスエム・アイピー・ホールディング・ベー・フェー | 窒化ガリウムの選択的堆積を用いてデバイス構造体を形成する方法及びそのためのシステム |
TWI819180B (zh) | 2019-01-17 | 2023-10-21 | 荷蘭商Asm 智慧財產控股公司 | 藉由循環沈積製程於基板上形成含過渡金屬膜之方法 |
KR20200091543A (ko) | 2019-01-22 | 2020-07-31 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
CN111524788B (zh) | 2019-02-01 | 2023-11-24 | Asm Ip私人控股有限公司 | 氧化硅的拓扑选择性膜形成的方法 |
TW202044325A (zh) | 2019-02-20 | 2020-12-01 | 荷蘭商Asm Ip私人控股有限公司 | 填充一基板之一表面內所形成的一凹槽的方法、根據其所形成之半導體結構、及半導體處理設備 |
TWI838458B (zh) | 2019-02-20 | 2024-04-11 | 荷蘭商Asm Ip私人控股有限公司 | 用於3d nand應用中之插塞填充沉積之設備及方法 |
KR102626263B1 (ko) | 2019-02-20 | 2024-01-16 | 에이에스엠 아이피 홀딩 비.브이. | 처리 단계를 포함하는 주기적 증착 방법 및 이를 위한 장치 |
TWI845607B (zh) | 2019-02-20 | 2024-06-21 | 荷蘭商Asm Ip私人控股有限公司 | 用來填充形成於基材表面內之凹部的循環沉積方法及設備 |
TWI842826B (zh) | 2019-02-22 | 2024-05-21 | 荷蘭商Asm Ip私人控股有限公司 | 基材處理設備及處理基材之方法 |
KR20200108242A (ko) | 2019-03-08 | 2020-09-17 | 에이에스엠 아이피 홀딩 비.브이. | 실리콘 질화물 층을 선택적으로 증착하는 방법, 및 선택적으로 증착된 실리콘 질화물 층을 포함하는 구조체 |
US11742198B2 (en) | 2019-03-08 | 2023-08-29 | Asm Ip Holding B.V. | Structure including SiOCN layer and method of forming same |
KR20200108243A (ko) | 2019-03-08 | 2020-09-17 | 에이에스엠 아이피 홀딩 비.브이. | SiOC 층을 포함한 구조체 및 이의 형성 방법 |
KR20200116033A (ko) | 2019-03-28 | 2020-10-08 | 에이에스엠 아이피 홀딩 비.브이. | 도어 개방기 및 이를 구비한 기판 처리 장치 |
KR20200116855A (ko) | 2019-04-01 | 2020-10-13 | 에이에스엠 아이피 홀딩 비.브이. | 반도체 소자를 제조하는 방법 |
KR20200123380A (ko) | 2019-04-19 | 2020-10-29 | 에이에스엠 아이피 홀딩 비.브이. | 층 형성 방법 및 장치 |
KR20200125453A (ko) | 2019-04-24 | 2020-11-04 | 에이에스엠 아이피 홀딩 비.브이. | 기상 반응기 시스템 및 이를 사용하는 방법 |
KR20200130121A (ko) | 2019-05-07 | 2020-11-18 | 에이에스엠 아이피 홀딩 비.브이. | 딥 튜브가 있는 화학물질 공급원 용기 |
KR20200130118A (ko) | 2019-05-07 | 2020-11-18 | 에이에스엠 아이피 홀딩 비.브이. | 비정질 탄소 중합체 막을 개질하는 방법 |
KR20200130652A (ko) | 2019-05-10 | 2020-11-19 | 에이에스엠 아이피 홀딩 비.브이. | 표면 상에 재료를 증착하는 방법 및 본 방법에 따라 형성된 구조 |
JP2020188255A (ja) | 2019-05-16 | 2020-11-19 | エーエスエム アイピー ホールディング ビー.ブイ. | ウェハボートハンドリング装置、縦型バッチ炉および方法 |
JP2020188254A (ja) | 2019-05-16 | 2020-11-19 | エーエスエム アイピー ホールディング ビー.ブイ. | ウェハボートハンドリング装置、縦型バッチ炉および方法 |
USD947913S1 (en) | 2019-05-17 | 2022-04-05 | Asm Ip Holding B.V. | Susceptor shaft |
USD975665S1 (en) | 2019-05-17 | 2023-01-17 | Asm Ip Holding B.V. | Susceptor shaft |
USD935572S1 (en) | 2019-05-24 | 2021-11-09 | Asm Ip Holding B.V. | Gas channel plate |
USD922229S1 (en) | 2019-06-05 | 2021-06-15 | Asm Ip Holding B.V. | Device for controlling a temperature of a gas supply unit |
KR20200141002A (ko) | 2019-06-06 | 2020-12-17 | 에이에스엠 아이피 홀딩 비.브이. | 배기 가스 분석을 포함한 기상 반응기 시스템을 사용하는 방법 |
KR20200143254A (ko) | 2019-06-11 | 2020-12-23 | 에이에스엠 아이피 홀딩 비.브이. | 개질 가스를 사용하여 전자 구조를 형성하는 방법, 상기 방법을 수행하기 위한 시스템, 및 상기 방법을 사용하여 형성되는 구조 |
USD944946S1 (en) | 2019-06-14 | 2022-03-01 | Asm Ip Holding B.V. | Shower plate |
USD931978S1 (en) | 2019-06-27 | 2021-09-28 | Asm Ip Holding B.V. | Showerhead vacuum transport |
KR20210005515A (ko) | 2019-07-03 | 2021-01-14 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치용 온도 제어 조립체 및 이를 사용하는 방법 |
JP7499079B2 (ja) | 2019-07-09 | 2024-06-13 | エーエスエム・アイピー・ホールディング・ベー・フェー | 同軸導波管を用いたプラズマ装置、基板処理方法 |
CN112216646A (zh) | 2019-07-10 | 2021-01-12 | Asm Ip私人控股有限公司 | 基板支撑组件及包括其的基板处理装置 |
KR20210010307A (ko) | 2019-07-16 | 2021-01-27 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
KR20210010820A (ko) | 2019-07-17 | 2021-01-28 | 에이에스엠 아이피 홀딩 비.브이. | 실리콘 게르마늄 구조를 형성하는 방법 |
KR20210010816A (ko) | 2019-07-17 | 2021-01-28 | 에이에스엠 아이피 홀딩 비.브이. | 라디칼 보조 점화 플라즈마 시스템 및 방법 |
US11643724B2 (en) | 2019-07-18 | 2023-05-09 | Asm Ip Holding B.V. | Method of forming structures using a neutral beam |
TWI839544B (zh) | 2019-07-19 | 2024-04-21 | 荷蘭商Asm Ip私人控股有限公司 | 形成形貌受控的非晶碳聚合物膜之方法 |
CN112309843A (zh) | 2019-07-29 | 2021-02-02 | Asm Ip私人控股有限公司 | 实现高掺杂剂掺入的选择性沉积方法 |
CN112309900A (zh) | 2019-07-30 | 2021-02-02 | Asm Ip私人控股有限公司 | 基板处理设备 |
CN112309899A (zh) | 2019-07-30 | 2021-02-02 | Asm Ip私人控股有限公司 | 基板处理设备 |
US11227782B2 (en) | 2019-07-31 | 2022-01-18 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
US11587814B2 (en) | 2019-07-31 | 2023-02-21 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
US11587815B2 (en) | 2019-07-31 | 2023-02-21 | Asm Ip Holding B.V. | Vertical batch furnace assembly |
CN118422165A (zh) | 2019-08-05 | 2024-08-02 | Asm Ip私人控股有限公司 | 用于化学源容器的液位传感器 |
USD965524S1 (en) | 2019-08-19 | 2022-10-04 | Asm Ip Holding B.V. | Susceptor support |
USD965044S1 (en) | 2019-08-19 | 2022-09-27 | Asm Ip Holding B.V. | Susceptor shaft |
JP2021031769A (ja) | 2019-08-21 | 2021-03-01 | エーエスエム アイピー ホールディング ビー.ブイ. | 成膜原料混合ガス生成装置及び成膜装置 |
USD940837S1 (en) | 2019-08-22 | 2022-01-11 | Asm Ip Holding B.V. | Electrode |
USD930782S1 (en) | 2019-08-22 | 2021-09-14 | Asm Ip Holding B.V. | Gas distributor |
USD979506S1 (en) | 2019-08-22 | 2023-02-28 | Asm Ip Holding B.V. | Insulator |
USD949319S1 (en) | 2019-08-22 | 2022-04-19 | Asm Ip Holding B.V. | Exhaust duct |
KR20210024423A (ko) | 2019-08-22 | 2021-03-05 | 에이에스엠 아이피 홀딩 비.브이. | 홀을 구비한 구조체를 형성하기 위한 방법 |
US11286558B2 (en) | 2019-08-23 | 2022-03-29 | Asm Ip Holding B.V. | Methods for depositing a molybdenum nitride film on a surface of a substrate by a cyclical deposition process and related semiconductor device structures including a molybdenum nitride film |
KR20210024420A (ko) | 2019-08-23 | 2021-03-05 | 에이에스엠 아이피 홀딩 비.브이. | 비스(디에틸아미노)실란을 사용하여 peald에 의해 개선된 품질을 갖는 실리콘 산화물 막을 증착하기 위한 방법 |
KR20210029090A (ko) | 2019-09-04 | 2021-03-15 | 에이에스엠 아이피 홀딩 비.브이. | 희생 캡핑 층을 이용한 선택적 증착 방법 |
KR20210029663A (ko) | 2019-09-05 | 2021-03-16 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
US11562901B2 (en) | 2019-09-25 | 2023-01-24 | Asm Ip Holding B.V. | Substrate processing method |
CN112593212B (zh) | 2019-10-02 | 2023-12-22 | Asm Ip私人控股有限公司 | 通过循环等离子体增强沉积工艺形成拓扑选择性氧化硅膜的方法 |
CN112635282A (zh) | 2019-10-08 | 2021-04-09 | Asm Ip私人控股有限公司 | 具有连接板的基板处理装置、基板处理方法 |
KR20210042810A (ko) | 2019-10-08 | 2021-04-20 | 에이에스엠 아이피 홀딩 비.브이. | 활성 종을 이용하기 위한 가스 분배 어셈블리를 포함한 반응기 시스템 및 이를 사용하는 방법 |
KR20210043460A (ko) | 2019-10-10 | 2021-04-21 | 에이에스엠 아이피 홀딩 비.브이. | 포토레지스트 하부층을 형성하기 위한 방법 및 이를 포함한 구조체 |
US12009241B2 (en) | 2019-10-14 | 2024-06-11 | Asm Ip Holding B.V. | Vertical batch furnace assembly with detector to detect cassette |
TWI834919B (zh) | 2019-10-16 | 2024-03-11 | 荷蘭商Asm Ip私人控股有限公司 | 氧化矽之拓撲選擇性膜形成之方法 |
US11637014B2 (en) | 2019-10-17 | 2023-04-25 | Asm Ip Holding B.V. | Methods for selective deposition of doped semiconductor material |
KR20210047808A (ko) | 2019-10-21 | 2021-04-30 | 에이에스엠 아이피 홀딩 비.브이. | 막을 선택적으로 에칭하기 위한 장치 및 방법 |
KR20210050453A (ko) | 2019-10-25 | 2021-05-07 | 에이에스엠 아이피 홀딩 비.브이. | 기판 표면 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조 |
US11646205B2 (en) | 2019-10-29 | 2023-05-09 | Asm Ip Holding B.V. | Methods of selectively forming n-type doped material on a surface, systems for selectively forming n-type doped material, and structures formed using same |
KR20210054983A (ko) | 2019-11-05 | 2021-05-14 | 에이에스엠 아이피 홀딩 비.브이. | 도핑된 반도체 층을 갖는 구조체 및 이를 형성하기 위한 방법 및 시스템 |
US11501968B2 (en) | 2019-11-15 | 2022-11-15 | Asm Ip Holding B.V. | Method for providing a semiconductor device with silicon filled gaps |
KR20210062561A (ko) | 2019-11-20 | 2021-05-31 | 에이에스엠 아이피 홀딩 비.브이. | 기판의 표면 상에 탄소 함유 물질을 증착하는 방법, 상기 방법을 사용하여 형성된 구조물, 및 상기 구조물을 형성하기 위한 시스템 |
KR20210065848A (ko) | 2019-11-26 | 2021-06-04 | 에이에스엠 아이피 홀딩 비.브이. | 제1 유전체 표면과 제2 금속성 표면을 포함한 기판 상에 타겟 막을 선택적으로 형성하기 위한 방법 |
CN112951697A (zh) | 2019-11-26 | 2021-06-11 | Asm Ip私人控股有限公司 | 基板处理设备 |
CN112885692A (zh) | 2019-11-29 | 2021-06-01 | Asm Ip私人控股有限公司 | 基板处理设备 |
CN112885693A (zh) | 2019-11-29 | 2021-06-01 | Asm Ip私人控股有限公司 | 基板处理设备 |
JP7527928B2 (ja) | 2019-12-02 | 2024-08-05 | エーエスエム・アイピー・ホールディング・ベー・フェー | 基板処理装置、基板処理方法 |
KR20210070898A (ko) | 2019-12-04 | 2021-06-15 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치 |
TW202125596A (zh) | 2019-12-17 | 2021-07-01 | 荷蘭商Asm Ip私人控股有限公司 | 形成氮化釩層之方法以及包括該氮化釩層之結構 |
KR20210080214A (ko) | 2019-12-19 | 2021-06-30 | 에이에스엠 아이피 홀딩 비.브이. | 기판 상의 갭 피처를 충진하는 방법 및 이와 관련된 반도체 소자 구조 |
JP2021111783A (ja) | 2020-01-06 | 2021-08-02 | エーエスエム・アイピー・ホールディング・ベー・フェー | チャネル付きリフトピン |
TW202140135A (zh) | 2020-01-06 | 2021-11-01 | 荷蘭商Asm Ip私人控股有限公司 | 氣體供應總成以及閥板總成 |
US11993847B2 (en) | 2020-01-08 | 2024-05-28 | Asm Ip Holding B.V. | Injector |
KR102675856B1 (ko) | 2020-01-20 | 2024-06-17 | 에이에스엠 아이피 홀딩 비.브이. | 박막 형성 방법 및 박막 표면 개질 방법 |
TW202130846A (zh) | 2020-02-03 | 2021-08-16 | 荷蘭商Asm Ip私人控股有限公司 | 形成包括釩或銦層的結構之方法 |
TW202146882A (zh) | 2020-02-04 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | 驗證一物品之方法、用於驗證一物品之設備、及用於驗證一反應室之系統 |
US11776846B2 (en) | 2020-02-07 | 2023-10-03 | Asm Ip Holding B.V. | Methods for depositing gap filling fluids and related systems and devices |
US11781243B2 (en) | 2020-02-17 | 2023-10-10 | Asm Ip Holding B.V. | Method for depositing low temperature phosphorous-doped silicon |
TW202203344A (zh) | 2020-02-28 | 2022-01-16 | 荷蘭商Asm Ip控股公司 | 專用於零件清潔的系統 |
KR20210116240A (ko) | 2020-03-11 | 2021-09-27 | 에이에스엠 아이피 홀딩 비.브이. | 조절성 접합부를 갖는 기판 핸들링 장치 |
KR20210116249A (ko) | 2020-03-11 | 2021-09-27 | 에이에스엠 아이피 홀딩 비.브이. | 록아웃 태그아웃 어셈블리 및 시스템 그리고 이의 사용 방법 |
CN113394086A (zh) | 2020-03-12 | 2021-09-14 | Asm Ip私人控股有限公司 | 用于制造具有目标拓扑轮廓的层结构的方法 |
KR20210124042A (ko) | 2020-04-02 | 2021-10-14 | 에이에스엠 아이피 홀딩 비.브이. | 박막 형성 방법 |
TW202146689A (zh) | 2020-04-03 | 2021-12-16 | 荷蘭商Asm Ip控股公司 | 阻障層形成方法及半導體裝置的製造方法 |
TW202145344A (zh) | 2020-04-08 | 2021-12-01 | 荷蘭商Asm Ip私人控股有限公司 | 用於選擇性蝕刻氧化矽膜之設備及方法 |
KR20210128343A (ko) | 2020-04-15 | 2021-10-26 | 에이에스엠 아이피 홀딩 비.브이. | 크롬 나이트라이드 층을 형성하는 방법 및 크롬 나이트라이드 층을 포함하는 구조 |
US11821078B2 (en) | 2020-04-15 | 2023-11-21 | Asm Ip Holding B.V. | Method for forming precoat film and method for forming silicon-containing film |
US11996289B2 (en) | 2020-04-16 | 2024-05-28 | Asm Ip Holding B.V. | Methods of forming structures including silicon germanium and silicon layers, devices formed using the methods, and systems for performing the methods |
TW202146831A (zh) | 2020-04-24 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | 垂直批式熔爐總成、及用於冷卻垂直批式熔爐之方法 |
KR20210132576A (ko) | 2020-04-24 | 2021-11-04 | 에이에스엠 아이피 홀딩 비.브이. | 바나듐 나이트라이드 함유 층을 형성하는 방법 및 이를 포함하는 구조 |
KR20210132600A (ko) | 2020-04-24 | 2021-11-04 | 에이에스엠 아이피 홀딩 비.브이. | 바나듐, 질소 및 추가 원소를 포함한 층을 증착하기 위한 방법 및 시스템 |
KR20210134226A (ko) | 2020-04-29 | 2021-11-09 | 에이에스엠 아이피 홀딩 비.브이. | 고체 소스 전구체 용기 |
KR20210134869A (ko) | 2020-05-01 | 2021-11-11 | 에이에스엠 아이피 홀딩 비.브이. | Foup 핸들러를 이용한 foup의 빠른 교환 |
JP2021177545A (ja) | 2020-05-04 | 2021-11-11 | エーエスエム・アイピー・ホールディング・ベー・フェー | 基板を処理するための基板処理システム |
KR20210141379A (ko) | 2020-05-13 | 2021-11-23 | 에이에스엠 아이피 홀딩 비.브이. | 반응기 시스템용 레이저 정렬 고정구 |
TW202146699A (zh) | 2020-05-15 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | 形成矽鍺層之方法、半導體結構、半導體裝置、形成沉積層之方法、及沉積系統 |
TW202147383A (zh) | 2020-05-19 | 2021-12-16 | 荷蘭商Asm Ip私人控股有限公司 | 基材處理設備 |
KR20210145078A (ko) | 2020-05-21 | 2021-12-01 | 에이에스엠 아이피 홀딩 비.브이. | 다수의 탄소 층을 포함한 구조체 및 이를 형성하고 사용하는 방법 |
TW202200837A (zh) | 2020-05-22 | 2022-01-01 | 荷蘭商Asm Ip私人控股有限公司 | 用於在基材上形成薄膜之反應系統 |
TW202201602A (zh) | 2020-05-29 | 2022-01-01 | 荷蘭商Asm Ip私人控股有限公司 | 基板處理方法 |
TW202218133A (zh) | 2020-06-24 | 2022-05-01 | 荷蘭商Asm Ip私人控股有限公司 | 形成含矽層之方法 |
TW202217953A (zh) | 2020-06-30 | 2022-05-01 | 荷蘭商Asm Ip私人控股有限公司 | 基板處理方法 |
TW202202649A (zh) | 2020-07-08 | 2022-01-16 | 荷蘭商Asm Ip私人控股有限公司 | 基板處理方法 |
KR20220010438A (ko) | 2020-07-17 | 2022-01-25 | 에이에스엠 아이피 홀딩 비.브이. | 포토리소그래피에 사용하기 위한 구조체 및 방법 |
TW202204662A (zh) | 2020-07-20 | 2022-02-01 | 荷蘭商Asm Ip私人控股有限公司 | 用於沉積鉬層之方法及系統 |
US12040177B2 (en) | 2020-08-18 | 2024-07-16 | Asm Ip Holding B.V. | Methods for forming a laminate film by cyclical plasma-enhanced deposition processes |
KR20220027026A (ko) | 2020-08-26 | 2022-03-07 | 에이에스엠 아이피 홀딩 비.브이. | 금속 실리콘 산화물 및 금속 실리콘 산질화물 층을 형성하기 위한 방법 및 시스템 |
TW202229601A (zh) | 2020-08-27 | 2022-08-01 | 荷蘭商Asm Ip私人控股有限公司 | 形成圖案化結構的方法、操控機械特性的方法、裝置結構、及基板處理系統 |
USD990534S1 (en) | 2020-09-11 | 2023-06-27 | Asm Ip Holding B.V. | Weighted lift pin |
USD1012873S1 (en) | 2020-09-24 | 2024-01-30 | Asm Ip Holding B.V. | Electrode for semiconductor processing apparatus |
US12009224B2 (en) | 2020-09-29 | 2024-06-11 | Asm Ip Holding B.V. | Apparatus and method for etching metal nitrides |
CN114293174A (zh) | 2020-10-07 | 2022-04-08 | Asm Ip私人控股有限公司 | 气体供应单元和包括气体供应单元的衬底处理设备 |
TW202229613A (zh) | 2020-10-14 | 2022-08-01 | 荷蘭商Asm Ip私人控股有限公司 | 於階梯式結構上沉積材料的方法 |
TW202217037A (zh) | 2020-10-22 | 2022-05-01 | 荷蘭商Asm Ip私人控股有限公司 | 沉積釩金屬的方法、結構、裝置及沉積總成 |
TW202223136A (zh) | 2020-10-28 | 2022-06-16 | 荷蘭商Asm Ip私人控股有限公司 | 用於在基板上形成層之方法、及半導體處理系統 |
TW202235649A (zh) | 2020-11-24 | 2022-09-16 | 荷蘭商Asm Ip私人控股有限公司 | 填充間隙之方法與相關之系統及裝置 |
KR20220076343A (ko) | 2020-11-30 | 2022-06-08 | 에이에스엠 아이피 홀딩 비.브이. | 기판 처리 장치의 반응 챔버 내에 배열되도록 구성된 인젝터 |
US11946137B2 (en) | 2020-12-16 | 2024-04-02 | Asm Ip Holding B.V. | Runout and wobble measurement fixtures |
TW202231903A (zh) | 2020-12-22 | 2022-08-16 | 荷蘭商Asm Ip私人控股有限公司 | 過渡金屬沉積方法、過渡金屬層、用於沉積過渡金屬於基板上的沉積總成 |
USD980813S1 (en) | 2021-05-11 | 2023-03-14 | Asm Ip Holding B.V. | Gas flow control plate for substrate processing apparatus |
USD980814S1 (en) | 2021-05-11 | 2023-03-14 | Asm Ip Holding B.V. | Gas distributor for substrate processing apparatus |
USD1023959S1 (en) | 2021-05-11 | 2024-04-23 | Asm Ip Holding B.V. | Electrode for substrate processing apparatus |
USD981973S1 (en) | 2021-05-11 | 2023-03-28 | Asm Ip Holding B.V. | Reactor wall for substrate processing apparatus |
USD990441S1 (en) | 2021-09-07 | 2023-06-27 | Asm Ip Holding B.V. | Gas flow control plate |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0590117A (ja) * | 1991-09-27 | 1993-04-09 | Toshiba Corp | 単結晶薄膜半導体装置 |
JPH088413A (ja) * | 1994-06-17 | 1996-01-12 | Shin Etsu Handotai Co Ltd | 半導体基板の製造方法 |
JPH09232197A (ja) * | 1996-02-27 | 1997-09-05 | Sumitomo Sitix Corp | 貼り合わせ半導体ウエーハの製造方法 |
JP2000036445A (ja) * | 1998-07-21 | 2000-02-02 | Sumitomo Metal Ind Ltd | 貼り合わせ半導体基板及びその製造方法 |
JP2004221198A (ja) * | 2003-01-10 | 2004-08-05 | Shin Etsu Handotai Co Ltd | Soiウエーハの製造方法及びsoiウエーハ |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4939101A (en) * | 1988-09-06 | 1990-07-03 | General Electric Company | Method of making direct bonded wafers having a void free interface |
JPH0795505B2 (ja) * | 1990-02-28 | 1995-10-11 | 信越半導体株式会社 | 接合ウエーハの製造方法 |
JP3911901B2 (ja) * | 1999-04-09 | 2007-05-09 | 信越半導体株式会社 | Soiウエーハおよびsoiウエーハの製造方法 |
FR2903808B1 (fr) * | 2006-07-11 | 2008-11-28 | Soitec Silicon On Insulator | Procede de collage direct de deux substrats utilises en electronique, optique ou opto-electronique |
-
2004
- 2004-11-30 JP JP2004346235A patent/JP4830290B2/ja active Active
-
2005
- 2005-11-29 WO PCT/JP2005/021841 patent/WO2006059586A1/ja active Application Filing
- 2005-11-29 US US11/659,283 patent/US7521334B2/en active Active
- 2005-11-29 EP EP05811712.8A patent/EP1818971B1/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0590117A (ja) * | 1991-09-27 | 1993-04-09 | Toshiba Corp | 単結晶薄膜半導体装置 |
JPH088413A (ja) * | 1994-06-17 | 1996-01-12 | Shin Etsu Handotai Co Ltd | 半導体基板の製造方法 |
JPH09232197A (ja) * | 1996-02-27 | 1997-09-05 | Sumitomo Sitix Corp | 貼り合わせ半導体ウエーハの製造方法 |
JP2000036445A (ja) * | 1998-07-21 | 2000-02-02 | Sumitomo Metal Ind Ltd | 貼り合わせ半導体基板及びその製造方法 |
JP2004221198A (ja) * | 2003-01-10 | 2004-08-05 | Shin Etsu Handotai Co Ltd | Soiウエーハの製造方法及びsoiウエーハ |
Non-Patent Citations (1)
Title |
---|
See also references of EP1818971A4 * |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
USRE43694E1 (en) | 2000-04-28 | 2012-10-02 | Sharp Kabushiki Kaisha | Stamping tool, casting mold and methods for structuring a surface of a work piece |
USRE44830E1 (en) | 2000-04-28 | 2014-04-08 | Sharp Kabushiki Kaisha | Stamping tool, casting mold and methods for structuring a surface of a work piece |
USRE46606E1 (en) | 2000-04-28 | 2017-11-14 | Sharp Kabushiki Kaisha | Stamping tool, casting mold and methods for structuring a surface of a work piece |
JP2008182192A (ja) * | 2006-12-26 | 2008-08-07 | Sumco Corp | 貼り合わせウェーハの製造方法 |
US7767549B2 (en) | 2006-12-26 | 2010-08-03 | Sumco Corporation | Method of manufacturing bonded wafer |
DE112007003685T5 (de) | 2007-11-23 | 2010-12-23 | S.O.I.Tec Silicon On Insulator Technologies | Präzises Lösen von Oxid |
US8465160B2 (en) | 2008-12-25 | 2013-06-18 | Sharp Kabushiki Kaisha | Liquid tank, viewing device for under-liquid observation, and optical film |
Also Published As
Publication number | Publication date |
---|---|
EP1818971B1 (en) | 2016-04-27 |
US7521334B2 (en) | 2009-04-21 |
EP1818971A1 (en) | 2007-08-15 |
JP4830290B2 (ja) | 2011-12-07 |
EP1818971A4 (en) | 2008-01-23 |
JP2006156770A (ja) | 2006-06-15 |
US20080102603A1 (en) | 2008-05-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
WO2006059586A1 (ja) | 直接接合ウェーハの製造方法及び直接接合ウェーハ | |
JP3395661B2 (ja) | Soiウエーハの製造方法 | |
JP4331593B2 (ja) | 半導体材料からなるフィルムまたは層およびフィルムまたは層の製造方法 | |
JP5135935B2 (ja) | 貼り合わせウエーハの製造方法 | |
JP4820801B2 (ja) | 貼り合わせウェーハの製造方法 | |
US20160056068A1 (en) | Thin film and method for manufacturing thin film | |
JP4442560B2 (ja) | Soiウエーハの製造方法 | |
JP6443394B2 (ja) | 貼り合わせsoiウェーハの製造方法 | |
JP2009212402A (ja) | 貼り合わせウェーハの製造方法 | |
WO2007125771A1 (ja) | Soiウエーハの製造方法 | |
TW200816368A (en) | Method of producing simox wafer | |
JP2003347176A (ja) | 貼り合わせウェーハの製造方法 | |
JP5518205B2 (ja) | 結晶シリコンの少なくとも一つの極薄層を含む多層膜を製造する方法 | |
JP5493343B2 (ja) | 貼り合わせウェーハの製造方法 | |
JP5493345B2 (ja) | Soiウェーハの製造方法 | |
JP2006165061A (ja) | Soiウェーハの製造方法 | |
WO2012081164A1 (ja) | 貼り合わせsoiウエーハの製造方法 | |
JP5703920B2 (ja) | 貼り合わせウェーハの製造方法 | |
JP2016082093A (ja) | 貼り合わせウェーハの製造方法 | |
JP2010129839A (ja) | 貼り合わせウェーハの製造方法 | |
JP2008262992A (ja) | 貼り合わせウエーハの製造方法 | |
JP5572914B2 (ja) | 直接接合ウェーハの製造方法 | |
JP7251419B2 (ja) | 貼り合わせsoiウェーハの製造方法 | |
WO2017072994A1 (ja) | 貼り合わせsoiウェーハの製造方法 | |
JP2019110225A (ja) | 貼合せウェーハの製造方法および貼合せウェーハ |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): AE AG AL AM AT AU AZ BA BB BG BR BW BY BZ CA CH CN CO CR CU CZ DE DK DM DZ EC EE EG ES FI GB GD GE GH GM HR HU ID IL IN IS KE KG KM KN KP KR KZ LC LK LR LS LT LU LV LY MA MD MG MK MN MW MX MZ NA NG NI NO NZ OM PG PH PL PT RO RU SC SD SE SG SK SL SM SY TJ TM TN TR TT TZ UA UG US UZ VC VN YU ZA ZM ZW |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): BW GH GM KE LS MW MZ NA SD SL SZ TZ UG ZM ZW AM AZ BY KG KZ MD RU TJ TM AT BE BG CH CY CZ DE DK EE ES FI FR GB GR HU IE IS IT LT LU LV MC NL PL PT RO SE SI SK TR BF BJ CF CG CI CM GA GN GQ GW ML MR NE SN TD TG |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWE | Wipo information: entry into national phase |
Ref document number: 11659283 Country of ref document: US |
|
WWE | Wipo information: entry into national phase |
Ref document number: 2005811712 Country of ref document: EP |
|
NENP | Non-entry into the national phase |
Ref country code: DE |
|
WWP | Wipo information: published in national office |
Ref document number: 2005811712 Country of ref document: EP |
|
WWP | Wipo information: published in national office |
Ref document number: 11659283 Country of ref document: US |