TWI359459B - Low wet etch rate silicon nitride film - Google Patents

Low wet etch rate silicon nitride film Download PDF

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TWI359459B
TWI359459B TW097149781A TW97149781A TWI359459B TW I359459 B TWI359459 B TW I359459B TW 097149781 A TW097149781 A TW 097149781A TW 97149781 A TW97149781 A TW 97149781A TW I359459 B TWI359459 B TW I359459B
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flow rate
gas
substrate
plasma
ratio
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TW200943419A (en
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Hemant P Mungekar
Jing Wu
Young S Lee
Anchuan Wang
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Applied Materials Inc
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
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1359459 六、發明說明： 【發明所屬之技術領域】 本發明是關於奈米製造技術解決方案，包括用於沉 積、圖案化及處理薄膜與塗層的設備、製程和材料，代 表性實例應用包括（但不以此為限）：半導體與介電材料 和裝置、矽基晶圓、平面顯示器（如TFT)、遮罩和濾光 片、能量轉換與儲存器（如光伏特電池、燃料電池）、固 態照明設備（如LED和OLED)、磁光儲存器、微機電系 統（MEMS)與奈米機電系統（NEMS)、微光學與光電裝 置、建築與汽車玻璃、用於金屬與聚合物箔及封裝的金 屬化系統、和微成型與奈米成型。較特別地，本發明是 關於將薄臈鋪塗於表面。更特別地，本發明是關於利用 化學氣相沉積（CVD)形成高密度薄膜的方法。 【先前技術】 傳統熱CVD製程供應反應氣體至基材表面，在此表面 的熱引發化學反應而成膜。使用電漿源促進化學反應可 改善沉積速率和膜性質。電漿輔助化學氣相沉積（pECVD) 技術藉由施予基材表面附近的反應區射頻（RF)能量而產 生電漿，藉以促使反應氣體激發、解離及離子化。電漿 中的向反應性物種會減低活化化學反應所需的能量。相 較於傳統熱CVD製程，此有效降低了 pECVD製程所需 的基材溫度。降低基材溫度是有益的，因其可減少發生 3 導致製造製程產率降低之擴散或其他質傳作用的機會。 利用高密度電漿（hdp)cvd技術可進一步加以改善， 其申密集電槳在低真空壓力下形成，故電漿物種更具反 應性。HDP-CVD能採用較低的反應氣體分壓，同時維持 问離子濃度。HDP-CVD亦能無關離子化能量而個別控制 加逮能量。除了與圖案化晶圓處理相關的特點外，利用 高密度電漿沉積之膜還有一些材料變化。以HDp_CVD 法礼積之薄膜的密度比其他CVD法高。較密集薄膜展現 更佳的均勻性，並更適合做為蝕刻或研磨终止層。 積體電路製造常用的材料為氮化矽。氮化矽膜一般用 於積體電路前端處理製程的兩種應用包括形成間隔物結 構於精密積體裝置周圍及形成接觸蝕刻終止層（如阻障 層）於前金屬介電層與半導體基材之間。當作為蝕刻終止 層時，在氧化矽蝕刻製程期間，此膜具低溼蝕刻速率 (WER)。 氮化矽膜内存有雜質常常造成高蝕刻速率而減低做為 蝕刻終止的效用。易併入生成之氮化矽膜的雜質為氫。 以傳統熱CVD法形成氮化矽已成功地減少其氫含量至 1〇0/❶以下，然此化學氣相沉積的基材溫度達 700°C-1000°C。高溫會降低、甚至破壞材料性質和先前處 理步驟形成的裝置。 因此，此技藝仍需在低沉積溫度下沉積低WER氮化矽 膜至基材上的方法。 【發明内容】 本發明是關於利用聊-CVD製程，在低沉積溫度下 -積高品質氮化破膜至基材上的方法。在—些實施例 :’平均基材溫度低於或約為6G(rc ;在其他實施例中， 平均基材溫度低於500°C或450°C » 根據本發明之一實施例，利用HDP-CVD製程，沉積 氮切膜至處理腔室内之基材上的方法包含將含氮㈣ 的處理氣體混合物流入處理腔室中’同時維持氮原子流 率與矽原子流率之平均比率為約5〇: t或以上、維 理腔室内的平均壓力為約4〇毫牦耳或以下以及維持平 均基材溫度為約60(TC或以下。高密度電漿由處理氣體產 用X /儿積氮化石夕膜至基材上。在其他實施例中氮 原子流率與矽原子流率之平均比率大於或等於60: i或 90:1，處理腔室内的平均壓力為25毫托耳或以下、15 毫托耳或以下、10毫托耳或以下、或5毫托耳或以下。 處理氣體混合物包括雙原子氮⑽和甲M(sm小然也 可使用二矽烷（si^6)和三矽胺（N(SiH3)3; tsa)、或其他 適合之氣體混合物》本發明製造方法可以大於約5〇〇埃/ 分鐘（A/min)之速率來沉積氮化矽膜，使用氫氟酸溶液 (1%HF水溶液）處理時，沉積膜的溼蝕刻速率小於 5A/min。 相較於傳統HDP溝填沉積製程，本發明之一些實施例 於沉積時施加微小或不施加RF偏壓功率在不同實施例 中’成膜期間的沉積盥瀹射 顇興濺射比率大於或等於50: 1、75: 1 或 100 : 1 〇 i 去，士 lL _ 产 一二實施例中，沉積期間引進氬 氣至處理腔室中，— 促進同岔度電漿形成。氮原子流率 /、風原子流比率維持為 。 1芏15. 2，施加來產生高 狁度電漿的RF功率為5-15瓦/平方公分。 本發明之上述和其他實施例將進一步詳述於後附說明 書和圖式。 【實施方式】 本發明是關於利用高密度電聚CVD錢沉積高品質 氮化矽膜的方法。當二者接觸同樣的蝕刻劑時，高品質 膜的WER比氧化梦低。藉由減少氫含量可獲得低wER。 在不同實施例中，氮化矽膜的氫含量少於1〇%或少於 7% ^根據本發明技術可沉積氫含量少的氮化矽膜同時 於沉積時維持基材溫度呈相當低溫（<6〇〇。〇）。 許多應用受惠利用本發明實施例製得的氮化矽膜，其 具咼密度、低溼（或乾）氧化物蝕刻速率.、高介電常數、 尚光學折射率和其他相關物性。 以先前CVD技術製得之氮化矽膜中的主要雜質為 氫’其通常是處理氣體混合物中的氫氣留下所致。減少 留在氮化矽膜的氫可增加膜密度及提高氧化物蝕刻的氧 化物/氮化物選擇性。換言之，密度增加可提升氮化矽膜 的抗鞋能力一段時間’期間無露出氮化矽的區域遭連續 侵飯。 舉例來說，高密声士 採用電容器來儲二隨機存取記憶體(DRAM)的製造 存貢訊。電容器需有一定量的電容，以 於各更新循環間儲存 θ 電荷。裝置縮小對保持臨限量而言 疋 大挑戰。一雷t ^ . ^ 構涉及製造更高的圓柱，以補 償其在縮小裝置φ α β也丨 、須製作得更薄。此種電容器形狀易 產生側向偏移而降低產率。 金屬連接製作在電容圓柱底下時，此製程稱為電容器 覆位το線（CQB)結構。氮切層可從上面支撐做為稱作實 際無限同之機械增強儲存節點(mesh)的結構。氮化矽 MESH用來防止側向位移。第1圖顯示此製造方法。移 除氧化矽區域108 電容器104未遭溼氧化物蝕刻。 氮化珍層114的银刻速率期遠比氧化石夕區4 108慢，使 氮化物層彳寸以防止溼氧化物蝕刻劑侵姓構成電容器的介 電層。故本發明之方法可用於製造採用第1圖結構的 DRAM裳置。 本發明之方法和技術不限於製造Dram。其也可應用 到其他蝕刻終止層（ESL)，包括置於閘極材料（如多晶矽） 或前金屬介電質（PMD)上的蝕刻終止層。更廣泛地說， 本發明實施例將有益於任何受惠低基材沉積溫度和高抗 氧化物餘刻性的應用》此外，光波導藉由使用高折射率 之密集膜而增大侷限。因所述沉積技術能採取較低基材 溫度’倘若與晶片上電子裝置整合，則特別適合光學應 用。 在實施例中’電漿激發為高密度電漿，其可透過誘導 耦合產生。其他類型的電漿源也可單獨使用或與誘導電 襞結合。使用高密度電漿在選擇處理氣體方面有較大的 彈性。其可使用非常惰性的氣體，例如氮氣做為HDP製 程的氮（N)源，氨氣（NH3)較常做為低密度pecvd製程的 氮源。 在此，高密度電漿製程為電漿CVD製程，其採用電漿 的離子密度達1011離子數/立方公分或以上 '離子化比例 (離子/中性比）達10_4或以上。HDp_CVD製程一般包括同 時沉積及濺射組成'本發明採行之HDP_CVD製程與傳 統適合溝填的HDP-CVD製程略有不同。在一些實施例 中’施加實質微小或不施加偏壓功率来形成高密度氣化 石夕膜如此減射程度比施加顯著偏壓功率以促進濺射的 HDP_CVD製程少。儘管此背離傳統HDP-CVD製程參 數’然滅射與沉積速率#關特徵仍是有幫助的，故此將 定義於後。 高密度電漿沉積和濺射特性的相對結合量視氣體混合 物的氣流流率、施加來維持電漿的源功率大小施加基 材的偏壓功率大小蓉而金士 干八』等而疋。廷些因素可適當量化成「沉
積/藏射比率|，右味圭-I 」^ D/S表不來描述製程特徵。 £ g 2^積速率+毯覆濺射祙率 S 毯覆賤射速率 ’且隨踐射增加而降 是指同時發生沉積及 沉積/濺射比率隨沉積增加而提高 低。在D/S定義中，「淨沉積速率」 濺射時測量的沉積速率。「毯覆濺射速率」是在無沉積氣 體的清况下進行製程配方時測量的藏射速率；處理腔室 内的壓力調整成沉積時的壓力，並測量毯覆熱氧化物上 的濺射速率。 如同熟諳此技藝者所熟知，其他類似測量也可用來定 量HDP製程中沉積及濺射的相對貢獻度。另一常用比例 為「姓刻/沉積比率」。 五-僅有來源之沉積速率-淨沉積速率 D 僅有來源之沉積速率 其隨濺射增加而提高，且隨沉積增加而降低。在e/d 疋義中’「淨沉積速率」是指同時發生沉積及濺射時測量 的沉積速率。「僅有來源之沉積速率」是指無濺射的情況 下進行製程配方時測量的沉積速率。本發明實施例在此 是採用D/S比率。雖然D/S和E/D並非恰為倒數，但熟 諸此技藝者當理解二者具反轉關係。 典型的HDP-CVD製程適合進行溝填。在此製程中， 偏壓功率用來加速離子往生成表面前進而形成窄化接近 軌跡。窄化和濺射作用造成部分間隙尚未填充前即封閉 通孔頂部轉角而形成空隙。溝填應用的D/s比率通常為 3-10，一些奇特應用的d/S比率甚至超過25。本發明之 一實施例涉及利用HDP-CVD製程並施加微小或不施加 偏壓功率來形成尚密度氛化梦膜。這些條件下的毯覆賤 射速率很低且難以測量，然D/S比率通常預期會大於約 100 〇 1359459 為助於理解本發明，請參照第2圖，其為根據本發明 一實施例，形成高密度且高抗氧化物蝕刻性之氮化矽膜 的步驟流程圖。這些步驟將詳述於後，在此先概略說明。 如第2圖所示，將基材傳送到由真空幫浦排空的處理腔 至（V驟204)*»在流入氣體前、後或期間（步驟Μ〗、216)， 施加功率至電漿源（步驟2〇8)，並且持續開啟直到停止流 入氣體前、後或期間（步驟226、23〇)。在步驟212中， 輸送前驅氣體和流動氣體（第2圖未繪示）至反應區，以 •形成處理氣體混合物。處理氣體混合物提供氮與矽源， 以形成氮化矽膜至基材上（步驟22〇)β前驅氣體包括含矽 氣體（如甲矽烷（SiH〇)和含氮（Ν)氣體（如氮分子（Ν2))β其 他氣體也可使用。可採用包含石夕減之分子做為一或多 個前驅氣體。 一般而言，矽源和氮源經由不同的輸送通道引入，使 其在反應區或附近混合。流動氣體亦可引用來協助處理 • 氣體混合物的其他組成產生離子物種。例如，氬氣比Ν2 更易被離子化’在-實施例中’其提供電漿電于而促進 Ν2解離及離子化。此作用提高了化學反應的可能性和沉 積速率”*動氣體經由與⑦源或氮源相同或不同的輸送 通道引入。 本發明之實施例維持高氮（Ν)與石夕（Si)原子流比率，藉 以降低氮切料氫濃度。實質上，H原子有助於清^ 避免氫生成於氮化矽網絡。在-實施例中，氣流比率為 25 : 1 至 40 : n . e.tr、 (N2 . SiH4) ’或更廣泛地說’原子流比率 10 為50: 1至80: 1(N: si)時，從刪的直接測量結果和 職的間接測量結果可發現氫含量減少。在不同實施例 中’本發明採用之N2 : SiH4比率為25 : j、3〇 : ι、45 : 1或以上（或相當於N : Si比率為50 : 1、6〇 : i、9〇 : i 或以上），用以減少氫併入。 原子流比率（N : Si)是從各前驅氣體的流率和每一分子 中各原子所佔總數計算而得。在前驅物為％和Si^的 實施例中，每一氮分子包括二個氮原子，每一甲矽烷只 包括一個矽原子。利用質量流量控制器維持氣流比率如 大於30: i時，原子流比率將大於6〇: i。在另一實施 例中，前驅氣體包括至少一含氮與矽之氣體。計算原子 流比率時，所有原子流率的貢獻皆已涵蓋。 除了 N: Si原子流比率外，氫減少尚取決於反應前驅 物的其他性質。氮氣（乂）和三矽胺（N(SiH3)3 ; tsa)是適 合的前驅物，因二分子中的氮(N)未直接與氫原子鍵結。 前驅氣體昇N_H鍵會妨礙氮原子將氫移出生成膜。故氨 氣（NH3)不是適當氮源。含氧之氮源（如n2〇)會將氧併入 網絡而惡化氮化矽膜性質，此亦將提高溼蝕刻速率。 保持反應區呈低壓還有助於維持低氫含量。增加壓力 會縮短平均自由徑，進而改變離子化比例和氣相動力學 及妨礙氫移出氮化石夕網絡。在不同實施财，反應區的 廢力可為40毫托耳或以下' 25毫托耳或以下、15毫托 耳或以下、10毫托耳或以下、或5毫托耳或以下。 在高流率比下維持低壓需使用設有節流閥的大型幫 1359459 浦，節流閥為完全或幾乎完全打開以達到最小wer時的 適當生成速率。幫浦的抽吸能力視腔室體積與結構和氣 流比等因素而定。若本發明用於應用材料公司製造的 UltmaHDP室和300毫米（mm)晶圓，則抽吸速度大於或 等於2800升/秒可造成600埃/分鐘的最佳成膜速率。本 發明實施例採用美國專利證書號7，183,227、名稱為「Use of Enhanced Turbomolecular Pump for Gapfill Deposition
Using High Flows of Low-Mass Fluent Gas」之申請案所 述的抽吸構造，此一併引述於此供作參考。採取較快的 抽吸速度或使WER大於根據本發明實施例最佳化的 值，可獲得較快的生成速率。 在不同實施例中’基材溫度維持為約6〇〇。(：或以下、 5〇〇°C或以下、或45(TC或以下。施加至處理腔室頂部和 側邊的RF功率於反應區產生電漿，其將詳述於後。頂部 RF功率一般小於側邊rf功率，就300mm晶圓來說，總 體RF功率介於4000瓦與10000瓦之間5瓦/平方公 分）。在不同實施例中，總體RF功率為約5-15瓦/平方 公分或約5.5-10瓦/平方公分。在一實施例中，用來加速 離子往晶圓前進的偏壓RF功率為0或近似〇。然在不同 實施例中，若開啟偏壓功率且相較於其他RF功率總和維 持低或最小功率使沉積與濺射比率木於約50、75或 100 ’則本發明實施例的許多優勢仍在。 在本發明之一實施例中，將基材傳送到沉積腔室（步驟 2〇4)。步驟2〇8開始產生電漿而步驟212流入含氮前驅 12 1359459 物。進行步驟208、212後，流入含矽前驅物（步驟216) 及開始成膜（步驟220)。接著在流入含氮前驅物（步騾23〇) 及中止電漿（步驟238)前，停止流入含矽前驅物（步驟 226)。在一些實施例中，樂見停止流入含氮前驅物前先 停止流入含矽前驅物，使得N: Si原子流比率至少維持 像成膜（步驟220)時一樣高。如此維持高N : Si原子流比 率可避免生成製程終了時形成高氫含量和低WER的氮 化碎薄層。樂見在執行特徵描述步驟時僅探測外面數個 單層。若最後數個單層具有不同物性，則塊體性質的推 測可能有誤。又，樂見整個膜保持低溼蝕刻速率，以增 進膜如做為蝕刻終止的利用性。在一實施例中，當存有 含矽前驅物時，確保電槳含有充足的氮可獲得實質均勻 的低溼蝕刻速率。 在另一實施例中，開始產生電漿前先流入氮。同樣地， 在流入含氮前驅物前，中止電漿。流入含氮前驅物及中 止電漿後，將晶圓移出沉積腔室（步驟244)。也可進行第 2圖未繪示的其他步驟，包括流入及終止流入流動氣體 來提高電漿密度，但不以此為限。在又一實施例中，開 始流入惰性物種及增加流量。步驟226與步驟23〇間可 減少氮流量》 熟諳此技藝者所熟知的氫正向散射光譜儀（HFS)和傅 立葉轉換紅外線光譜儀（FTIR)用來定量膜的氫含量。hfs 對低濃度氫的靈敏度相當高。實驗條件列於表j和第3 圖。HFS定量债測測試沉積膜的散射氫（H)，並與得自白 13 1359459 雲母樣品的特徵結果相比。接著以百分比表示氫含量。 多個He + +氦劑用來確保氫濃度於測試期間不會下降。也 可採用傅立葉轉換紅外線光譜儀（FTIR)之傳統技術，但 靈敏度較低。 表I :氫正向散射光譜儀（HFS)的實驗條件 HFS分析條件 He + +離子束能量 2.275MeV 正射偵測器角度 160° 掠射偵測器角度 〜30〇 離子束與樣品法線的夾角 75° 為證實本發明一些實施例的優點，實驗比較根據所述 技術沉積之HDP-CVD氮化矽膜和以PECVD與LPCVD 法沉積之氮化矽膜的WER與氫含量。在裝配300mm基 材的Ultima HDP室内處理基材，氣化石夕膜生成時的抽吸 速度為2800升/秒。HDP-CVD沉積期間的基材溫度維持 為約450°C。施加至頂部和側邊的電漿RF功率為2000 瓦和3 0 0 0瓦。生成期間不施加偏壓功率。石夕烧氣流流率 為40sccm，氮氣流率為1500sccm，氬氣流率為300sccm。 除了直接從HFS測定殘餘氫含量外，還可測定WER 來測量膜的抗化性。分別於氫氟酸（1 % HF水溶液）银刻 前後，測量氮化矽膜的厚度。在25°C下持續進行溼蝕刻 14 丄 製程一段時間後，計篡 π的HnP4p 蝕剡速率。膜的分析結果列於表
Dp攔。先前技術社 旳、-°果列於其他欄以供比較。1〇/〇 (A/min) 0 ”、成氧切的速率為36埃/分鐘 $ II :膜特糌 vs.沉積技術 — HDP ---— _ PECVD LPCVD 基材處理溫磨 450。。 5 5 0〇C 7 ς n°r 1% HF 的 WER 2.1A/分 20-40A/分 1 2 -1 4 A / 公 FTIR t 6j__Si-H 未偵測 偵測 未偵測 hfs 5% 13% 6-9% 第4圖顯示在siH4流率固定為4〇sccm的情況下，隨 A氣流流率變化的溼蝕刻速率。沁氣流流率較低時，溼 银刻速率會先下降’此乃因製程的氮源受限。在此區域 中，添加氮至電漿中能有效移除生成膜的氫。溼蝕刻速 率接著達到最小值，然後因腔室壓力增加而開始上升。 膜製備期間的抽吸速度保持不變。壓力升高時，電漿中 的氣體動力學改變，導致降低氮移除氫的能力。製程顯 示畲N2 : SiH4流率比率為約25 : 1時，WER明顯改善， 流率比率為25 : 1至40 : 1之間達到最小值，然後因抽 吸限制開始上升。 不同抽吸速度會改變WER急遽上升408的位置及改變 15 1359459 WER的最小值418。假設有效抽吸速度從2800升/秒提 高成4000升/秒，則第4圖的WER急遽上升位置將從 50 : 1移到70 : 1附近。此可改善膜生成速率及/或WER。 按一定氣流比率增加氣流流率可提高膜生成速率。同樣 地，按一定矽烷氣流流率增加N2 : SiH4流率比率可降低 WER。 第5圖顯示在N2(1500sccm)和SiH4(40sccm)流率固定 的情況下，隨腔室壓力變化的溼蝕刻速率。藉由改變節 流閥位置，進而改變有效抽吸速度，可改變壓力。隨著 腔室壓力上升，膜品質顯然會降低（溼蝕刻速率提高）， 原因如同第4圖所述。提高抽吸速度可改善膜品質。 示例之基材處理系统 本發明利用位於美國加州聖克拉拉之應用材料公司 (Applied Materials, Inc.)製造的 ULTIMAtm 系統來實踐 本發明實施例，其概.述於共同讓渡之美國專利證書號 6，170,428、名稱「SYMMETRIC TUNABLE INDUCTIVELY COUPLED HDP-CVD REACTOR」、西元 1996 年 7 月 15 曰申請、Fred C. Redeker、Farhad Moghadam、Hirogi Hanawa、Tetsuya Ishikawa、Dan Maydan ' Shijian Li、 Brian Lue、Robert Steger、Yaxin Wang、Manus Wong 和 Ashok Sinha提出之申請案，其全文一併引述於此供作參 考。系統將配合第6A及6B圖概述於下》第6A圖為 HDP-CVD系統610之一實施例的結構示意圖。系統610 包括腔室613、真空系統670、源電漿系統680A、偏壓 16 電聚系統680B、氣體輸送系統633和遠端電漿清潔系統 650 〇 腔室613的上部包括圓頂614,其由陶瓷介電材料構 成’例如氧化銘或氮化鋁。圓頂614界定電漿處理區616 的上邊界。電漿處理區616的底部以基材617之上表面 和基材支撐構件618為界。 加熱板623和冷卻板624裝在圓頂614上且熱耦接圓 頂614。加熱板623和冷卻板624能控制圓頂溫度介於 約1〇0。(：-20〇。〇±1〇。(：之間。如此可最佳化圓頂溫度以進 行不同裝程。例如，樂見清潔或姓刻製程的圓頂溫度大 於沉積製程》準確控制圓頂溫度還能減少腔室内的剝落 薄片或微粒數及改善沉積層與基材間的附著性。 腔室613的下部包括主體構件622，其連結腔室和真 空系統。基材支撐構件618的基部621裝在主體構件622 上，並且一起構成連續的内表面。機械葉片（未繪示）經 由腔室613侧邊的插入/移出開口（未繪示）傳送基材進出 腔室613。舉升銷（未繪示）在馬達（未繪示）的控制下升起 及下降，藉以將機械葉片上的基材從裝載位置657移到 較低處理位置656,在此基材放置到基材支撐構件618 的基材接收部61 9。基材接收部619包括靜電吸座62〇, 以於基材處理期間讓基材固定於基材支撐構件618。在 一較佳實施例中，基材支撐構件618由氧化銘或紹陶究 材料構成。 真空系統670包括用來容納雙葉片節流閥626的節流 17 1359459 主體625,並且連接閘閥627和渦輪分子幫浦628。應注 意節流主體625不會阻礙氣流且容許對稱抽吸。閘閥627 隔開幫浦628和節流主體625,也可藉由限制節流間心 完全打開時的排氣流量來控制腔室壓力。配設節流閥、 閘閥和渦輪分子幫浦可精確及穩定控制腔室壓力高達約 1毫托耳至約2托耳。
源電漿系統680A包括設於圓頂614的頂部線圈629 和側邊線圏630。對稱接地屏蔽（未繪示）可減少線圈間的 電性耦合。頂部線圈629由頂部源射頻（SRF)產生器631八 供電，側邊線圈630由側邊SRF產生器631B供電，如 此各線圈有個別獨立的功率大小和操作頻率。雙線圏系 統可控制腔室613内的徑向離子密度，進而改善電漿均 勻度。側邊線圈630和頂部線圈629 一般為感應驅動， 其不需使用互補電極。在一特定實施例中，頂部源RF 產生器63 1A以額定之2MHz供應高達250〇瓦的rf功 率，側邊源RF產生器631B以額定之2MHz供應高達5〇〇〇 瓦的RF功率。頂部和側邊RF產生器的操作頻率可偏離 額定操作頻率（如分別為1.7-1.9MHz和1.9-2.1MHz)，藉 以改善電漿產生效率。 偏壓電漿系統680B包括偏壓rf(BRF)產生器63 1C和 偏壓匹配網路632C。偏壓電漿系統68〇B電容耦合基材 617和主體構件622,其當作互補電極。偏壓電漿系統 680B用來加強輸送源電漿系統68〇A產生的電漿物種（如 離子）至基材表面。在一特定實施例中，偏壓RF產生器 18 1359459 以小於5MHz之頻率供應高達1 〇〇〇〇瓦的rf功率，此將 進一步說明於後。 RF產生器631A、631B包括數位控制合成器且操作頻 率介於約1.8-2.1 MHz之間。如同熟諳此技藝者所理解， 每一產生器包括RF控制電路（未繪示），用以測量從腔室 和線圈反射回產生器的功率’及調整操作頻率而得最小 反射功率。RF產生器一般設計操作成特徵阻抗為5〇歐 姆的負載。RF功率可從具不同特徵阻抗的負載反射回產 生器。如此可減少傳送到負載的功率。此外，從負載反 射回產生器的功率可能超載而破壞產生器。由於電聚的 阻抗可小於5歐姆至大於900歐姆，此視電漿離子密度 等因素而定，又反射功率為頻率函數，因此依據反射功 率調整產生器頻率可增加從RF產生器傳送到電襞的功 率及保護產生器。另一減少反射功率及提高效率的方式 為利用匹配網路》 匹配網路632A、632B匹配產生器631A、631B之輸出 阻抗和其對應線圈629、630 RF控制電路藉由改變匹配 網路内的電容值來調整二匹配網路，使產生器隨負載變 化而與負載匹配。當從負載反射回產生器的功率超過特 定極限時’RF控制電路可調整匹配網路。提供固定匹配 及有效使RF控制電路失去調整匹配網路之能力的方式 為設定反射功率極限大於任一反射功率預定值。保持匹 配網路固定處於其最新條件有助於在一些條件下穩定電 漿。 19 其他測量亦有助於穩定電漿。例如，RF控制電路可用 來測定傳送到負載（電漿）的功 功率，及提高或降低產生器 輪出功率’以於沉積層期間維持傳送功率實質不變。 虱體輸送系、统633經由氣體輪送管線638(僅繪示部分） 提供來自數源634A-634E的氣體给腔室來處理基材。如 同熟諳此技藝者所熟知’實際用於源634a 634e和實際 連接輸送管線638與腔室613的元件視腔室613所施二 的沉積和清潔製程而卜氣體經由氣環637及/或頂部喷 嘴645引進腔室613。第仙圖為腔室613的簡化局部截 面圖’其繪示氣環637的細部。 在一實施例中，第一與第二氣源634Α、634β和第一 與第一氣流控制器635A’、635B，經由氣體輸送管線 638(僅繪示部分）供應氣體至氣環637的環形氣室636 〇 氣環637設有複數個來源氣體喷嘴639(僅繪示部分以便 於說明），用以提供均勻氣流遍及基材。改變喷嘴長度和 噴嘴角度，可調整個別腔室内的均勻度分佈輪廓和特定 製程的氣體刹用率。在一較佳實施例中，氣環637設有 12個由氧化鋁陶瓷構成的來源氣體喷嘴。 氣環637還設有複數個氧化氣體噴嘴64〇(僅繪示其 一）’在一較佳實施例中，其與來源氣體喷嘴639呈共平 面且比來源氣體喷嘴639短，在一實施例中，其接收來 自主體氣室641的氣體。在一些實施例中，氣體注入腔 室013前’不先混合來源氣體和氧化氣體。在其他實施 例中，氣體注入腔室613前，先利用主體氣室641與氣 20 1359459 環氣室636間的孔洞（未繪示）混合氧化氣體和來源氣 體。在一實施例中，第三、第四與第五氣源634C、634D、 634D’和第三與第四氣流控制器635C、635D，經由氣體輪 送管線638供應氣體至主體氣室。附加閥（如閥643B， 其他閥未繪示）可關閉氣體從控制器流向腔室。在本發明 之一些實施例中’源634A包含甲矽烷（SiH4)源，源634b 包含氮分子（NO源’源634C包含TSA源，源634D包含 氬（Ar)源，源634D，包含二矽烷（Si2H6)源。 在使用易燃、有毒或腐鞋性氣體之實施例中，樂見在 沉積後清除殘留在氣體輸送管線的氣體。達成方式例如 為利用三向閥（如閥643B)來隔開腔室613和輸送管線 638A，及排放輸送管線038A至真空前段管線644。如第 6A圖所示’其他類似閥（如閥643A、643C)可設於其他 氣體輸送管線。三向閥宜盡量設置靠近腔室613，以減 少未排放的氣體輸送管線體積（位於三向閥與腔室之 間）。此外，雙向（開·關）閥（未繪示）可設在流量控制器 (MFC)與腔室之間、或氣源與MFC之間。
再次參照第6A圖，腔室613還設有頂部喷嘴645和頂 部排氣孔646。頂部喷嘴645和頂部排氣孔能個別 控制頂部和側邊的氣流以改善膜的均勻度，及微調膜的 沉積和摻雜參數。頂部排氣孔646為圍繞頂部喷嘴645 的環狀開口。在-實施例中，第—氣源6嫩供給來源氣 體喷嘴639和頂部喷嘴645。來源喷嘴MFC 635,控制輸 送到來源氣體喷嘴639的氣體量，頂部喷嘴MFc 635A 21 控制輸送到頂部喷冑645的氣體量。同樣地’二mfc 635B、635B’用來控制自單一氧氣源（如源034B)流向頂 部排氣孔646和氧化氣體嘴64G的氧氣量。在-些實 施例中’不冑#一側邊喷嘴供給腔室氧氣。#應頂部喷 嘴645和頂部排氣孔646的氣體在流入腔室613前可保 持分開，或者氣體流入腔室613前可先於頂部氣室648 混合。獨立的相同氣源也可用來供給腔室的不同區域。 遠端微波產生電漿清潔系統650用來定期清潔腔室組 件的沉積殘餘物。清潔系統包括遠端微波產生器65 i， 其自清潔氣源634E(如氟分子、三氟化氮、其他碳氟化 合物或均等物）於反應器腔體65 3内產生電漿。電漿產生 的反應物種透過器具管655經由清潔氣體入口 654輸送 到腔室613。用來容納清潔電漿的材料（如腔體653和器 具管655)必須能抵抗電漿侵蝕。反應器腔體653與入口 654間的距離宜盡量短’因電漿物種濃度會隨著遠離反 應器腔體653而降低。在遠端腔體中產生清潔電漿允許 使用高效率微波產生器，且腔室組件不會受溫度、輻射 或電漿中原位形成之輝光放電撞擊的影響。因此，不像 原位電漿清潔製程’如靜電吸座620等較敏感的組件不 需蓋上仿製（dummy)晶圓或以其他方式保護。在第6A圖 中’電漿清潔系統650位於腔室613上方，然也可設在 其他位置。 隔板661設置鄰接頂部喷嘴，用以引導頂部喷嘴供應 的來源氣體流向腔室及引導遠端產生電漿流動。頂部喷 22 1359459 嘴645供應的來源氣體經由中央通道662導向腔室，清 潔氣體入口 654供應的遠端產生電漿物種由隔板661引 至腔室613旁。 熟諳此技藝者將能理解，處理參數會因處理腔室和處 理條件不同而不同，不同前驅物也可使用，此並不悖離 本發明之精神。熟諳此技藝者亦可明白其他變化例。這 些均等例和替代例涵蓋在本發明之保護範圍内。故本發 明之保護範圍不庳以實施例為限，而是視後附之申請專 利範圍所界定者為準》 【圖式簡單說明】 第1圖為部分完成之積體電路的局部截面圖，裝置製 造受益於使用根據本發明一實施例生成的低溼蝕刻速率 (WER)氣化矽膜； 第2圖為根據本發明一實施例，形成高密度且高抗氧 化物钱刻性之氮化矽膜的步驟流程圖； 第3圖為RBS-HFS材料分析系統的示意圖，用於測定 氫含量； 第4圖為根據實施例改變: 8出4氣流比率所形成之 氛化石夕膜的渔姓刻速率曲線圖； 第5圖為根據實施例改變處理腔室壓力所形成之氤化 矽膜的溼蝕刻速率曲線圖； 第6A圖為可施行本發明方法之高密度電漿化學氣相 23 1359459 沉積系統實施例的簡化示意圖； 第6B圖為可用於第6A圖處理系統之氣環的簡化截面 圖。 【主要元件符號說明】
104 電容器 108 氧化物區域 114 204 ' 氮化矽層 208 ' 212 ' 216、220、 226 ' 230 ' 238 ' 244 408 急遽上升 418 最小值 610 HDP-CVD 系統 613 腔室 614 圓頂 616 處理區 617 基材 618 支撐構件 619 接收部 620 靜電吸座 621 基部 622 主體構件 623、 624 板 625 主體 626、 627 、 643A-C 閥 628 幫浦 629 ' 630 線圈 631A-C > 651 產生器 632A-C 匹配網路 633 氣體輸送系統 634A-E、634D’ 源 635A-C、635A’-B，、635D， 控制器 636、 641、648 氣室 637 氣環 638、 638A、644 管線 639、640、645 喷嘴 24 1359459 646 排氣孔 650 清潔 653 腔體 654 入口 655 管 656、 657 661 隔板 662 通道 糸統 位置 680A-B 電漿系統 25

Claims (1)

1359459
七、申請專利範圍： Λ 種利用一问在度電襞化學氣相沉積（HDPCVD)製 程沉積-氮化矽膜至-處理腔室中之一基材上的方法， 該方法包含： 將—包含氮與矽的處理氣體混合物流入該處理腔室 中，同時維持該氮原子流率與該矽原子流率之一平均比 率為約50: i或以上，維持該處理腔室中的一平均壓力 為約40毫托耳或以下，以及維持一平均基材溫度為 6〇〇°C或以下；以及 自該處理氣體混合物形成一高密度電漿以沉積該氮 化^夕膜至該基材上，其中該高密度電漿的離子密度達 1〇離子數/立方公分或以上，且該高密度電漿的離子化 比例達10.1或以上。 2.如申請專利範圍第i項所述之方法，其中該氮原子流 率與該矽原子流率之平均比率為約60 : 1或以上。 3·如申請專利範圍第i項所述之方法，其中該氮原子流 率與該梦原子流率之平均比率為約9〇: 1或以上。 26 1 .如申請專利範圍第1項所述之方法，其中該平均基材 溫度維持在500。(：或以下。 1359459 5. 如申請專利範圍第i項所述之方法，其中該處理腔室 中的該平均壓力為約15毫托耳或以下。 6. 如申請專利範圍第丨項所述之方法，其中使用一氫氟 酸冷液（1 /。HF 溶液）處理沉積之氮化石夕膜的—渔钮刻 速率小於5埃/分鐘（A/min)。 7.如申請專利範圍第i項所述之方法，其中沉積之氣化 矽膜的一生成速率大於約500埃/分鐘（A/min)。 8.如申請專利範圍第i項所述之方法，更包含將氯氣流 入該處理腔室中，以及維持該氮原子流率與該氬原子流 率之一比率為15: 1至15: 2之間。 9.如申請專利範圍第i項所述之方法，其中該高密度電 • E的一 RF功率為5至15瓦/平方公分（基材面積）之間。 Π).如f請專利範圍第i項所述之方法，其中該高密度 電聚的- RF功率為5.5至10瓦/平方公分(基材面積)之 間。 U•如f請專利範圍第i項所述之方法，其中形成該高 密度電裂之步驟於沉積該氛化石夕膜期間不偏壓該電Μ 該基材。 27 1359459 12.如申請專利範圍第1項所述之方法，其中該 HDP-CVD製程的一沉積與濺射比率大於約50 : i。 - 13.如申請專利範圍第1項所述之方法，其中該處理氣 • 體混合物包含雙原子氮（N2)和至少一選自甲矽燒 (SiH4)、二矽烷（Si2ii6)和三矽胺（N(SiH3)3 ; TSA)組成之 群組的氣體。 14·—種利用一高密度電漿化學氣相沉積（HDP-CVD)製 程沉積一氮化矽膜至一處理腔室中之一基材上的方法， 該方法包含： 將具一第一氣流流率之雙原子氮（NO和具一第二氣 流流率之曱矽烷（SiH4)流入該處理腔室中，同時維持該 第一氣流流率與該第二氣流流率之一平均比率為約 _ 25.1或以上，維持該處理腔室中的一平均壓力為約 毫粍耳或以下，以及維持一平均基材溫度為6〇〇,c或以 下；以及 自該處理氣體混合物形成一高密度電漿以沉積該氮 化矽膜至該基材上，其中該高密度電漿的離子密度達 1〇11離子數/立方公分或以上，且該高密度電漿的離子化 比例達1〇-4或以上。 15.如申請專利範圍第丨4項所述之方法，其中該第—氣 28 1359459 I 流流率與該第二氣流流率之平均比率為約3。或以上β 16·如申請專利範圍第14項所述之方法， 流流率與該第二氣流流率之平均比率為約40或以上。 #法，其中該平均基 17·如申請專利範圍第14項所述之 材溫度維持在5〇(TC或以下。 二如申請專利範圍第17項所述之方法，其中該處理腔 至中的該平均壓力為約15毫托耳或以下。 19.如申請專利範圍帛18項所述之方法，其中使用一氮 氟酸溶液（1% HF水溶液）處理沉積之氣切膜的一㈣ 刻速率小於5埃/分鐘（A/min)。 20·如申請專利範圍第18項所述之方法，其中沉積之氮 化矽膜的一生成速率大於約5〇〇埃/分鐘（A/min)。 21. 如申請專利範圍第18項所述之方法，更包含將具— 第三氣流流率之氬氣流入該處理腔室中，同時維持該第 氣流流率與該第二氣流流率之一比率為15: 2至15: 4之間。 22. 如申請專利範圍第18項所述之方法，其中該高密度 29 1659459 電漿的一 RF功率為5至〗5瓦/平 方公分（基材面積）之間。 23.如申請專利範圍第18 電漿的一 RF功率為5.5至 間。 項所述之方法，其中該高密度 1〇瓦/平方公分（基材面積）之 2:.如申請專利範圍第18項所述之方法，其中形成該高
在度電裝之步驟於沉積該氮化硬膜期間不偏；1該電漿至 該基材。 25.如申請專利範 HDP-CVD製程的一 圍第18項所述之方法，其中該 沉積與濺射比率大於約50。
30
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