TWI326912B - Electronic parts packaging structure and method of manufacturing the same - Google Patents

Electronic parts packaging structure and method of manufacturing the same Download PDF

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Publication number
TWI326912B
TWI326912B TW092133042A TW92133042A TWI326912B TW I326912 B TWI326912 B TW I326912B TW 092133042 A TW092133042 A TW 092133042A TW 92133042 A TW92133042 A TW 92133042A TW I326912 B TWI326912 B TW I326912B
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Taiwan
Prior art keywords
film
electronic component
pad
copper
semiconductor wafer
Prior art date
Application number
TW092133042A
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English (en)
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TW200423373A (en
Inventor
Masahiro Sunohara
Kei Murayama
Naohiro Mashino
Mitsutoshi Higashi
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Shinko Electric Ind Co
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Application filed by Shinko Electric Ind Co filed Critical Shinko Electric Ind Co
Publication of TW200423373A publication Critical patent/TW200423373A/zh
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Publication of TWI326912B publication Critical patent/TWI326912B/zh

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Description

玖、發明說明： 【明屬·^ 々頁3 本發明係關於電子部件之封裝構造及其製造方法，且 更具體而言，係關於電子部件以包埋在絕緣膜中的方式封 裝在佈線基板上之電子部件的封裝構造及其製造方法。 LSI技術之發展為達到多媒體裝置之關鍵技術，不斷地 朝向更高速以及更大容量的資料傳輸方向邁進。據此，亦 繼續進行更高密度之封裝技術做為L SI和電子裝置之間界 面。 爲因應對越來越高密度之需求，半導體裝置以包埋在 絕緣膜中的方式將半導體晶片構裝在佈線基板上。例如， 於專利申請公開案第20(M-217337號（專利文獻1)中所記 載，半導體裝置以晶片包埋在絕緣膜中的方式使薄化半導 體晶片面朝上構裝在佈線基板上且半導體晶片之電極焊墊 經由形成在上方絕緣膜的通孔連接至設在佈線基板雙面上 之外部連接終端。 同時’為製造以上的半導體裝置，必須憑藉著雷射等 钱刻形成在半導體晶片之連接焊墊上的絕緣膜形成通孔。 此時，若半導體晶片之連接焊墊為鋁(A1)膜所製成，則此類 鋁犋具有容易藉著雷射蝕刻鋁膜的特性。因此，藉著雷射 於絕緣膜中形成孔洞時，造成露出的鋁膜以雷射蝕刻而散 佈在周圍附近，轉而使得部分之連接焊墊消失的問題。爲 此原因’使得形成在連接焊墊之下和鄰近下方區域之電路 元件受到雷射損害的問題。 在此例於以上的專利文獻1中，當半導體晶片之連接焊 墊(紹膜)上的絕緣膜以雷射蚀刻時，毋須顧慮造成以上的問 題。
【發明内容J 本發明之目的為提供電子部件之封裝構造及其製造方 法’其中可於電子部件之連接焊塾上形成通孔而不產生困 擾’其中於該電子部件的封裝構造中該電子料包埋在絕 緣膜中且面朝上地構裝於佈線基板上。 本發明係關於電子部件之封裝構造，其包含於承栽體 上構襄電子部件；電子部件具有連接焊墊，其以具有钱刻 終止膜做為最上層薄膜的層疊薄膜構成，且構裝在承載體 上使連接焊墊朝上；絕緣膜用於覆蓋電子部件；至少在位 於電子料之連接科上的_狀狀雜形成通孔； 以及佈線圖案經由通孔連接至連接焊墊。 在本發明的電子部件之封裝構造中，電子部件以包埋 在絕緣膜中的方式構裝於承載體上使連接焊墊朝上（面向 上）。電子部件之連接焊墊以具有蝕刻終止膜做為最上層薄 膜的層疊薄膜構成。 以連接焊墊之一個較佳具體實施例而言，連接焊墊係 以選自於由鋁膜/鎳膜/銅膜 '鋁膜/鎳膜/金膜、鋁膜/鎳膜/ 銅膜/金膜、鋁膜/鎳膜/銀膜、鋁膜/鉻膜/銅膜、鋁膜/導電 膠膜、鋁膜/鈦膜/導電膠膜、鋁膜/鉻膜/導電膠膜和鋁膜/ 鈦膜/銅膜組成之族群的層疊薄膜構成，其分別自底部依序 地形成。 而且在電子部件之連接焊墊上的絕緣膜形成通孔，且 佈線圖案亦經由絕緣膜上形成之通孔連接至連接焊墊。 在本發明的電子部件之封裝構造中，藉由雷射形成電 子部件的連接焊墊上之絕緣膜中的通孔時，連接焊墊之最 上層薄膜於雷射製程中做為敍刻終止層。這是因為做為姓 刻終止層的銅膜、金膜、銀膜、導電膠膜等比做為連接焊 墊之標準材料鋁膜對於雷射具有非常低的蝕刻速率。 因此，不同於所引用最上層的連接焊墊為鋁膜製成之 例，不可能使得通孔之下的連接焊墊消失或連接焊墊之下 和鄰近下方區域的電路元件受到損害。 依此方法，可輕易地藉由一般的雷射製程在電子部件 之連接焊墊上的絕緣膜中形成通孔而不產生問題。結果， 可輕易地製造電子部件之封裝構造而不會在高良率時導致 成本提高，其電子部件以包埋在絕緣膜中的方式構裝於承 載體上使得面向上且電子部件之連接焊墊經由通孔連接至 佈線圖案。 圖式簡單說明 第1A和1B圖表示製造包埋於絕緣膜中並且封裝的半 導體晶片之半導體裝置的缺點之剖面圖； 第2A至2K圖表不本發明笫一個具體貫施例之電子部 件封裝構造的製造方法之部分剖面圖； 第3圖表示根據本發明之第一個具體實施例之電子部 件的封裝構造之連接焊墊的變化例1之部分剖面圖； 第4圖表示根據本發明之第一個具體實施例之電子部 件的封裝構邊之連接焊塾的變化例2之部分剖面圖； 第5圖表示根據本發明之第一個具體實施例之電子部 件的封裝構造之連接焊墊的變化例3之部分剖面圖； 第6A炱6G圖表示本發明第二個具體實施例之電子部 件封裝構造的製造方法之部分剖面圖； 第7 A爻7 C圖表示根據本發明之第二個具體實施例之 電子部件的封裝構造之連接焊墊形成方法的變化例1之部 分剖面圖； 10 第8A昱8D圖表示根據本發明之第二個具體實施例之 電子部件的封裝構造之連接焊墊形成方法的變化例2之部 分剖面圖；以及 第9A至9E圖表示本發明第三個具體實施例之電子部 件封裝構造的製造方法之部分剖面圖。 15 【實旅方式】 在此本發明之具體實施例將參照附圖說明。 起初，將於下文說明製造包埋於絕緣膜中並且封裝之 半導體晶片的半導體裝置之缺點。第1A和1B圖表示製造包 埋於絕緣膜中並且封裝的半導體晶片之半導體裝置的缺點 20 之剖面圖。 如第1A圖所示’首先在基板1〇〇上形成其上具有預定佈 線圖案（未顯示）之第一夾層絕緣膜102。然後，形成經由在 第一夾層絕緣膜102中形成的通孔（未顯示）連接至基板1〇〇 上之佈線圖案的銅佈線104。其上具有紹焊墊i〇8a之半導體 8 1326912 曰曰月1〇8以連接终端1G8a朝上方式（以面向上方式)經由黏著 層106固定於銅佈線1〇4上。 如第1B圖所千 ^ _ 叮不’然後在半導體晶片108和銅佈線104上 升>成第一夾層絕緣膜11〇。然後以雷射姓刻在半導體晶片 5 108上之料塾i〇8a上的第二夾層絕緣膜iig之預定部位而 形成通孔110a ^ 此日守在钱刻第二夾層絕緣膜11〇結束之後半導體晶 片108上之銘焊备1〇8a以雷射進行過度钱刻時具有触刻迅 &的特性。因此’在某些例巾！g焊塾lG8a之!g散佈在通孔 10 110a的周圍附近’轉而使得通孔iiQa之底部部位的铭消失。 此外’因為以雷射破壞鋁焊墊108a，所以形成在鋁焊 墊108a之下和鄰近下方區域之對應電路元件受到損害。這 導致半導體裝置的晶片良率降低。 本發明具體實施例的電子部件之封裝構造可克服上述 15 的問題。 (第一個具體實施例） 其次’以下將說明本發明之第一個具體實施例的電子 部件之封裝構造的製造方法。第2八至21<：圖表示本發明第一 個具體貫施例之電子部件封裝構造的製造方法之部分剖面 2〇 圖。第3至5圖表示根據相同電子部件的封裝構造之連接焊 墊的變化之部分剖面圖。 如第2A圖所示，首先製備矽晶圓（半導體晶圓）ι〇，在 其上形成厚度約400 μηι之預定電晶體、多層佈線(未顯示） 等等。自矽晶圓10的較高表面露出以鋁(Α1)或鋁合金製成之 9 1326912 鋁焊墊12 ’且矽晶圓10的部位除鋁焊墊12以外皆以氮化矽 薄膜、聚醯亞胺樹脂等製成之護層薄膜U覆蓋。 如第2B圖所示，然後以無電電鍍法在矽晶圓10之鋁焊 墊12上形成鎳(Ni)膜14。以下將詳述形成方法的實例。首 5先，藉著以含有酸性浸泡脫脂材料之預處理溶液（1)加工矽 晶圓10進行脫脂。然後，藉著以預處理溶液(2)諸如過氧化 二硫酸銨溶液或過氧化氫溶液與硫酸等混合液體加工矽晶 圓ίο進行軟姓刻。
然後藉著以預處理溶液(3)諸如鹽酸、稀硫酸等加工矽 10晶圓10進行酸洗。接著藉著以含有使用鈀系材料之觸媒的 預處理溶液(4)加工矽晶圓1〇進行活化劑處理。 依此方法，進行預處理以在矽晶圓10之鋁焊墊12上實 k無電電鍍鎳膜14。在此例中，因為紹焊墊12能容忍以上 預處理溶液（1)至⑷，所以受預處理溶液姓刻銘焊塾12之問 15 題從不產生。
^後，矽晶圓1〇浸泡在具有例如氨基磺酸鎳（4〇〇克/ 升）：鎳（100克/升）'漠化錄⑴克/升）、删酸(々ο克/升)組成 之電鑛液中。因此，於石夕晶圓之銘焊墊12上選擇性形成厚 度約1至3 μηι的鎳膜14。 2〇 輸第2B®所示，然後以無電電鍍法树晶圓之錄膜 “上幵/成銅(CU)膜16。^下將詳述形成方法的實例。首先 藉^含有介面活性劑之預處理溶液⑴加工石夕晶圓1〇進行 f處理然後’藉著以預處理溶液⑺諸如過氧化二硫酸 ""或匕氧化氫*液與硫酸等混合液體加^^晶圓⑺進行軟 10 ϋ刻。 然後藉著以預處理溶液(3)諸如鹽酸、稀硫酸等加工矽 晶圓10進行酸洗。接著藉著以含有鈀之膠體溶液的預處理 浴液(4)加工矽晶圓1〇進行活化處理。然後藉著以預處理溶 5液諸如鹽酸、稀硫酸等加工矽晶圓10進行加速劑處理。 以此方式’進行預處理以在矽晶圓10之鎳膜14上實施 無電電鍍銅膜預處理。在此例_，因為鎳膜14能容忍以上 預處理溶液（1)至（5)，所以受預處理溶液蝕刻鎳膜14之問題 從不產生。 10 類似第2Β圖所示，然後矽晶圓10浸泡在含有例如硫酸 銅水5鈉、甲搭.、酒石酸鉀鈉和介面活性劑之電鍍液中（溫 .度：約45°〇。因此，在鎳膜14上選擇性形成厚度約1至5^爪 的銅膜16。 於是，在鋁焊墊12上選擇性形成鎳膜14和銅膜16而因 15此獲彳牙連接焊墊18。在夾層絕緣膜中以雷射於鋁焊墊η上 形成通孔時’以連接焊塾18之最上層的鋼膜⑹故為银刻終 止層。此因銅膜比鋁膜對於雷射具有非常低的蝕刻速率。 在此例中，可引用直接在鋁焊墊12上形成銅膜16之方 法而不用插入鎳膜14。但是可理解的是若以露出鋁焊墊12 20的方式在無電電鍍銅膜丨6中進行一連串預處理時，造成鋁 焊墊12腐蝕，則此方法不佳。 在以上的形式中，如連接焊㈣所示形成對於雷射具 有低蝕刻速率之銅膜16做為最上層的構造。以金屬對於雷 射具有低姓刻速率而言，除銅膜以外尚有金(Au)膜銀㈣ 11 1326912 膜等。
因此，可引用下列構造做為連接焊墊18之構造。更特 別地，以連接焊墊18的變化例1而言，如第3圖所示，鋁焊 塾12、厚度約1至3 之鎳膜14和厚度約〇 〇5至〇 15 μηι的金 5 (AU)膜17自底部依序地形成連接焊墊。在此例中，藉著浸 泡其上形成鎳膜Μ之矽晶圓10於含有例如金（10克/升）、有 機酸諸如檸檬酸、醋酸等（100克/升）、氫氧化物諸如ΚΟΗ、 Na0H等（50克/升）和鈷或鎳（100 m克/升）之電鍍液中（溫 度：約50。〇 ’在鎳膜14上選擇性形成金膜17。 10 而且，以連接焊墊的變化例2而言，可引用如第4圖所 示’鋁焊墊12、厚度約1至3 μΓη之鎳膜、厚度約1至5 μιη 的銅膜16和厚度約0.05 μπι之金膜17自底部依序地形成連 接焊墊。
另外，以連接焊墊的變化例3而言，可引用如第5圖所 15 示，紹焊塾12、厚度約1至3 μπι之鎳膜14和厚度約1至5 μπι 的銀(Ag)膜19自底部依序地形成連接焊墊。藉由一般無電 電鍍法在鎳膜14上選擇性形成銀膜19。 依此方法，根據本具體實施例以做為最上層包覆之金 屬薄膜(銅膜16、金膜17、銀膜19等等）對於雷射的蝕刻速率 2〇 低於鋁膜之方式形成焊墊18。另外，於本具體實施例中， 形成在鋁焊墊12上的金屬薄膜是以無電電鍍法而不是以遮 罩步驟選擇性形成。在此例令，當然具有以上層疊構造之 連接焊墊18的例子以外的變化也可應用。 如第2C圖所示，然後以研磨機研磨矽晶圓1〇之不形成 12 1326912 元件的表面（以下指”背面”）。因卟ώ ；U此，厚度約400 μΓη之矽晶圓 10降低至厚度約10至150 μιη。 如第2D圖所示，然後藉著切割矽晶圓忉獲得多個分割 為個別之半導體晶片20(電子部件）。在此例中，電子部件舉 5例如半導體晶片20。但是可引用不同的電子部件，例如在 一面上設有電容元件、電阻等之矽晶片。 其次’以下將說明在佈線基板上構裝以上半導體晶片 20之實例。
如第2Ε圖所示，首先製備用於製造組合佈線基板之基 10板以。此基板24以絕緣材料諸如樹脂等製成。而且，於基 板24中設有通孔24a ’在基板24上形成連接至第一佈線圖案 26的通孔電鍍層24b，其形成於通孔24a之内面，且以樹脂 體24c填塞通孔。
然後形成覆蓋第一佈線圖案26之第一夾層絕緣膜28。 15以第一夾層絕緣膜28而言，可使用樹脂薄膜諸如環氧樹 脂、聚醯亞胺樹脂、聚苯醚樹脂。例如，藉著層疊樹脂薄 膜在第一佈線圖案26上形成厚度約30至50 μιη的樹脂層且 接著在80至l〇〇°C下退火使薄膜硬化。 在此例中，除以上層疊樹脂薄膜之方法以外，還可藉 20 由旋轉塗佈法或印刷法形成做為第一夾層絕緣膜28的樹脂 層。而且，除樹脂層做為第一夾層絕緣膜28以外可引用以 CVD等方法形成二氧化矽薄膜。 然後在第一佈線圖案26上第一夾層絕緣膜28之預定部 位中形成第一通孔28x。 13 1326912 然後’以半加成法在第一夾層絕緣膜28上形成第二佈 線圖案26a。以下將更詳細說明。在第一通孔28χ之内面和 第一夾層絕緣膜28的上面形成晶種銅層（未顯示），然後形成 在預定圖案中具有開口部位之光阻薄膜(未顯示）。接著使用 5晶種銅臈做為電鍍供電層以電鍍法在光阻薄臈的開口部位 上形成銅膜。然後移除光阻薄膜，接著使用銅膜做為遮罩 蝕刻晶種銅膜。因此，形成經由第一通孔28χ連接至第一佈 線圖案26之第二佈線圖案26a。 在此，可以減成法或全加成法而不以半加成法形成第 10 二佈線圖案26a。 如第2F圖所示，然後以上半導體晶片2〇之背面經由黏 著層27黏著在第二佈線圖案26a上。因此，半導體晶片加以 連接焊墊18朝上（面朝上構裝）的方式構裝。 如第2G圖所示，然後在半導體晶片2〇和第二佈線圖案 15 263上形成與以上第一夾層絕緣膜28等相同樹脂層製成之 第一夾層絕緣膜28a。然後藉著用雷射蝕刻在半導體晶片2〇 的第二夾層絕緣膜28a之連接焊墊18上預定部位形成第二 通孔28y。根據此步驟，亦藉由雷射蝕刻在第二佈線圖案 上的第一夾層絕緣膜28a之預定部位形成第二通孔28y。 2〇 此時，連接焊墊18之最上層於雷射蝕刻第二夾層絕緣 膜28a之後所實施的過_中曝露在雷射之下。然而，因為 以銅膜16製成連接焊塾18之最上層，其對於雷射的钱刻速 率低，所以銅膜16作用為姓刻終止層。因此，不同於以紹 膜製成連接焊墊之例，可以避免鋁自連接焊墊18散佈在其 14 周圍或形成在連接焊墊18之下和鄰近下方區域的電路元件 受到損害之結果。如今，若以金膜17、銀膜19等製成連接 焊墊18的最上層（第3至5圖），則可獲得類似的優點。 以雷射而言，可使用C02雷射（波長：10.64nm)、YAG 5 雷射（第三諧波（波長：0.355 nm))、KrF激生分子雷射（波長： 0.248 nm)等。 若以銅膜16製成連接焊墊18之最上層，則應引用比其 他雷射具有較低的銅膜16蝕刻速率的C02雷射為佳。而且， 若以銀膜19製成連接焊墊18之最上層，則應引用比其他雷 10 射具有較低的銀膜19蝕刻速率的YAG雷射為佳。 而且’為了在照射雷射時提高熱導性和抑制熱生成， 應訂定薄膜厚度盡量的厚以及焊墊區域盡量的大之蝕刻終 止層（銅膜16等）為佳。以基於此情況的較佳實例而言，銅膜 16之薄膜厚度訂定約為3 μιη或更高，連接焊塾18的焊塾區 15域訂定約為80 μιη至100 μπι，而第二通孔28y之直徑訂定約 為 50至60 μιη。 在此，當使用RIE(反應性離子蝕刻）取代雷射形成通孔 時，具有以上構造之連接焊墊18於過蝕刻時比引用鋁焊墊 的例子更可抑制連接焊墊18之材料喷濺。因此，具有此構 2〇 造的連接焊墊18為適當的》 如第2Η圖所示，然後在露出半導體晶片2〇之連接焊墊 18的結構體（第2G圖）上以無電電鍍法形成晶種銅膜3〇ae此 時，若僅以鋁膜製成連接焊墊18，可能造成連接焊墊18和 晶種銅膜30a之間黏附性的問題。然而，在本具體實施例 15 1326912 中’因為在蝕刻終止層（於第2H圖實例中，銅膜16)上形成 晶種銅膜30a做為連接焊墊18之最上層，所以可改善連接焊 墊18和晶種銅膜3〇a之間黏附性。 如第21圖所示，然後藉著微影術在晶種銅膜3〇a上形成 5對應於第三佈線圖案具有開口部位32a之光阻薄膜32。然後 使用晶種銅膜30a做為電鑛供電層以電鍵法在光阻薄膜32 的開口部位32a中形成銅膜圖案30b。
如第2J圖所示，然後移除光阻薄膜32。接著於使用銅 膜圖案30b做為遮罩時’藉著對晶種銅膜3〇a施以濕式蝕刻 10开々成第二佈線圖案26b。在此步驟之後藉著重複於第2F至2J 圖中步驟預定的次數，在此可以多層方式形成其中構建半 導體晶片20之夾層絕緣膜以及佈線圖案。
如第2K圖所示，然後於第三佈線圖案26b上形成在其連 接部位26x具有開口部位34a之焊接光阻薄膜34。接著製備 /、上具有凸塊36的半導體晶片20a。然後半導體晶片2〇a之 鬼3 6以覆晶接合法接合至第三佈線圖案Mb的連接部位 26父。此時，對第三佈線圖案26b之連接部位26χ施以鎳/金 電鍵。 “在此例中，可於焊接光阻薄膜34等之開口部位34a上藉 〇者構裝锡球形成Λ塊，然後半導體晶片20a的連接終端可接 ^至凸塊。而且，若第2K圖中之結構體必須以預定的數目 刀割而包括半導體晶片2〇a，則可在覆晶構裝之前或之後分 割半導體晶片20a。 由以上步驟，完成本具體實施例的電子部件之封裝構 16 1326912 造1。 在第-個具體實施例的電子部件之封裝構造十 體晶片20以包埋在第二夾層絕緣膜加中的方式面朝上構 裝在基板24上之第二佈線圖案如上。做為最上層的 晶片2〇之連接焊塾18具有以不易受雷射_的材料製成的 姓刻終止層(銅膜16等）。在半導體晶片20之連接焊㈣上的 第二炎層絕緣獅a巾形成以雷財透之第二通孔28” 10 15 連接至半導體晶請之連接焊㈣的第三佈線圖案 26b經由第二通孔28y電性連接至第二佈線圖案加。另外， 形成於第三佈線圖案26b之連接部位26χ具有開口部位％ 的焊接光阻薄膜34，_以覆晶_在第三佈線圖案挪之 連接部位26x上構裝半導體晶片2()a的凸塊36^此方法， 半導體晶片20之連接焊㈣連接至佈線基板上預定佈線圖 案而且半導體口 20與配置在此晶片上的半導體晶片施 相互地連接。 在此例於本具體實施例中，舉例如半導體晶片2〇以包 埋在第二失層絕緣膜28a中之方式構裝於佈線基板上的第 二佈線圖案26a上之形式。可引用半導體晶片2〇以類似包埋 在夹層絕緣膜中的方式構裝於第一佈線圖案26或第三佈線 2〇圖案26b上之形式。不然，可引用半導體晶片2〇構裝於基板 24成是第-或第m缘膜28或28a上的形式。意即，在 承載體上構裝半導體晶片20時，將有基板24、第一至第三 佈線圖案26至26b、第-或第二夹層絕緣膜减娜等。 另外，可引用數個半導體晶片2Q分別類似包埋在數個 17 1326912 夾層絕緣膜且以多層方式立體堆疊封裝之形式，且這些半 導體晶片20經由數個通孔相互地連接。
如上所述.，於本具體實施例的電子部件之封裝構造！ 中’在雷射製程中半導體晶片20的連接焊墊18具有蝕刻终 5 止層（銅膜16、金膜17、銀膜19等）做為最上層。因此，在第 二失層絕緣膜28a中以一般雷射通孔形成法形成第二通孔 28y而不產生問題。因為此原因’在雷射通孔形成步驟中， 可以免除使半導體晶片20之連接焊墊18消失或連接焊墊18 之下和鄰近下方區域的電路元件損害之可能性。 10 根據前文，可輕易地製造電子部件之封裝構造1而不會 致使高良率的成本增加《另外，即使以多層方式藉著形成 其中構建半導體晶片20之夾層絕緣膜和佈線圖案以製造高 密度電子部件的封裝構造時，仍可製造高可靠度之高性能 封裝·構造。 15 (第一個具體實施例）
第6A至6G圖表示本發明第二個具體實施例之電子部 件封裝構造的製造方法之部分剖面圖。第7A至7C圖表示類 似於板據電子部件的封裝構造之連接焊墊形成方法的變化 例1之部分剖面圖。第8八至8D圖表示類似於根據電子部件 20 的封裝構造之連接焊墊形成方法的變化例2之部分剖面圖》 第二個具體實施例與第一個具體實施例之不同點在於 引用微影術而非無電電鍍法做為在鋁焊墊12上選擇性形成 蝕刻終止層的方法。在此將省略於第6A至6G圖、第7A至7C 圖以及第8A至8D圖中那些與第2A至2K圖中之相同元件和 18 1326912 相同步驟的詳細說明。 根據本發明第一個具體實施例的製造電子部件之封裝 構造的方法中，首先如第6A圖所示，與第一個具體實施例 相同方法製借類似第2 A圖之石夕晶圓ι〇(半導體晶圓），其且 5有露出鋁焊墊12以及其他部位覆以護層薄膜11的構造。
如第6B圖所示，然後以濺鍍法等等在鋁焊墊12和護層 薄膜11上形成厚度約0.05 μιη之絡((^)膜丨3。在此，可使用 鈦(Τι)膜代替鉻(Cr)膜13。接著以濺鍍法等在鉻膜13上形成 厚度約0.05至2 μιη的銅膜16x。 10 如第6 C圖所示，然後在銅膜16 X上以微影術定義圖形形 成覆蓋對應於鋁焊墊12部位之光阻薄膜15。然後於使用光 阻薄膜15做為遮罩時，以濕式蚀刻法使用含有溴化氫(HBr) 和過氧化二硫酸銨的溶液（一般的溫度）蝕刻銅膜16)^接著 於類似使用光阻薄膜15做為遮罩以濕式蝕刻法使用含有氣 15化鐵(Fed3)和鹽酸(HC1)之溶液(4〇。〇钮刻鉻膜π。然後移 除光阻薄膜15。
如第6D圖所示，因此在鋁焊墊12上選擇性形成鉻膜13 和銅膜16x’藉此根據第二個具體實施例獲得連接焊墊18χ。 其次，以下將根據第二個具體實施例說明形成連接焊 20墊18x之方法的變化。以變化例丨而言，首先如第7八圖所示， 以微影術形成在對應於鋁焊墊12部位具有開口部位丨5a之 光阻薄膜15。 如第第7B圖所示，然後如以上之相同方法諸如濺鍍法 等在鋁焊墊12和光阻薄膜15上依序地形成鉻膜13和銅膜 19 1326912 l6x 0 然後以光阻移除液移除光阻薄膜15。因此，如第7(：圖 所示，以所謂的剝離法同時與光阻薄膜15移除形成在光阻 薄膜15上之鉻膜13和銅膜16χ ’而且仍留下形成在鋁焊墊12 5上的鉻膜13(或鈦膜）和銅膜16Χ，藉此獲得具有如以上相同 構造連接焊墊18χ。在此變化例1中，可引用鈦膜取代路膜 13 °
而且，以變化例2而言，首先如第8Α圖所示，以濺鍍法 等於具有如第6Α圖相同構造之矽晶圓10上的鋁焊墊12和護 10層薄膜11上依序地形成厚度約0.05 μιη之鉻膜13和厚度約 0.05 μιη的第一銅膜Ι6χ。 如第8Β圖所示，然後以微影術形成在第一銅膜16χ對應 於鋁焊墊12之部位具有開口部位15a的光阻薄膜15〇如第 圖所示，接著於使用光阻薄膜15做為遮罩時，以電鍍法使 15用第一銅膜16x做為電鍍供電層在光阻薄膜15之開口部位 15a中形成每一厚度約5至1〇^1111的第二銅膜16y。
然後移除光阻薄膜15。接著於使用第二銅膜16y做為遮 罩時，以濕式蝕刻法使用如上述方法之相同蝕刻劑依序地 钱刻第一銅膜16x和絡膜13。 2〇 如第8D圖所示，因此在鋁焊墊12上選擇性形成鉻膜 13、第一銅膜16x和第二銅膜16y，而獲得連接焊墊ΐ8χ。在 變化例2中，可引用鈦膜取代銅膜13。 如第一個具體實施例中所說明，若爲了改善連接焊墊 18χ等之熱冷性而开)成較厚厚度(超過約3叫^)的銅膜，則此 20 ^兄的前提為制上述韻法顿影㈣成_或濕式蚀 夺，產里等會發生形成方法的問題。因此，在變化例2中， 以機鍍法形成薄的第一鉻膜13和薄的第一銅膜他，然後以 $電鍍法在紹焊塾12上選擇性形成厚的第二銅膜吻。接著於 5使用厚的第二鋼膜16y做為遮罩時，藉著_第—銅膜阶 和鉻膜13形成連接焊墊18χ。 藉著於第二個具體實施例十使用濺鍍法和微影術，可 輕易地形成具有厚的蝕刻終止層之連接焊墊18乂。 如上所述，藉著使用在變化例丨或變化例2之形成方法 10 可形成連接焊墊18χ» 類似第一個具體實施例，如第6Ε圖所示，然後以研磨 機研磨其上不形成連接焊墊18χ之石夕晶圓1〇的背面。因此， 矽晶圓10的厚度薄化為1〇至15〇 μιη。 類似第一個具體實施例，如第6F圖所示，然後切割其 15 上形成連接焊墊18χ之矽晶圓1〇。因此，獲得多個分割為個 別的半導體晶片20χ。 如第6G圖所示，然後藉著使用半導體晶片20χ進行那些 與第一個具體實施例之第2Ε至2Κ圖中的相同步驟。因此， 可獲得第二個具體實施例之電子部件的封裝構造la。 2〇 第二個具體實施例之電子部件的封裝構造h可達到和 第一個具體實施例相同的優點。 在此例中，於第一個具體實施例中說明之不同的修飾 和變化亦可應用於第二個具體實施例上。 (第三個具體實施例） 21 1326912 第9A至9E圖表示本發明第二個具體實施例之電子部 件封裝構造的製造方法之部分剖面圖。第三個具體實施例 與第一個具體實施例之不同點在於藉著在鋁焊墊12上形成 導電膠形成雷射製程中的蝕刻終止層。在第三個具體實施 5例中，將省略那些與第一個具體實施例中相同步驟之詳細 說明》
在本發明第三個具體實施例之製造電子部件的封裝構 造之方法中，首先如第9A圖所示，製備具有和第一個具體 實施例上相同的鋁焊墊12之矽晶圓1〇(半導體晶圓）。如第 10 9B圖所示，然後在鋁焊墊12上選擇性形成導電膠膜38。例 如，藉著網印法等在鋁焊墊12上塗佈導電膠材料接著烘烤 材料而形成導電膠膜38。於是，獲得每個由鋁焊墊12和導 電膠膜38組成的連接焊墊18y。 以導電膠38而言，例如引用以分散導電微粒諸如銅 15 (Cu)、銀(知）、金(Au)、鎳(Ni)等於環氧樹脂或聚醯亞胺樹
脂中所形成的膠。在第三個具體實施例中，類似第一個具 體實施例中說明之銅膜16等，導電膠臈38在雷射製程中之 作用為蝕刻終止層。 藉著使用導電耀·膜38就可在短時間之内不用複雜的步 2〇 驟形成厚度約10 μιη之蝕刻終止層。 在此例中，可引用在鋁焊墊12和導電膠膜38之間形成 鉻膜或鈦膜之形式。可於鋁焊墊12上以濺鍍法、微影術或 電鍍法選擇性形成鉻膜或鈦膜。 類似第一個具體實施例，如第9C圖所示，然後以研磨 22 機研磨其上不形成連接焊墊吻之m㈣背面。因此， 石夕晶圓10的厚度降低為10至150_。 ，類似第個具體實施例，如第9D圖所示，然後切割其 上开/成連接料吻切晶_。因此，獲得多個分割為個 別的半導體晶片20y。 如第9E圖所7F ’然後藉著使用半導體晶片2Gy進行那些 與第個具體實施例之第2£至汉圖中的相同步驟。因此， 可獲得第三個具體實施例之電子部件的封裝構造1 b。 第三個具體實施例之電子部件的封裝構造断達到和 10第一個具體實施例相同的優點。 在此例十，於第—個具體實施例中說明之不同的修飾 和變化亦可應用於第三個具體實施例上。 由以上步驟，參照第-至第三個具體實施例說明本發 明之細㊣。本發明的範圍並不侷限於以上具體實施例中具 15體所示之貝例。應了解在不違背本發明要旨的限度内以上 具體貫施例之變化包含於本發明的範圍之内。 本發明的特點之一為在半導體晶片之必要金屬焊墊 (例如紹焊塾）上設有對雷射之蝕刻速率較金屬焊墊為低的 蝕刻終止層。 於具體實施例中’舉例如在鋁焊墊上設有對雷射為低 #刻速率之金屬薄膜或導電膠膜的形式。但是可引用在除 銘之外的金屬焊塾上形成對雷射之蝕刻速率較金屬焊墊為 低的金屬薄膜或導電膠膜之形式。亦即，本發明可應用於 具有除銘焊塾之外的所欲之各種金屬焊墊的電子部件。 23 1326912 I：圖式簡單說明3 第1A和1B圖表示製造包埋於絕緣膜中並且封裝的半 導體晶片之半導體裝置的缺點之剖面圖； 第2A至2K圖表示本發明第一個具體實施例之電子部 5 件封裝構造的製造方法之部分剖面圖； 第3圖表示根據本發明之第一個具體實施例之電子部 件的封裝構造之連接焊墊的變化例1之部分剖面圖； 第4圖表示根據本發明之第一個具體實施例之電子部 件的封裝構造之連接焊墊的變化例2之部分剖面圖； 10 第5圖表示根據本發明之第一個具體實施例之電子部 件的封裝構造之連接焊墊的變化例3之部分剖面圖； 第6A至6G圖表示本發明第二個具體實施例之電子部 件封裝構造的製造方法之部分剖面圖； 第7 A至7 C圖表示根據本發明之第二個具體實施例之 15 電子部件的封裝構造之連接焊墊形成方法的變化例1之部 分剖面圖； 第8A至8D圖表示根據本發明之第二個具體實施例之 電子部件的封裝構造之連接焊墊形成方法的變化例2之部 分剖面圖；以及 20 第9A至9E圖表示本發明第三個具體實施例之電子部 件封裝構造的製造方法之部分剖面圖。 【圖式之主要元件代表符號表】 la，lb...封裝構造 10…晶圓 11…護層薄膜 12...鋁焊墊 24 1326912 13.. .鉻膜 15.. .光阻薄膜 16, 16x, 16y··.銅膜 18, 18x，18y...連接焊墊 20, 20a，20x, 20y · · ·半導體晶片 24a...通孔 24c...樹脂體 26a...第二佈線圖案 26x...連接部位 28.. .第一夾層絕緣膜 28x...第一通孔 30a...晶種銅膜 32.. .光阻薄膜 34…焊接光阻薄膜 36.. .凸塊 100.. .基板 104.. .銅佈線 108.. .半導體晶片 110.. .第二夾層絕緣膜 14.. .鎳膜 15a...開口部位 17.. .金膜 19.. .銀膜 24…基板 24b...通孔電鍍層 26.. .第一佈線圖案 26b...第三佈線圖案 27.. .黏著層 28a...第二夹層絕緣膜 28y...第二通孔 30b...銅膜圖案 32a...開口部位 34a...開口部位 38.. .導電膠膜 102.. .第一夾層絕緣膜 106.. .黏著層 108a...銘焊墊 110a...通孔 25

Claims (1)

1326912 第092133042 ^·利申請案f請專利範冊正本99年3月 拾、申請專利範圍： 1. -種電子部件之封裝構造，其包含： 一承載體，於其上構裝有電子部件； έ亥電子部件具有連接焊墊，該連接焊墊形成於該電 子部件之表面側上； 。玄電子4件係構裝於該承載體上以使該連接焊墊 朝上； 該連接焊墊由一鋁焊墊與一覆蓋該鋁焊墊之蝕刻 終止膜所構成； 10 5亥鋁焊墊係由鋁或是鋁合金組成； 摘刻終止難具有數層膜之層疊膜所構成，該鞋 刻終止膜的最上層薄膜為選自於由銅膜、金膜、銀膜， 和導電膠膜所組成之群組中的成員； 一絕緣膜，用於覆蓋該電子部件； 15 —通孔’至少形成在位於該電子部件之連接 的絕緣膜之預定部位；以及 上 -佈線圖案’其經由該通孔連接至該連接焊墊， 2如申該通孔經由剩終止膜連接至該紹焊塾。 20
2.=_圍第1項之電子部件的封裝構造，其中該鞋 …止膜係以選自於由錄膜/銅膜、錄膜 、 膜/金膜、細銀膜、歸銅膜、導電勝膜膜、_銅 膠膜、_/導電_倾膜/酬所_ =膜/導電 膜所構成，分別自底部依序地形成。_中之層疊 3·如申請專利範圍第1項之電子部件的封裝構造，其中該承 26 栽體為其上具有佈線圖案之基板，或在基板上層疊預定 數目的絕緣膜和佈線圖案之結構體，且連接至連接焊墊 之佈線圖案乃經由形成於絕緣膜令的通孔電性連接至位 在電子部件下方之佈線圖案。 4. 如申請專利範圍第3項之電子部件的封裝構造其中數個 電子部件以包埋該數個電子部件在數個絕緣膜中的狀態 立體封裴，且該數個電子部件經由形成於該絕緣膜中的 通孔以及該佈線圖案相互地連接。 5. 如申請專利範圍第1項之電子部件的封裝構造，其中上方 有電子部件之凸塊構裝於佈線圖案上，其藉由覆晶構裝 連接至該電子部件的連接焊墊。 6·如申請專利範圍第1項之電子部件的封裝構造，其中該電 子°卩件之厚度設定約為150 μιη或更低。 7· 一種電子部件之封裝構造的製造方法，丨包含以下步 驟： 製備一電子部件，其具有形成於該電子部件之表面 側上的連接焊墊，該連接焊墊係由一鋁焊墊與一覆蓋該 銘焊塾之钱刻終止臈所構成’該鋁焊墊係由鋁或是鋁合 金組成； "亥蝕刻終止膜由具有數層膜之層疊膜所構成，該蝕 止獏的最上層薄膜為選自於由銅膜、金膜、銀膜， 和導電膠膜所組成之群組中的成員； 於承載體上構裝該電子部件，使連接焊墊朝上； 形成絕緣臈以覆蓋該電子部件； 27 1326912 藉由雷射至少娃刻於該連接焊塾上絕緣膜之預定 部位以形成通孔；以及 形成佈線圖案，其經由該通孔連接至連接焊墊， ^中祕刻終止膜在藉㈣射於該絕緣膜形成該 通孔時做為-終止層，並且該通孔經由該_終止 接至該鋁焊墊。 、逆 10 9 如申請專韻圍第7項之電子部件的封裝構造之製造方 :’其中紐刻終止膜係以選自於由鎳膜/銅膜、鎳膜/ 膜、鎳膜/銅膜/金膜、鎳膜/銀膜、絡膜/鋼膜、導電膠 膜:欽膜/導電膠膜 '鉻膜/導電膠膜和欽膜/銅膜所組成 的知群中之層疊膜所構成，分別自底部依序地形成。 .如申請專利範圍第8項之電子部件的封裝構造之製造方 法，其中該蝕刻終止膜係以鎳膜/鋼膜、鎳膜/ 15 臈/銅膜/金膜或鎳膜/銀膜形成，以及 、' 、 製備該電子部件之步驟包含以下步驟： 藉由無電電鍍法於具有該鋁烊墊之半導體曰圓 的銘焊墊上選擇性形成鎳膜， 00 20 藉由無電電鍍法於該鎳膜上選擇性形成鋼獏、金 膜、鋼膜/金膜或銀膜而形成連接焊墊， 藉著研磨該半導體晶圓之背面以降低厚度，以及 切割該半導體晶圓以得到電子部件。 10.如申請專利範圍第8項之電子部件的封裝構造之製造方 法，其中該蝕刻終止膜係由鉻膜/銅膜或鈦膜/鋼臈形 成，以及 夕 28 製備该電子部件之步驟包含以下步驟： 於具有之半導體晶®上依序地形成鉻膜 或鈦獏以及銅膜， 圖案化該銅膜和鉻膜或鈦膜，使鉻膜或鈦膜和銅 5 膜留在轉塾上，且n此形錢接焊塾， 藉著研磨6玄半導體晶圓之背面以降低厚度，以及 切割該半導體晶圓以得到電子部件。 11.如申請專利範圍第8項之€子部件的封裝構造之製造方 ”中。亥餘刻終止膜係由絡膜/鋼媒或欽膜/銅膜形 10 成，以及 製備該電子部件之步驟包含以下步驟， 於具有料墊之半導體晶圓的料墊上形成具有 開口部位之光阻薄膜， 於該光阻薄膜和脑焊墊上依序地形成絡膜或 15 鈦膜和銅膜， 移除該光阻薄膜，且剝離在光阻薄膜上之絡膜或 鈦膜和銅膜，使鉻膜或鈦膜和銅膜選擇性留在鋁焊墊 上，且藉此形成連接焊墊， 藉著研磨該半導體晶圓之背面以降低厚度，以及 20 切割該半導體晶圓以得到電子部件。 12·如申請專利範圍第8項之電子部件的封敦構造之製造方 法’其中該餘刻終止膜係由路膜/銅膜或欽膜/銅膜形 成，以及 製備該電子部件之步驟包含以下步驟： 29 於具有is焊墊之半導體晶圓上依序地形成鉻膜或 鈦膜和第一銅膜， 形成光阻薄膜，其具有開 口部位在第一銅膜之對 應於鋁焊墊的部位上， 藉由電鍍法在光阻薄膜之開口部位形成第二銅 膜， 卜 移除光阻薄膜’然後使用第二銅膜做為罩幕蝕刻 第一銅膜和鉻膜或欽膜，藉此形成連接焊墊， 藉著研磨該半導體晶圓之背面以降低厚度 ，以及 切割该半導體晶圓以得到電子部件。 13.如申⑺專利範圍第8項之電子部件的封裝構造之製造方 法其中祕刻終止膜係以導電膠膜、欽膜/導電膠膜或 鉻膜/導電膠膜形成，以及 製備電子部件之步驟包括以下步驟： 藉由選擇性塗佈導電膠材料於具有鋁焊墊之半 體阳圓的㉟焊塾上，或於形成在纟S焊墊上之鈦膜或鉻 膜上’以形成導電膠膜， 藉著研磨半導體晶圓之背面降低厚度 ，以及 切割半導體晶圓以得到電子部件。 申叫專油圍第7項之電子料的封裝構造之製造方 去’其中該承紐為其上具有佈線圖案之基板，或在基 板上層叠預錄目的絕緣膜和佈線圖案之結構體， 於形成通孔之步驟中，同時在位於該電子部件下方 之佈線圖案上的絕緣膜之預定部位形成通孔，以及 30 1326912 於形成連接至連接焊墊的佈線圖案之步驟中，形成 連接至連接焊墊之佈線圖案，以經由通孔電性連接至該 電子部件下方的佈線圖案。 31
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TW200423373A (en) 2004-11-01

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