CN1503359A - 电子元件封装结构及制造该电子元件封装结构的方法 - Google Patents

电子元件封装结构及制造该电子元件封装结构的方法 Download PDF

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Publication number
CN1503359A
CN1503359A CNA2003101183571A CN200310118357A CN1503359A CN 1503359 A CN1503359 A CN 1503359A CN A2003101183571 A CNA2003101183571 A CN A2003101183571A CN 200310118357 A CN200310118357 A CN 200310118357A CN 1503359 A CN1503359 A CN 1503359A
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China
Prior art keywords
film
connection pads
aluminium
copper
packaging structure
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CNA2003101183571A
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春原昌宏
宽
村山启
真筱直宽
东光敏
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Shinko Electric Industries Co Ltd
Shinko Electric Co Ltd
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Shinko Electric Co Ltd
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Publication of CN1503359A publication Critical patent/CN1503359A/zh
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    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
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Abstract

提供了一种电子元件封装结构，它包括一个其上安装了一个电子元件的安装体，该电子元件具有一个连接焊盘，它以一个防蚀刻膜(铜膜、金膜、银膜或导电贴膜)作为最上层膜，并安装在安装体上，使连接焊盘方向向上，一层用于覆盖电子元件的夹层绝缘膜，一个形成在电子元件的连接焊盘上的绝缘膜中的通路孔以及一个通过通路孔连接到连接焊盘的布线图案。

Description

电子元件封装结构及制造 该电子元件封装结构的方法
技术领域
本发明涉及一种电子元件封装结构和一种制造该结构的方法，尤其涉及这样一种电子元件封装结构，在该结构中电子元件以该电子元件被掩埋在一个绝缘膜中的状态被封装在一个布线基底上，以及一种制造该结构的方法。
背景技术
作为实现多媒体设备的关键技术的LSI技术的发展正在稳定地前进到更高速更大容量的数据传输。因此，作为LSI和电子设备之间的接口的封装技术也正向更高密度前进。
为响应进一步高密度的请求，存在着这样的半导体器件，其中半导体芯片以掩埋在绝缘膜中的状态安装在布线基底上。例如，在专利申请出版物(KOKAI)2001-217337(专利文献1)中，提出了这样一种半导体器件，其中减薄的半导体芯片以掩埋在绝缘膜中的状态被面朝上的安装在布线基底上，然后半导体芯片的电极焊盘通过其上的绝缘膜中形成的通路孔连接到在布线基底两个表面上提供的外部连接终端，等等。
同时，为制造上述半导体器件，必须利用激光或类似的技术蚀刻在半导体芯片的连接焊盘上方形成的绝缘膜来形成通路孔。此时，如果半导体芯片的连接焊盘是铝(Al)膜制成的，这种Al膜具有易被激光蚀刻的性质。从而，通过用激光在绝缘膜上形成通路孔，引起了暴露的Al膜被激光所蚀刻并散布到周围的问题，因此一部分连接焊盘消失了。因此，出现了在连接焊盘下和其周围区域之下形成的电路元件被激光损坏的问题。
在这种情况下，在上述专利文献1中，没有考虑到在用激光蚀刻半导体芯片的连接焊盘(Al膜)上的绝缘膜时引起的上述问题。
发明内容
本发明的一个目的是提供一种电子元件封装结构，其中通路孔可形成在电子元件的连接焊盘上且无不良影响，其中在该电子元件封装结构中，电子元件被掩埋在一个绝缘膜中并正面向上安装在一个布线基底上，以及提供一种制造该结构的方法。
本发明涉及一种电子元件封装结构，包括一个安装体，其上安装了电子元件；该电子元件具有一个连接焊盘，它是由一个以一个防蚀刻膜作为最外层膜的层叠膜构成的，并安装到安装体上以使连接焊盘方向向上；一个用于覆盖电子元件的绝缘膜；一个至少形成在电子元件的连接焊盘上的绝缘膜的预定部分中的通路孔；以及一个通过通路孔连接到连接焊盘的布线图案。
在本发明的电子元件封装结构中，电子元件安装在安装体上，以使连接焊盘方向向上(正面向上)，所述电子元件处于被掩埋在绝缘膜中的状态。然后，电子元件的连接焊盘由以防蚀刻层作为最外层的层叠膜构成。
作为连接焊盘的一个首选实施方式，连接焊盘由从铝膜/镍膜/铜膜，铝膜/镍膜/金膜，铝膜/镍膜/铜膜/金膜，铝膜/镍膜/银膜，铝膜/铬膜/铜膜，铝膜/导电贴膜，铝膜/钛膜/导电贴膜，铝膜/铬膜/导电贴膜，以及铝膜/钛膜/铜膜构成的组中选出的层叠膜构成，这些膜分别从底部依次形成。
同样，通路孔也形成在电子元件的连接焊盘上的绝缘膜中，并且通过通路孔连接到连接焊盘的布线图案也形成在绝缘膜上。
在本发明的电子元件封装结构中，通过用激光在电子元件的连接焊盘上的绝缘膜中形成通路孔，连接焊盘的最外层作为激光过程中的防蚀刻层。这是因为用作防蚀刻层的铜膜、金膜、银膜、导电贴膜或类似的膜与作为连接焊盘的标准材料的铝膜相比具有非常小激光蚀刻率。
因此，不像采用其最外层由铝膜制成的连接焊盘时的情况那样，通路孔下面的连接焊盘不可能消失，连接焊盘下和其周围下面的区域中的电路元件不可能被损坏。
在这种方法中，形成在电路元件的连接焊盘上的绝缘膜中的通路孔可由通常的激光过程很容易地形成，不会产生问题。因此，电子元件以被掩埋在绝缘膜中的状态正面向上安装在安装体上，以及电子元件的连接焊盘通过通路孔连接到布线图案的电子元件封装结构可以很容易地制造，在高产量的时候也不会引起成本增加。
附图说明
图1A和1B是显示半导体芯片被掩埋在绝缘膜中并被封装的半导体器件的制造中的缺点的截面图。
图2A至2K是显示本发明的一个第一实施方式的一种电子元件封装结构的制造方法的部分截面图。
图3是显示根据本发明的第一实施方式的电子元件封装结构的一个连接焊盘的一种变体1的部分截面图。
图4是显示根据本发明的第一实施方式的电子元件封装结构的一个连接焊盘的一种变体2的部分截面图。
图5是显示根据本发明的第一实施方式的电子元件封装结构的一个连接焊盘的一种变体3的部分截面图。
图6A至6G是显示本发明的一个第二实施方式的一种电子元件封装结构的制造方法的部分截面图。
图7A至7C是显示根据本发明的第二实施方式的电子元件封装结构的一种连接焊盘形成方法的一种变体1的部分截面图。
图8A至8D是显示根据本发明的第二实施方式的电子元件封装结构的一种连接焊盘形成方法的一种变体2的部分截面图；以及
图9A至9E是显示本发明的一个第三实施方式的一种电子元件封装结构的制造方法的部分截面图。
具体实施方式
以下参照附图说明本发明的实施方式。
首先，下文中将说明半导体芯片被掩埋在绝缘层中并被封装的半导体器件制造中的缺点。图1A和1B是显示半导体芯片被掩埋在绝缘膜中并被封装的半导体器件制造中的缺点的截面图。
首先，如图1A所示，一个第一夹层绝缘膜102形成在一个基底100上，该基底上具有预定的布线图案(未显示)。然后，形成一个Cu布线104，该布线通过形成在第一夹层绝缘膜102中的通路孔(未显示)连接到基底100上的布线图案。一个其上具有Al焊盘108a的半导体芯片108通过一个粘合层106固定到Cu布线104上，使连接终端108a方向向上(以正面向上的方式)。
然后，如图1B所示，一个第二夹层绝缘膜110形成在半导体芯片108和Cu布线104上。然后，半导体芯片108上的Al焊盘108a上的第二夹层绝缘膜110的预定部分被激光蚀刻以形成通路孔110a。
此时，半导体芯片108上的Al焊盘108a具有这样的性质：它们容易在第二夹层绝缘膜110的蚀刻之后执行过蚀刻时被激光所蚀刻。因此，Al焊盘108a的铝散布在通路孔110a的周围，从而在某些情况下通路孔110a的底部的Al消失。
另外，由于Al焊盘108a被激光所破坏，因此在Al焊盘108a下和其周围以下区域中的电路元件被损坏。这引起半导体器件的芯片产量的下降。
本发明的实施方式的电子元件封装结构能够克服上述问题。
(第一实施方式)
接下来下文中将说明本发明的一个第一实施方式的一个电子元件封装结构的一种制造方法。图2A至2K是显示本发明的一个第一实施方式的一种电子元件封装结构的制造方法的部分截面图。图3至图5是显示根据本发明的第一实施方式的电子元件封装结构的一个连接焊盘的变体的部分截面图。
首先，如图2A所示，准备一个硅片(半导体片)10上形成了预定的晶体管、多层布线(未显示)等，其厚度约为400μm。由铝(Al)或Al合金制成的Al焊盘12从硅片10的上表面暴露出来，硅片10除Al焊盘12之外的部分被由硅氮膜、聚酰亚胺树脂或类似物质制成的钝化膜11所覆盖。
然后，如图2B所示，一层镍(Ni)膜14通过非电解电镀形成在硅片10的Al焊盘12上。以下将详细说明形成方法的一个例子。首先，通过用包含酸浸渍脱脂材料的预处理溶液(1)处理硅片10进行脱脂。然后，通过用诸如过硫酸铵或过氧化氢溶液和硫磺酸的混合液体或类似溶液的预处理溶液(2)处理硅片10进行软蚀刻。
然后通过用诸如盐酸、稀硫酸或类似的溶液的预处理溶液(3)处理硅片10进行酸清理。然后通过用包括钯系列的催化剂应用材料的预处理溶液(4)处理硅片10进行催化剂处理。
通过这种方式进行了预处理，以执行硅片10的Al焊盘12上的Ni膜14的非电解电镀。在这种情况下，由于Al焊盘可以容忍上述预处理溶液(1)至(4)，则不会产生Al焊盘12被预处理溶液蚀刻的问题。
然后硅片10被浸渍在具有例如氨基磺酸镍(400克/升)、镍(100克/升)、硼化镍(15克/升)，硼酸(40克/升)成分的电镀液体中。从而厚度约为1至3μm的Ni镍膜14被选择性地形成在了硅片10的Al焊盘12上。
然后，同样如图2B所示，一层铜(Cu)膜16通过非电解电镀形成在硅片10的Ni膜14上。以下将详细说明形成方法的一个例子。首先通过用包含表面活性剂的预处理溶液(1)处理硅片10进行调节过程。然后，通过用诸如过硫酸铵或过氧化氢溶液和硫磺酸的混合液体或类似溶液的预处理溶液(2)处理硅片10进行软蚀刻。
然后通过用诸如盐酸、稀硫酸或类似的溶液的预处理溶液(3)处理硅片10进行酸清理。然后通过用包括的钯胶质溶液的预处理溶液(4)处理硅片10进行催化剂处理。然后，通过用诸如盐酸、稀硫酸或类似的溶液的预处理溶液(5)处理硅片10进行加速过程。
通过这种方式进行了预处理，以执行硅片10的Ni膜14上的Cu膜的非电解电镀。在这种情况下，由于Ni膜可以容忍上述预处理溶液(1)至(5)，则不会产生Ni膜14被预处理溶液蚀刻的问题。
然后，同样如图2B所示，硅片10被浸渍在包含诸如硫酸铜、氢氧化钠、甲醛、罗谢尔盐和表面活性剂的电镀液体(温度：约45℃)中。从而厚度约为1至5μm的Cu膜被选择性地形成在Ni膜14上。
因此，Ni膜14和Cu膜16被选择性地形成在Al焊盘12上，从而获得了连接焊盘18。Cu膜16作为连接焊盘18的最上层在通路孔形成在夹层绝缘膜中时充当防蚀刻层，夹层绝缘膜通过激光形成在Al焊盘12上。这是因为Cu膜与Al膜相比具有非常低的激光蚀刻率。
在这种情况下，可采用直接在Al焊盘12上形成Cu膜16而不在中间使用Ni膜14的方法。但可以理解如果在Al焊盘12暴露的情况下将一系列预处理加到Cu膜16的非电解电镀中，则将引起Al焊盘12的腐蚀，因此这种方法是不可取的。
在以上模式中，具有较小的激光蚀刻率的Cu膜16形成为最上层的结构被显示为连接焊盘18。除Cu膜外，金(Au)膜、银(Ag)膜或类似的膜也可作为具有较小激光蚀刻率的金属。
因此，可采用以下结构作为连接焊盘18的结构。尤其地，作为连接焊盘18的一个变体1，如图3所示，连接焊盘可从底部开始依次由Al焊盘12、厚度约为1至3μm的Ni膜14、厚度约为0.05至0.15μm的金(Au)膜17形成。在这种情况下，Au膜17选择性地形成在Ni膜14上，形成方法是将在其上形成Ni膜14的硅片10浸渍在电解液(温度：约50℃)中，该电解液包含金(10克/升)，诸如柠檬酸、乙酸或类似物质的有机酸(100克/升)，诸如KOH、NaOH等物质的氢氧化物(50克/升)，以及钴或镍(100毫克/升)。
同样，作为连接焊盘的一个变体2，如图4所示，可采用从底部开始依次由Al焊盘12、厚度约为1至3μm的Ni膜14、厚度约为1至5μm的Cu膜16以及厚度约为0.05μm的Au膜17形成的连接焊盘。
另外，作为连接焊盘的一个变体3，如图5所示，可采用从底部开始依次由Al焊盘12、厚度约为1至3μm的Ni膜14、厚度约为1至5μm的银(Ag)膜19形成的连接焊盘。Ag膜19通过通常的非电解电镀选择性地形成在Ni膜14上。
通过这种方式，根据本实施方式的连接焊盘18被形成为激光蚀刻率小于Al膜的金属膜(Cu膜16、Au膜17、Ag膜19)被覆盖为最上层的状态。另外，在本实施方式中，在Al焊盘12上形成的金属膜不通过掩盖步骤而是通过非电解电度选择性地形成。当然在这种情况下，也可以采用除具有上述分层结构的连接焊盘18的例子之外的变体。
然后，如图2C所示，硅片10的不形成元件的表面(下文中称为“背面”)被削磨机削磨。从而硅片的厚度从约400μm减小为约10至150μm。
然后，如图2D所示，通过切割硅片10获得分成单片的多个半导体芯片20(电子元件)。在这种情况下，半导体芯片20是电子元件的一个例子。但也可实施不同的电子元件，例如，在一个表面上提供电容元件、电阻的硅芯片。
接下来，下文将说明其上安装了上述半导体芯片20的布线基底的一个例子。
首先，如图2E所示，准备一个用于制造内置布线基底的基底24。此基底24是由诸如树脂等的绝缘材料制成的。同样，在基底24中提供通路孔24a，一个连接到形成在基底24上的第一布线图案26的通路孔电镀层24b形成在通路孔24a的内表面上，通路孔被树脂体24c填充。
然后，形成一个用于覆盖第一布线图案26的第一夹层绝缘膜28。对于第一夹层绝缘膜28，可采用诸如环氧树脂、聚酰亚胺树脂、聚亚苯醚树脂的树脂膜。例如，通过将树脂膜层压在第一布线图案26上然后通过在80至100℃退火固化该膜来形成厚度约为30至50μm的树脂层。
在这种情况下，作为第一夹层绝缘膜28的树脂层除通过上述层压树脂膜的方法形成外，还可通过旋转覆盖方法或印刷方法形成。同样，除树脂层外，通过CVD方法形成的硅氧化物膜或类似的膜也可被用来作为第一夹层绝缘膜28。
然后，第一通路孔28x形成在第一布线图案26上的第一夹层绝缘膜28的预定部分中。
然后，第二布线图案26a通过半加法形成在第一夹层绝缘膜28上。下文中将更详细地说明。一个种子Cu层(未显示)形成在第一通路孔28x的内表面和第一夹层绝缘层28的上表面上，然后形成一个在预定模式中具有开口部分的抗蚀膜(未显示)。然后，一层Cu膜通过用种子Cu膜作为电镀能量供给层进行电解电镀形成在所述抗蚀膜的开口部分上。然后抗蚀膜被去除，种子Cu膜通过用Cu膜作为掩膜被蚀刻。从而形成通过第一通路孔28x连接到第一布线图案26的第二布线图案26a。
此处第二布线图案26a可通过削减法或全加法而不是半加法来形成。
然后，如图2F所示，上述半导体芯片20的背面通过粘合层27粘合到第二布线图案26a。从而半导体芯片20以连接焊盘18方向向上的状态被安装(正面安装)。
然后，如图2G所示，在半导体芯片20和第二布线图案26a上形成一个第二夹层绝缘膜28a，它与上述第一夹层绝缘膜28一样是由树脂层或类似的材料制成的。然后，第二通路孔28y通过用激光蚀刻半导体芯片20的连接焊盘18上的第二夹层绝缘膜28a的预定部分形成。根据此步骤，第二通路孔28y也通过用激光蚀刻第二布线图案26a上的第二夹层绝缘膜28a的预定部分形成。
此时，连接焊盘18的最上层在第二夹层绝缘膜28a被激光蚀刻后执行过蚀刻时被暴露给了激光。但是，由于连接焊盘18的最上层是由激光蚀刻率较小的Cu膜16制成，因此Cu膜16作为防蚀刻层。因此，不像连接焊盘由Al膜制成时的情况那样，现在可以避免Al从连接焊盘18散布到其周围或连接焊盘1 8以下或其周围以下区域中形成的电路元件被损坏的事件。现在如果连接焊盘18的最上层是由Au膜17、Ag膜19或类似的膜制成(图3至5)，则可实现相同的优点。
关于激光可采用CO2激光(波长：10.64nm)，YAG激光(第三谐波(波长：0.355nm))、KrF受激准分子激光(波长：0.248nm)或类似的激光。
如果连接焊盘18的最上层由Cu膜16制成，则宜采用对Cu膜16具有比其他激光更小的蚀刻率的CO2激光。同样，如果连接焊盘18的最上层由Ag膜19制成，则宜采用对Ag膜19具有比其他激光更小的蚀刻率的YAG激光。
同样，为了增强激光照射时的热传导性并抑制产生的热量，防蚀刻层(Cu膜16等)宜被设为具有尽可能厚的膜厚度和尽可能大的焊盘面积。作为基于该方面的一个首选例子，Cu膜16的膜厚度设为约3μm或更厚，连接焊盘18的焊盘面积设为约80μm至100μm，第二通路孔28y的直径设为约50至60μm。
此处，当用RIE(反应离子蚀刻)代替激光形成通路孔时，具有上述结构的连接焊盘18与采用Al焊盘时的情况相比，可以更好地抑制过蚀刻时连接焊盘18的材料飞溅。因此，具有这样结构的连接焊盘18是很方便的。
然后，如图2H所示，一层种子Cu膜30a形成在结构体上(图2G)，半导体芯片20的连接焊盘从它那里被非电解电镀暴露出来。此时，如果连接焊盘18只由Al膜制成，则可能引起连接焊盘18和种子Cu膜30a之间的粘合度问题。但是，在本实施方式中，由于种子Cu膜30a是形成在作为连接焊盘18的最上层的防蚀刻层上的(在图2H的例中是Cu膜16)，则可以提高连接焊盘18和种子Cu膜30a之间的粘合度。
然后，如图2I所示，具有对应于第三布线图案的开口部分32a的抗蚀膜32通过光刻法形成在种子Cu膜30a上。然后，Cu膜图案30b可通过电解电镀使用Cu膜30a作为电镀能供给层形成在抗蚀膜32的开口部分32a中。
然后，如图2J中所示，抗蚀层32被去除。然后，通过在用Cu膜图案30b作为掩模的同时向种子Cu膜30a应用湿法蚀刻形成第三布线图案26b。这里，可通过在此步骤后重复图2F至图2J中的步骤预定的次数，以多层的方式形成内嵌了半导体芯片20的夹层绝缘膜以及布线图案。
然后，如图2K所示，在第三布线图案26b上形成一个防焊膜34，在其连接部分26x上具有开口部分34a。然后准备一个其上具有突出部分36的半导体芯片20a。然后突出部分36通过倒装(flip-chip bonding)法连结到第三布线图案26b的连接部分26x。此时，Ni/Au镀层被加到第三布线图案26b的连接部分26x。
在这种情况下，突出部分可通过在焊接抗蚀膜34中的开口部分34a上安装焊接球或类似的方法形成，然后半导体芯片20a的连接终端可连结到突出部分。以外，如果图2K中的结构体必须被分割以包含预定数目的半导体芯片20a，半导体芯片20a可在倒装安装之前或之后分割。
以上部分完成了本发明的一个电子元件封装结构1。
在第一实施方式的电子元件封装结构中，半导体芯片20正面向上安装在基底24上的第二布线图案26a上，其安装状态是该半导体芯片20被掩埋在第二夹层绝缘膜28a中。半导体芯片20的连接焊盘18以由难以被激光蚀刻的材料制成的防蚀刻层(Cu膜16或类似的膜)作为最上层。由激光打孔的第二通路孔28y形成在半导体芯片20的连接焊盘18上的第二夹层绝缘膜28a中。
连接到半导体芯片20的连接焊盘18的第三布线图案26b通过通路孔28y电连接到第二布线图案26a。另外，形成在第三布线图案26b的连接部分26x处具有开口部分34a的抗焊膜34，然后半导体芯片20a的突出部分36通过倒装安装安装到第三布线图案26b的连接焊盘26x。在这种方法中，半导体芯片20的连接焊盘18连接到布线基底上的预定布线图案，并且半导体芯片20也与放置在此芯片上的半导体芯片20a相互连接。
在这种情况下，在本实施方式中，举出了半导体芯片20处在被掩埋在第二夹层绝缘膜28a中的状态并被安装在布线基底上的第二布线图案26a上的模式作为例子。也可采用半导体芯片20被类似的掩埋在夹层绝缘膜中并被安装在第一布线图案26或第三布线图案26b中的模式。另外，可采用半导体芯片20安装在基底24或第一或第二夹层绝缘膜28、28a上的模式。即基底24、第一至第三布线图案26至26b，第一或第二夹层绝缘膜28、28a等可作为安装半导体芯片20的安装体。
另外，可采用以下模式：多个半导体芯片20分别被类似地掩埋在多个夹层绝缘膜中，以多层方式三维地堆叠以进行封装，并且这些半导体芯片20通过多个通路孔相互连接。
在本实施方式的电子元件封装结构1中，如上文所述，在激光过程中半导体芯片20的连接焊盘18用防蚀刻层(Cu膜16、Au膜17、Ag膜19等)作为最上层。因此，第二通路孔28y通过通常的激光通路形成方法在第二夹层绝缘膜28a中形成，不产生问题。由于此原因，在激光通路形成步骤中，消除了半导体芯片20的连接焊盘18消失或连接焊盘18之下或周围以下区域中的电路元件被损坏的可能。
综上所述，电子元件封装结构1可很容易地制造，在高产的时候也不会引起成本的增加。另外，即使通过形成内嵌了半导体芯片20的夹层绝缘膜来制造高密度电子元件封装结构，以及布线图案为多层时，也能高度可靠地制造高性能的封装结构。
(第二实施方式)
图6A至6G是显示本发明的一个第二实施方式的一种电子元件封装结构的制造方法的部分截面图。图7A至7C是同样地显示根据电子元件封装结构的一种连接焊盘形成方法的一种变体1的部分截面图。图8A至8D是同样地显示根据电子元件封装结构的一种连接焊盘形成方法的一种变体2的部分截面图。
第二实施方式与第一实施方式的一个不同点在于不采用非电解电镀法而采用光刻法作为在Al焊盘12上选择性地形成防蚀层的方法。在图6A至6G、图7A至7C以及图8A至8D中，将省去对与图2A至2K中相同的元素和相同步骤的详细说明。
在根据本发明的第二实施方式的电子元件封装结构的制造方法中，首先，如图6A所示，与图2A一样，以与第一实施方式相同的方法准备具有Al焊盘12被暴露而其他部分被钝化膜11覆盖的结构的硅片10(半导体片)。
然后，如图6B所示，厚度约为0.05μm的铬(Cr)膜13通过喷溅或类似的方法形成在Al焊盘12和钝化膜11上。这里钛(Ti)膜可用来代替铬(Cr)膜13。然后一层厚度约为0.05至2μm的Cu膜16x通过喷溅或类似的方法形成在Cr膜13上。
然后，如图6C所示，被布置为覆盖对应于Al焊盘12的部分的抗蚀膜15通过光刻形成在Cu膜16x上。然后Cu膜16x在用抗蚀膜15作掩模的同时通过使用一种包含氢硼酸(HBr)和过硫酸铵的溶液(常温)被湿法蚀刻侵蚀。然后，Cr膜13同样在用抗蚀膜15作掩模的同时通过使用一种包含三氯化铁(FeCl3)和盐酸(HCl)的溶液(40℃)被湿法蚀刻侵蚀。然后去除抗蚀膜15。
这样，如图6D所示，Cr膜13和Cu膜16x选择性地形成在Al焊盘12上，从而获得了根据第二实施方式的连接焊盘18x。
接下来，下文将说明根据第二实施方式的形成连接焊盘18x的方法的变体。对于变体1，首先，如图7A所示，通过光刻形成在对应于Al焊盘12的部分具有开口部分15a的抗蚀膜15。
然后，如图7B所示，Cr膜13和Cu膜16x通过与上述相同的喷溅或类似的方法依次形成在Al焊盘12和抗蚀膜15上。
然后通过抗蚀膜去除液体去除抗蚀膜15。从而，如图7C所示，形成在抗蚀膜15上的Cr膜13和Cu膜16x通过所谓的提升去除方法与抗蚀膜15一起同时被去除，同样形成在Al焊盘12上的Cr膜13(或Ti膜)和Cu膜16x留了下来，从而获得了具有与上述结构相同结构的连接焊盘18x。在此变体1中，Ti膜可用来代替Cr膜13。
同样，对于变体2，首先如图8A所示，厚度约为0.05μm的Cr膜13和厚度约为0.05μm的第一Cu膜16x依次通过喷溅或类似的方法形成在与图6A具有相同结构的硅片10上的Al焊盘12和钝化膜11上。
然后，如图8B所示，通过光刻形成在第一Cu膜16x部分对应于Al焊盘12具有开口部分15a的抗蚀膜15。然后，如图8C所示，厚度均为约5至10μm的第二Cu膜16y通过利用第一Cu膜16x作为电镀能量供给层同时利用抗蚀膜15作为掩模而电解电镀形成在抗蚀膜15的开口部分15a中。
然后去除抗蚀膜15。然后第一Cu膜16x和Cr膜13依次通过湿法蚀刻利用与上述方法相同的蚀刻剂被蚀刻，同时使用第二Cu膜16y作为掩模。
从而，如图8D所示，Cr膜13、第一Cu膜16x以及第二Cu膜16y选择性地形成在Al焊盘12上，从而获得连接焊盘18x。在变体2中，可采用Ti膜代替Cr膜13。
如第一实施方式中所说明的，如果为了提高连接焊盘18x的热传导性等形成了具有较大厚度(超过约3μm)的Cu膜，则可料想膜形成或湿法蚀刻中的生产量对利用上述喷溅方法和光刻的形成方法提出了问题。因此，在变体2中，首先薄Cr膜13和薄的第一Cu膜16x通过喷溅方法形成，然后厚的第二Cu膜16y通过电解电镀在Al焊盘12上选择性地形成。然后，连接焊盘18x通过蚀刻第一Cu膜16x和Cr膜13，同时用厚的第二Cu膜16y作为掩模而形成。
通过进行此操作，在使用喷溅方法和光刻的第二实施方式中，具有厚的防蚀刻层的连接焊盘18x可以容易地形成。
如上文所述，连接焊盘18x可通过使用变体1或变体2中的形成方法形成。
然后，如图6E所示，正如第一实施方式那样，其上形成连接焊盘18x的硅片10的背面被削磨机削磨。从而硅片10的厚度减为10至150μm。
然后，如图6F所示，正如第一实施方式那样，其上形成连接焊盘18x的硅片10被切割。从而获得分割成单片的多个半导体芯片20x。
然后，如图6G所示，通过使用半导体芯片20x执行与第一实施方式中的图2E至图2K中相同的步骤。从而可获得第二实施方式的一个电子元件封装结构1a。
第二实施方式的电子元件封装结构1a可实现与第一实施方式相同的优点。
在这种情况下，第一实施方式中说明的多种修改和变体也可被应用到第二实施方式中。
(第三实施方式)
图9A至9E是显示本发明的一个第三实施方式的一种电子元件封装结构的制造方法的部分截面图。第三实施方式与第一实施方式的一个不同点是激光过程中的防蚀刻层是通过在Al焊盘12上形成导电贴层形成的。在第三实施方式中，将省略对与第一实施方式中相同的步骤的详细说明。
在制造本发明的第三实施方式的电子元件封装结构的方法中，首先，如图9A所示，准备其上具有与第一实施方式相同的Al焊盘12的硅片10(半导体片)。然后，如图9B所示，一层导电贴膜38选择性地形成在Al焊盘12上。例如，通过利用丝网印刷等将导电贴合材料覆盖在Al焊盘12上，然后固化材料形成导电贴膜38。从而获得均由Al焊盘12和导电贴膜38组成的连接焊盘18y。
对于导电贴层38，可采用通过将诸如铜(Cu)、银(Ag)、金(Au)、镍(Ni)等导电粒子扩散到环氧树脂或聚茚树脂中形成的贴层。在第三实施方式中，正如第一实施方式中说明的Cu膜16或类似的膜那样，导电贴膜38作为激光过程中的防蚀刻层。
通过利用导电贴膜38，不需要复杂的步骤即能在短时间内容易地形成厚度约为10μm的防蚀刻层。
在这种情况下，可采用在Al焊盘12和导电贴膜38之间形成Cr膜或Ti膜的模式。Cr膜或Ti膜可通过喷溅、光刻或电解电镀选择性地形成在Al焊盘12上。
然后，如图9C所示，正如第一实施方式那样，其上形成连接焊盘18y的硅片10被削磨机削磨。从而硅片10的厚度减为10至150μm。
然后，如图9D所示，正如第一实施方式那样，其上形成连接焊盘18y的硅片10被切割。从而获得分割成单片的多个半导体芯片20y。
然后，如图9E所示，通过使用半导体芯片20y执行与第一实施方式中的图2E至图2K中相同的步骤。从而可获得第三实施方式的一个电子元件封装结构1b。
第三实施方式的电子元件封装结构1b可实现与第一实施方式相同的优点。
在这种情况下，第一实施方式中说明的多种修改和变体也可被应用到第三实施方式中。
以上参考第一至第三实施方式说明了本发明的细节。本发明的范围不限于上述实施方式中具体显示的例子。应认为上述实施方式的在要点范围内的未背离本发明的变体是包含在本发明的范围之内的。
本发明的一个特征是在半导体芯片的基本金属焊盘(例如Al焊盘)上提供与所述金属焊盘相比具有较低的激光蚀刻率的防蚀刻层。
在实施方式中，举了在Al焊盘上提供具有较低激光蚀刻率的金属膜或导电贴膜的模式作为例子。但也可采用在除Al之外的金属焊盘上形成与金属焊盘相比具有较低的激光蚀刻率的金属膜或导电贴膜的模式。即本发明可被应用于具有所需的除Al焊盘的不同金属焊盘的电子元件。

Claims (16)

1.一个电子元件封装结构包括：
一个安装体，其上安装一个电子元件；
该电子元件具有一个连接焊盘，它由一个层叠膜构成，层叠膜具有一个防蚀刻层作为最上层，并且电子元件安装在安装体上使连接焊盘方向向上；
一层用于覆盖电子元件的绝缘膜；
一个至少形成在电子元件的连接焊盘上的绝缘膜的预定部分中的通路孔；以及
通过通路孔连接到连接焊盘的布线图案。
2.根据权利要求1的一个电子元件封装结构，其中防蚀刻膜是从由一层铜膜、一层金膜、一层银膜和一层导电贴膜组成的组中选出的一种。
3.根据权利要求1的一个电子元件封装结构，其中连接焊盘是从由铝膜/镍膜/铜膜，铝膜/镍膜/金膜，铝膜/镍膜/铜膜/金膜，铝膜/镍膜/银膜，铝膜/铬膜/铜膜，铝膜/导电贴膜，铝膜/钛膜/导电贴膜，铝膜/铬膜/导电贴膜，以及铝膜/钛膜/铜膜组成的组中选出的一个层叠膜构成，这些膜分别由底部开始依次形成。
4.根据权利要求1的一个电子元件封装结构，其中安装体是一个其上具有一个布线图案的基底，或一个结构体，其中一层绝缘膜和一个布线图案在基底上被层叠预定次数，并且连接到所述连接焊盘的布线图案通过在绝缘膜中形成的通路孔被电连接到电子元件下方的布线图案。
5.根据权利要求4的一个电子元件封装结构，其中多个电子元件处于被掩埋在多个绝缘膜中的状态并被三维地封装，并且所述多个电子元件通过在多个绝缘膜中形成的多个通路孔和布线图案相互连接。
6.根据权利要求1的一个电子元件封装结构，其中一个上方的电子元件的一个突出部分安装在布线图案上，其通过倒装安装法连接到电子元件的连接焊盘。
7.根据权利要求1的一个电子元件封装结构，其中电子元件的厚度被设为约等于或小于150μm。
8.一种制造一个电子元件封装结构的方法包括以下步骤：
准备一个电子元件，该电子元件具有一个由层叠膜构成的连接焊盘，该层叠膜用一层防蚀刻膜作为最上层膜；
将电子元件安装在一个安装体上，使连接焊盘方向向上。
形成一层绝缘膜以覆盖电子元件；
通过用激光蚀刻连接焊盘上方的绝缘膜的至少一个预定部分形成一个通路孔；以及
形成一个通过通路孔连接到连接焊盘的布线图案。
9.根据权利要求8的一种制造一个电子元件封装结构的方法，其中防蚀刻膜是从由一层铜膜、一层金膜、一层银膜和一层导电贴膜组成的组中选出的一种。
10.根据权利要求8的一种制造一个电子元件封装结构的方法，其中连接焊盘是从由铝膜/镍膜/铜膜，铝膜/镍膜/金膜，铝膜/镍膜/铜膜/金膜，铝膜/镍膜/银膜，铝膜/铬膜/铜膜，铝膜/导电贴膜，铝膜/钛膜/导电贴膜，铝膜/铬膜/导电贴膜，以及铝膜/钛膜/铜膜组成的组中选出的一个层叠膜构成，这些膜分别由底部开始依次形成，并且连接焊盘的最上层膜在用激光形成通路孔时作为防蚀刻层。
11.根据权利要求10的一种制造一个电子元件封装结构的方法，其中连接焊盘是由铝膜/镍膜/铜膜，铝膜/镍膜/金膜，铝膜/镍膜/铜膜/金膜，或铝膜/镍膜/银膜形成的，以及
准备电子元件的步骤包括以下步骤：
通过非电解电镀在具有铝焊盘的硅片的一个铝焊盘上选择性地形成镍膜，
通过非电解电镀在镍膜上选择性地形成铜膜、金膜、铜膜/金膜或银膜以形成连接焊盘，
通过削磨半导体片的背面减小厚度，以及
切割半导体片以获得电子元件。
12.根据权利要求10的一种制造一个电子元件封装结构的方法，其中连接焊盘由铝膜/铬膜/铜膜，或铝膜/钛膜/铜膜形成，以及
准备电子元件的步骤包括以下步骤：
在一个具有一个铝焊盘的半导体片上依次形成铬膜或钛膜，以及铜膜，
加工制定铜膜和铬膜或钛膜的图案，使铬膜或钛膜以及铜膜留在铝焊盘上，从而形成连接焊盘，
通过削磨半导体片的背面减小厚度，以及
切割半导体片以获得电子元件。
13.根据权利要求10的一种制造一个电子元件封装结构的方法，其中连接焊盘由铝膜/铬膜/铜膜，或铝膜/钛膜/铜膜形成，以及
准备电子元件的步骤包括以下步骤：
形成一个抗蚀膜，它在具有铝焊盘的半导体片的一个铝焊盘上具有一个开口部分，
在抗蚀膜和铝焊盘上依次形成铬膜或钛膜，以及铜膜，
去除抗蚀膜，并提升抗蚀膜上的铬膜或钛膜以及铜膜，以选择性地在铝焊盘上留下铬膜或钛膜以及铜膜，从而形成连接焊盘，
通过削磨半导体片的背面减小厚度，以及
切割半导体片以获得电子元件。
14.根据权利要求10的一种制造一个电子元件封装结构的方法，其中连接焊盘由铝膜/铬膜/铜膜，或铝膜/钛膜/铜膜形成，以及
准备电子元件的步骤包括以下步骤：
在一个具有一个铝焊盘的半导体片上依次形成铬膜或钛膜以及一个第一铜膜，
形成一个抗蚀膜，它在第一铜膜的对应铝焊盘的一部分上具有一个开口部分，
通过电解电镀在抗蚀膜的开口部分中形成一个第二铜膜，
去除抗蚀膜，然后通过利用第二铜膜作为掩模蚀刻第一铜膜以及铬膜或钛膜，从而形成连接焊盘，
通过削磨半导体片的背面减小厚度，以及
切割半导体片以获得电子元件。
15.根据权利要求10的一种制造一个电子元件封装结构的方法，其中连接焊盘由铝膜/导电贴膜，铝膜/钛膜/导电贴膜，或铝膜/铬膜/导电贴膜形成，以及
准备电子元件的步骤包括以下步骤：
通过将导电贴合材料选择性地覆盖在一个具有铝焊盘的半导体片的一个铝焊盘上，或形成在铝焊盘上的钛膜或铬膜上，以形成导电贴膜，
通过削磨半导体片的背面减小厚度，以及
切割半导体片以获得电子元件。
16.根据权利要求8的一种制造一个电子元件封装结构的方法，其中安装体是一个其上具有布线图案的基底，或者一个结构体，其中一个绝缘膜和一个布线图案在基底上叠预定次数。
在形成通路孔的步骤中，通路孔同时形成在电子元件下的布线图案上的绝缘膜的一个预定部分中，以及
在形成连接到连接焊盘的布线图案的步骤中，连接到连接焊盘的布线图案被形成为通过通路孔电连接到电子元件下的布线图案。
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