ATE551722T1 - Verkapseltes halbleiterprodukt und verfahren zu seiner herstellung - Google Patents

Verkapseltes halbleiterprodukt und verfahren zu seiner herstellung

Info

Publication number
ATE551722T1
ATE551722T1 AT09769778T AT09769778T ATE551722T1 AT E551722 T1 ATE551722 T1 AT E551722T1 AT 09769778 T AT09769778 T AT 09769778T AT 09769778 T AT09769778 T AT 09769778T AT E551722 T1 ATE551722 T1 AT E551722T1
Authority
AT
Austria
Prior art keywords
protective envelope
electronic structure
semiconductor product
producing
substrate
Prior art date
Application number
AT09769778T
Other languages
English (en)
Inventor
Eric Pieraerts
Jean-Marc Yannou
Stephane Bellenger
Mickael Pommier
Original Assignee
Nxp Bv
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nxp Bv filed Critical Nxp Bv
Application granted granted Critical
Publication of ATE551722T1 publication Critical patent/ATE551722T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/561—Batch processing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3185—Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L24/19—Manufacturing methods of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04105—Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
    • H01L2224/20—Structure, shape, material or disposition of high density interconnect preforms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01082—Lead [Pb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
AT09769778T 2008-06-26 2009-06-26 Verkapseltes halbleiterprodukt und verfahren zu seiner herstellung ATE551722T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP08290622 2008-06-26
PCT/IB2009/052773 WO2009156970A1 (en) 2008-06-26 2009-06-26 Packaged semiconductor product and method for manufacture thereof

Publications (1)

Publication Number Publication Date
ATE551722T1 true ATE551722T1 (de) 2012-04-15

Family

ID=41016913

Family Applications (1)

Application Number Title Priority Date Filing Date
AT09769778T ATE551722T1 (de) 2008-06-26 2009-06-26 Verkapseltes halbleiterprodukt und verfahren zu seiner herstellung

Country Status (5)

Country Link
US (1) US8963314B2 (de)
EP (1) EP2291858B1 (de)
CN (1) CN102077341B (de)
AT (1) ATE551722T1 (de)
WO (1) WO2009156970A1 (de)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2390909A1 (de) * 2010-05-24 2011-11-30 Jerry Hu Miniaturverkapselung für diskrete Bauelemente
US8310040B2 (en) 2010-12-08 2012-11-13 General Electric Company Semiconductor device package having high breakdown voltage and low parasitic inductance and method of manufacturing thereof
US8431444B2 (en) * 2011-08-16 2013-04-30 General Electric Company Epoxy encapsulating and lamination adhesive and method of making same
DE102011112659B4 (de) * 2011-09-06 2022-01-27 Vishay Semiconductor Gmbh Oberflächenmontierbares elektronisches Bauelement
TWI501363B (zh) * 2014-01-10 2015-09-21 Sfi Electronics Technology Inc 一種小型化表面黏著型二極體封裝元件及其製法
US10211172B2 (en) 2014-03-13 2019-02-19 Maxim Integrated Products, Inc. Wafer-based electronic component packaging
US9887165B2 (en) 2014-12-10 2018-02-06 Stmicroelectronics S.R.L. IC with insulating trench and related methods
DE112017002564B4 (de) * 2016-05-17 2021-12-16 Mitsubishi Electric Corporation Halbleitervorrichtung und zugehöriges herstellungsverfahren
FR3085575B1 (fr) 2018-09-03 2021-06-18 St Microelectronics Tours Sas Boitier de puce electronique
US20200098698A1 (en) * 2018-09-26 2020-03-26 Intel Corporation Novel wafer level chip scale package (wlcsp), flip-chip chip scale package (fccsp), and fan out shielding concepts
JP7120521B2 (ja) * 2018-12-25 2022-08-17 住友電工デバイス・イノベーション株式会社 電子部品の製造方法及び半導体装置の製造方法
US10937709B2 (en) * 2019-01-11 2021-03-02 Infineon Technologies Ag Substrates for semiconductor packages
FR3093230B1 (fr) * 2019-02-27 2023-01-06 St Microelectronics Tours Sas Boîtier de puce électronique
CN113488439A (zh) * 2021-07-06 2021-10-08 中国电子科技集团公司第五十八研究所 一种数字隔离器及隔离结构的制作方法

Family Cites Families (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4249299A (en) * 1979-03-05 1981-02-10 Hughes Aircraft Company Edge-around leads for backside connections to silicon circuit die
JP3105089B2 (ja) * 1992-09-11 2000-10-30 株式会社東芝 半導体装置
US5353498A (en) 1993-02-08 1994-10-11 General Electric Company Method for fabricating an integrated circuit module
JPH10270506A (ja) * 1997-03-21 1998-10-09 Mitsubishi Electric Corp 半導体装置
US6049124A (en) * 1997-12-10 2000-04-11 Intel Corporation Semiconductor package
JP3602000B2 (ja) * 1999-04-26 2004-12-15 沖電気工業株式会社 半導体装置および半導体モジュール
JP4403631B2 (ja) * 2000-04-24 2010-01-27 ソニー株式会社 チップ状電子部品の製造方法、並びにその製造に用いる擬似ウエーハの製造方法
US6603191B2 (en) * 2000-05-18 2003-08-05 Casio Computer Co., Ltd. Semiconductor device and method of manufacturing the same
FI111197B (fi) * 2000-07-12 2003-06-13 Nokia Oyj Multichip-moduli
JP2002076175A (ja) * 2000-09-04 2002-03-15 Sony Corp 半導体パッケージおよびその製造方法
JP3831287B2 (ja) * 2002-04-08 2006-10-11 株式会社日立製作所 半導体装置の製造方法
US6964881B2 (en) * 2002-08-27 2005-11-15 Micron Technology, Inc. Multi-chip wafer level system packages and methods of forming same
JP4081666B2 (ja) * 2002-09-24 2008-04-30 セイコーエプソン株式会社 半導体装置及びその製造方法、回路基板並びに電子機器
JP4209178B2 (ja) * 2002-11-26 2009-01-14 新光電気工業株式会社 電子部品実装構造及びその製造方法
JP3574450B1 (ja) * 2003-05-16 2004-10-06 沖電気工業株式会社 半導体装置、及び半導体装置の製造方法
TWI225696B (en) * 2003-06-10 2004-12-21 Advanced Semiconductor Eng Semiconductor package and method for manufacturing the same
JP3759131B2 (ja) * 2003-07-31 2006-03-22 Ｎｅｃエレクトロニクス株式会社 リードレスパッケージ型半導体装置とその製造方法
SG120123A1 (en) * 2003-09-30 2006-03-28 Micron Technology Inc Castellated chip-scale packages and methods for fabricating the same
US7015075B2 (en) 2004-02-09 2006-03-21 Freescale Semiconuctor, Inc. Die encapsulation using a porous carrier
TWI229433B (en) * 2004-07-02 2005-03-11 Phoenix Prec Technology Corp Direct connection multi-chip semiconductor element structure
DE602005013084D1 (de) * 2005-09-15 2009-04-16 Infineon Technologies Ag Elektromagnetische Abschirmung von Gehäusen mit einem Laminatsubstrat
TWI370515B (en) * 2006-09-29 2012-08-11 Megica Corp Circuit component
JP5028988B2 (ja) * 2006-12-13 2012-09-19 ヤマハ株式会社 半導体装置の製造方法
KR100891529B1 (ko) * 2007-07-27 2009-04-03 주식회사 하이닉스반도체 반도체 패키지, 이의 제조 방법

Also Published As

Publication number Publication date
CN102077341B (zh) 2014-04-23
CN102077341A (zh) 2011-05-25
EP2291858B1 (de) 2012-03-28
WO2009156970A1 (en) 2009-12-30
EP2291858A1 (de) 2011-03-09
US20110180897A1 (en) 2011-07-28
US8963314B2 (en) 2015-02-24

Similar Documents

Publication Publication Date Title
ATE551722T1 (de) Verkapseltes halbleiterprodukt und verfahren zu seiner herstellung
TW200709360A (en) Semiconductor die package and method for making the same
SG144131A1 (en) Wafer level package with die receiving through-hole and method of the same
WO2009071595A3 (fr) Dispositif a circuit integre et n/mems encapsule et procede de realisation
SG145644A1 (en) Semiconductor device package with multi-chips and method of the same
TW200644135A (en) Method for fabricating a wafer level package having through wafer vias for external package connectivity and related structure
MY171813A (en) Electronic device including a packaging substrate having a trench
WO2009142391A3 (ko) 발광소자 패키지 및 그 제조방법
TW200725709A (en) Semiconductor apparatus and making method thereof
GB0817831D0 (en) Improved packaging technology
TWI268628B (en) Package structure having a stacking platform
TW200737506A (en) Semiconductor device and manufacturing method of the same
SG142339A1 (en) Package-on-package using through-hole via die on saw streets
TW200705674A (en) Thin film transistor and manufacturing method thereof
HK1149631A1 (en) Wafer level packaging using flip chip mounting
GB0713791D0 (en) Semiconductor chip package
WO2010016975A3 (en) Method of passivating and encapsulating cdte and czt segmented detectors
SG165231A1 (en) Semiconductor die and method of forming noise absorbing regions between thvs in peripheral region of the die
TW200733277A (en) Clipless and wireless semiconductor die package and method for making the same
WO2010012548A3 (de) Verkapselung, mems sowie verfahren zum selektiven verkapseln
TW200725859A (en) Structure and method for packaging a chip
MY155481A (en) Bonding method and bonding apparatus
EP2357665A3 (de) Chipbaugruppe und Herstellungsverfahren dafür
SG145666A1 (en) Semiconductor device package with die receiving through-hole and connecting through hole and method of the same
TW200633246A (en) Semiconductor package having and optical device and the method of making the same