KR960005968A - 집적회로용 볼 그리드 어레이 패키지 - Google Patents

집적회로용 볼 그리드 어레이 패키지 Download PDF

Info

Publication number
KR960005968A
KR960005968A KR1019950020751A KR19950020751A KR960005968A KR 960005968 A KR960005968 A KR 960005968A KR 1019950020751 A KR1019950020751 A KR 1019950020751A KR 19950020751 A KR19950020751 A KR 19950020751A KR 960005968 A KR960005968 A KR 960005968A
Authority
KR
South Korea
Prior art keywords
bga
package
plane
vss
vdd
Prior art date
Application number
KR1019950020751A
Other languages
English (en)
Other versions
KR100378511B1 (ko
Inventor
셀나 에릭
Original Assignee
리 패치
선 마이크로시스템즈, 인코포레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 리 패치, 선 마이크로시스템즈, 인코포레이티드 filed Critical 리 패치
Publication of KR960005968A publication Critical patent/KR960005968A/ko
Application granted granted Critical
Publication of KR100378511B1 publication Critical patent/KR100378511B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H01L23/3677—Wire-like or pin-like cooling fins or heat sinks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48235—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a via metallisation of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30105—Capacitance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

3층 BGA패키지는 상부 및 하부 BGA패키지 트레이스 사이에 배치되는 BGA Vss평면을 포함하며, BGA패키지의 외부 주변상의 상부 및 하부 BGA 패키지 Vss 트레이스를 또한 포함한다. 바이어는 BGA Vss평면을 상부 및 하부 BGA 패키지 Vss 트레이스에 전기적 및 열적으로 접속한다. 다른 바이어들은 BGA패키지의 상부 및 하부 표면상에 Vdd 및 신호 트레이스로 부터 Vdd 및 IC신호를 전기적으로 접속한다. BGA패키지 하부 트레이스에 접속되는 솔더 볼은 시스템 PCB상에 트레이스를 매칭시키기 위하여 결합된다. 주변 Vss트레이스, 바이어 및 솔더 볼들은 BGA Vss평면에서 전류흐름을 유지하는데 도움을 준다. BGA패키지내의 IC에 의하여 감소되는 전류를 위하여 저 임피던스 전류 복귀경로(및 그래서 감소된 접지 바운스 및 감소된 IC 신호 지연 시간)을 추가로 제공하기 위하여, BGA Vss평면이 열 싱킹을 제공한다. 4층 BGA패키지는 BGA패키지의 하부 표면상에서의 BGA Vss평면과 트레이스 중간에 위치하는 BGA Vdd평면을 더 제공한다. 대칭인 2개의 인쇄회로 기판 재료로 부터 제조되는 본 실시예는 IC전류 싱킹 뿐만 아니라 IC전류 소우싱을 위하여 접지 바운드를 감소시키고 종래 기술의 BGA패키지와 비교하여 열 분산에 있어서 거의 100%의 개선을 제공한다.

Description

집적회로용 볼 그리드 어레이 패키지
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도는 본 발명에 따라, 집적회로를 패키지하기 위한 3층 볼 그리드 어레이 구성의 단면도이다.
제3도는 본발명에 따라 집적회로를 패키지하기 위한 4층 볼 그리드 어리이 구성의 단면도이다.

Claims (22)

  1. 개선된 볼 그리드 어페이("BGA")패키지 열적 및 전기적인 특성을 가지는 집적회로용 BGA 패키지에 있어서, Vss 트레이스, Vdd 트레이스 및 신호 트레이스를 포함하며, 대응 IC패드에 접속가능한 접속와이어인 상부층 BGA 패키지트레이스; 트레이스가 상기 상부층 BGA 패키지 트레이스 중의 대응하는 하나와 수직 정렬되는 적어도 한 부분이며, 상기 하부층 BGA 패키지 트레이스의 영역들은 상기 BGA패키지를 접합하기 위하여 사용되는 솔더 볼을 하부의 시스템 인쇄회로기판에 접합가능도록 하는 하부층 BGA패키지 트레이스; 상기 상부 및 하부층 BGA 패키지 트레이스 상이에 배치되는 BGA코어재료; 상기 상부층 BGA Vss 트레이스를 해당 하부층 BGA Vss 트레이스에 접속하는 Vdd 바이어, 상기 상부층 BGA신호 트레이스를 해당 하부층 BGA Vdd 트레이스에 접속하는 Vdd 바이어 및 상기 상부층 BGA 신호 트레이스를 해당 하부층 BGA 신호 트레이스에 접속하는 신호 바이어를 포함하는 바이어; 및 상기 상부 및 하부층 BGA패키지 트레이스의 중간에 배치되며 상기 BGA Vss 바이어와 전기적인 접촉을 이루는 BGA Vss 평면을 포함한느 것을 특징으로 하는 볼 그리드 어레이 패키지.
  2. 제1항에 있어서, 상기 BGA Vss 평면과 상기 하부층 BGA 패키지 트레이스의 중간에 위치하며 상기 Vdd 바이어와 전기적으로 접속하는 BGA Vdd평면을 더 포함하는 것을 특징으로 하는 볼 그리드 어레이 패키지.
  3. 제1항에 있어서 ⒜ 상기 상부층 BGA 패키지 트레이스, 상기 BGA 코어 재료의 일부 및 사이기 BGA Vss 평면, 그리고 ⒝ 상기 BGA Vdd평면, 상기 BGA 코어 재료의 일부 및 상기 하부층 BGA 패키지 트레이스중 선택된 하나가 이중면 인쇄회로기판 재료를 포함하는 것을 특징으로 한느 볼 그리드 어레이 패키지.
  4. 제1항에 있어서, 상기 BGA 코어 재료는 ⒜ FR4 에폭시 유리 및 ⒝프리-프레그로 이루어지는 그룹으로 부터 선택되는 재료를 포함하는 것을 특징으로 하는 볼 그리드 어레이 패키지.
  5. 제1항에 있어서, 상기 BGA Vss 평면은 약 0.03"(0.08㎜)보다 적은 거리에서 상기 IC의 상기 기판으로 부터 수직으로 간격져 떨어져 있는 것을 특징으로 하는 볼 그리드 어레이 패키지.
  6. 제1항에 있어서, 상부층 BGA 패키지 Vss 트레이스는 상기 IC의 기판에 접속되는 BGA 패키지 IC다이 평면을 포함하는 것을 특징으로 하는 볼 그리드 어레이 패키지 .
  7. 개선된 볼 그리드 어레이("BGA")패키지 열적 및 전기적인 특성을 가지는 집적회로용 3층 BGA 패키지에 있어서, 도전물질로 코팅된 제1 및 제2표면 사이에 샌드위치된 제1BGA 코어; 제1표면이 상기 BGA Vss 평면과 접촉하며, 제2표면은 상기 제1BGA 패키지 표면 신호 트레이스와 상기 제2BGA 패키지 표면 신호 트레이스를 결합하며 상기 BGA Vss 평면과 접촉함이 없이 상기 BGA Vss 평면에서의 구멍을 통과하는 Vss 바이어를 포함하며, 상기 제1표면상의 상기 도전물질은 적어도 제1BGA 패키지 표면 Vdd평면, 제1BGA 패키지 표면 신호 트레이스 및 제1BGA 패키지 표면 Vss 평면을 한정하며, 상기 제2표면사의 상기 도전물질은 한정되는 적어도 3개의 바이어구멍을 가지는 BGA Vss평면을 형성하며, 상기 IC는 상기 제1BGA 패키지 표면 Vss 평면 및 상기 제2BGA 패키지 표면 Vss 평면중 선택된 하나에 접속되는 기판을 포함하며,상기 IC는 상기판이 접속되는 선택된 제1 또는 제2BGA 패키지 표면상의 신호 트레이스에 접속와이어에 의하여 접속되는 신호 패드를 더 포함하며, 상기 IC는 상기 기판이 접속되는 선택된 제1 또는 제2BGA 패키지 표면상에 Vdd평면에 접속와이어에 의하여 접속되는 Vdd패드를 포함하고, 솔도 볼은 상기 제1 또는 제2BGA 패키지 표면중 선택되지 않은 것 상에서 트레이스와 평면들이 접촉하는 것을 특징으로 하는 3층 볼 그리드 어레이 패키지.
  8. 제7항에 있어서, 도전 물질로 코팅되는 제1 및 제2표면 사이에 샌드위치되는 상기 제1BGA는 이중면 인쇄회로기판을 포함하는 것을 특징으로 하는 3층 볼 그리드 어레이 패키지.
  9. 제7항에 있어서, 상기 BGA Vss 평면은 약 0.03"(0.08㎜)보다 적은 거리에서 상기 IC의 상기 기판으로 부터 수직으로 간격져 떨어져 있는 것을 특징으로 하는 볼 그리드 어레이 패키지.
  10. 제7항에 있어서, 상기 제1 및 제2BGA 코어중 적어도 하나는 ⒜ FR4 에폭시 유리 및 ⒝프리-프레그로 이루어지는 그룹으로 부터 선택되는 재료를 포함하는 것을 특징으로 하는 볼 그리드 어레이 패키지.
  11. 개선된 볼 그리드 어레이("BGA")패키지 열적 및 전기적인 특성을 가지는 집적회로용 4층 BGA 패키지에 있어서, 도전물질로 코팅된 제1 및 제2표면 상이에 샌드위치되며, 상기 제1표면사의 상기 도전물질은 적어도 제1BGA 패키지 표면 Vdd평면, 제1BGA 패키지 표면 신호 트레이스 및 제1BGA 패키지 표면 Vss평면을 한정하며, 상기 제2표면상의 상기 도전물질은 적어도 3개 바이어 구멍을 가지는 BGA Vss평면을 형성하는 제1BGA 코어; 도전물질로 코팅된 제1 및 제2표면 사이에 샌드위치되며, 사기 제1표면사의 상기 도전물질은 BGAVdd평면을 한정하며 적어도 3개의 바이어 구멍을 가지며, 상기 제2표면사의 상기 도전물질이 적어도 상기 제1BGA 패키지 표면 Vdd평면과 수직 정렬되는 부분인 제2BGA 패키지 표면 Vdd 평면, 상기 제1BGA 패키지 표면 신호 트레이스와 수직 정렬되는 부분인 제2BGA 패키지 표면 신호 트레이스, 및 상기 제 1BGA패키지 표면 Vss 평면과 수직 정렬되는 부분인 제2BGA 패키지 표면 Vss 평면을 한정하는 제2BGA 코어; 상기 BGA Vdd 평면과 접촉하는 동안 바이어 구멍을 통과함으로써 상기 제1BGA 패키지 표면 Vdd평면, 상기 제2BGA 패키지 표면 Vdd 평면 및 상기 BGA Vdd 평면을 접속하며, 상기 BGA Vss평면과 접촉함이 없이 상기 BGA Vss평면에서의 바이어 구멍을 통과하는 Vdd 바이어; 상기 제1BGA 패키지 표면 신호 트레이스 및 제2BGA패키지 표면 신호 트레이스를 접속하며 상기 BGA Vss 평면 및 BGA Vdd 평면 어느 하나와 접촉함이 없이 상기 BGA Vss 평면 및 상기 BGA Vdd평면에서의 수직으로 정렬된 바이어 구멍을 통과하는 신호 바이어; 상기 BGA Vss 평면과 접촉하는 동안 바이어 구멍을 통과함에 의하여 상기 제1BGA 패키지 표면 Vss 평면, 상기 제2BGA 패키지 표면 Vss 평면 및 상기 BGA Vss 평면을 접속하며, 상기 BGA Vdd 평면과 접촉함이 없이 상기 BGA Vdd평면에서의 바이어 구멍을 통과하는 Vss 바이어; 및 상기 BGA Vss 평면 및 상기 BGA Vdd평면 중간에 배치되는 제3BGA코어를 포함하며, 상기 IC는 상기 제1BGA 패키지 표면 Vss 평면을 포함하고, 상기 제1BGA패키지 신호 트레이스에 접속되는 접속와이어에 접속되는 신호패드를 더 포함하고; 상기 제1BGA 패키지 Vdd 평면에 접속되는 접속와이어에 접속되는 Vdd패드를 더 포함하며; 상기 솔더볼은 상기 제2BGA 코어의 상기 제2표면상에서 트레이스들과 평면들을 접촉하는 것을 특징으로 하는 4층 볼 그리드 어레이 패키지.
  12. 제11항에 있어서, 도전물질로 코팅된 제1 및 제2표면 사이에 샌드위치된 상기 제1BGA 코어 및 도전물질로 코팅된 제1 및 제2표면 사이에 샌드위치된 상기 제2BGA 코어중 적어도 하나는 이중면 인쇄회로기판을 포함하는 것을 특징으로 하는 4층 볼 그리드 어레이 패키지.
  13. 제11항에 있어서, 상기 BGA Vss평면은 상기 BGA Vdd 평면보다 상기 IC에 더욱 밀접하여 배치되는 것을 특징으로 하는 4층 볼 그리드 어레이 패키지.
  14. 제11항에 있어서, 상기 BGA Vss 평면은 약 0.03"(0.08㎜)보다 적은 간격으로 상기 IC의 상기 기판으로부터 수직으로 간격져 떨어져 있는 것을 특징으로 하는 4층 볼 그리드 어레이 패키지.
  15. 제11항에 있어서, 상기 제1BGA 코어, 상기 제2BGA 코어 및 상기 제3BGA코어중어느 하나는 ⒜ FR4 에폭시 유리 및 ⒝프리-프레그로 이루어지는 그룹으로 부터 선택되는 재료를 포함하는 것을 특징으로 하는 4층 볼 그리드 어레이 패키지.
  16. 제11항에 있어서, 상기 IC를 밀봉하는 과몰드를 더 포함하는 것을 특징으로 하는 4층 볼 그리드 어레이 패키지.
  17. 제11항에 있어서, 상기 IC는 적어도 30㎒의 주파수에서 동작하는 디지탈 회로를 포함하는 것을 특징으로 하는 4층 볼 그리드 어레이 패키지.
  18. 제1항에 있어서, 상기 패키지는 상기 IC 상의 신호 출력 패드와 약 50Ω의 상기 Vss 평면사이의 출력 임피던스의 결과인 것을 특징으로 하는 볼 그리드 어레이 패키지.
  19. 제1항에 있어서, 상기 IC는 적어도 30㎒의 주파수에서 동작하는 디지탈 회로를 포함하는 것을 특징으로 하는 볼 그리드 어레이 패키지.
  20. 제11항에 있어서, 상기 패키지는 상기 IC상의 신호출력패드 및 약 50Ω의 상기 제1BGA 패키지 표면 Vss 평면 및 상기 제2BGA 패키지 표면 Vss 평면사이의 출력 임피던스의 결과인 것을 특징으로 하는 4층 볼 그리드 어레이 패키지.
  21. 제11항에 있어서, 상기 IC는 적어도 30㎒의 주파수에서 동작하는 디지탈 회로를 포함하는 것을 특징으로 하는 볼 그리드 어레이 패키지.
  22. 제7항에 있어서, 상기 패키지는 상기 IC상의 신호출력패드와 약 50Ω의 상기 제1BGA 패키지 표면 Vss 평면사이의 출력 임피던스의 결과인 것을 특징으로 하는 3층 볼 그리드 어레이 패키지.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019950020751A 1994-07-11 1995-07-11 집적회로용볼그리드어레이패키지 KR100378511B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US27333194A 1994-07-11 1994-07-11
US08/273331 1994-07-11
US08/273,311 1994-07-11

Publications (2)

Publication Number Publication Date
KR960005968A true KR960005968A (ko) 1996-02-23
KR100378511B1 KR100378511B1 (ko) 2003-06-18

Family

ID=23043475

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950020751A KR100378511B1 (ko) 1994-07-11 1995-07-11 집적회로용볼그리드어레이패키지

Country Status (5)

Country Link
US (2) US5741729A (ko)
EP (1) EP0692823B1 (ko)
JP (1) JPH08172141A (ko)
KR (1) KR100378511B1 (ko)
DE (1) DE69529646T2 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101003033B1 (ko) * 2004-06-08 2010-12-21 주식회사 코오롱 심색성이 우수한 추출형 복합섬유

Families Citing this family (202)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5661082A (en) * 1995-01-20 1997-08-26 Motorola, Inc. Process for forming a semiconductor device having a bond pad
US6204453B1 (en) * 1998-12-02 2001-03-20 International Business Machines Corporation Two signal one power plane circuit board
US6750405B1 (en) * 1995-06-07 2004-06-15 International Business Machines Corporation Two signal one power plane circuit board
JPH0997791A (ja) * 1995-09-27 1997-04-08 Internatl Business Mach Corp <Ibm> バンプ構造、バンプの形成方法、実装接続体
JPH0917919A (ja) * 1995-06-29 1997-01-17 Fujitsu Ltd 半導体装置
JP3330468B2 (ja) * 1995-06-30 2002-09-30 富士通株式会社 配線基板及び半導体装置
JP3264147B2 (ja) * 1995-07-18 2002-03-11 日立電線株式会社 半導体装置、半導体装置用インターポーザ及びその製造方法
US5821608A (en) 1995-09-08 1998-10-13 Tessera, Inc. Laterally situated stress/strain relieving lead for a semiconductor chip package
US5898858A (en) * 1995-09-28 1999-04-27 Intel Corporation Method and apparatus for providing emulator overlay memory support for ball grid array microprocessor packages
US6734545B1 (en) * 1995-11-29 2004-05-11 Hitachi, Ltd. BGA type semiconductor device and electronic equipment using the same
JP3345541B2 (ja) * 1996-01-16 2002-11-18 株式会社日立製作所 半導体装置及びその製造方法
US6046499A (en) * 1996-03-27 2000-04-04 Kabushiki Kaisha Toshiba Heat transfer configuration for a semiconductor device
MY123146A (en) * 1996-03-28 2006-05-31 Intel Corp Perimeter matrix ball grid array circuit package with a populated center
US6169329B1 (en) * 1996-04-02 2001-01-02 Micron Technology, Inc. Semiconductor devices having interconnections using standardized bonding locations and methods of designing
US5764485A (en) * 1996-04-19 1998-06-09 Lebaschi; Ali Multi-layer PCB blockade-via pad-connection
US6031283A (en) * 1996-09-09 2000-02-29 Intel Corporation Integrated circuit package
US6043559A (en) 1996-09-09 2000-03-28 Intel Corporation Integrated circuit package which contains two in plane voltage busses and a wrap around conductive strip that connects a bond finger to one of the busses
US5866949A (en) * 1996-12-02 1999-02-02 Minnesota Mining And Manufacturing Company Chip scale ball grid array for integrated circuit packaging
US5990545A (en) * 1996-12-02 1999-11-23 3M Innovative Properties Company Chip scale ball grid array for integrated circuit package
DE19654606C2 (de) * 1996-12-20 1998-10-22 Siemens Ag Beidseitig oder mehrschichtig kupferkaschierte Leiterplatte und Verfahren zu ihrer Herstellung
JPH10214917A (ja) * 1997-01-30 1998-08-11 Sony Corp 半導体装置及び半導体装置の製造方法並びに配線基板
KR100237328B1 (ko) * 1997-02-26 2000-01-15 김규현 반도체 패키지의 구조 및 제조방법
JPH1174651A (ja) * 1997-03-13 1999-03-16 Ibiden Co Ltd プリント配線板及びその製造方法
WO1998044564A1 (en) 1997-04-02 1998-10-08 Tessera, Inc. Chip with internal signal routing in external element
US6687842B1 (en) 1997-04-02 2004-02-03 Tessera, Inc. Off-chip signal routing between multiply-connected on-chip electronic elements via external multiconductor transmission line on a dielectric element
US9054094B2 (en) 1997-04-08 2015-06-09 X2Y Attenuators, Llc Energy conditioning circuit arrangement for integrated circuit
US7336468B2 (en) 1997-04-08 2008-02-26 X2Y Attenuators, Llc Arrangement for energy conditioning
US6995983B1 (en) 1997-04-08 2006-02-07 X2Y Attenuators, Llc Component carrier
US6650525B2 (en) 1997-04-08 2003-11-18 X2Y Attenuators, Llc Component carrier
US7321485B2 (en) 1997-04-08 2008-01-22 X2Y Attenuators, Llc Arrangement for energy conditioning
US7301748B2 (en) 1997-04-08 2007-11-27 Anthony Anthony A Universal energy conditioning interposer with circuit architecture
US6509807B1 (en) * 1997-04-08 2003-01-21 X2Y Attenuators, Llc Energy conditioning circuit assembly
US6606011B2 (en) 1998-04-07 2003-08-12 X2Y Attenuators, Llc Energy conditioning circuit assembly
JPH1174407A (ja) * 1997-08-29 1999-03-16 Mitsubishi Electric Corp 半導体装置
JP3834426B2 (ja) 1997-09-02 2006-10-18 沖電気工業株式会社 半導体装置
KR100309957B1 (ko) * 1997-09-08 2002-08-21 신꼬오덴기 고교 가부시키가이샤 반도체장치
US5835355A (en) * 1997-09-22 1998-11-10 Lsi Logic Corporation Tape ball grid array package with perforated metal stiffener
JPH11102985A (ja) * 1997-09-26 1999-04-13 Mitsubishi Electric Corp 半導体集積回路装置
US6028354A (en) 1997-10-14 2000-02-22 Amkor Technology, Inc. Microelectronic device package having a heat sink structure for increasing the thermal conductivity of the package
US6034426A (en) * 1997-10-30 2000-03-07 Hewlett-Packard Co. Testable low inductance integrated circuit package
US6476486B1 (en) 1997-10-30 2002-11-05 Agilent Technologies, Inc. Ball grid array package with supplemental electronic component
KR100266637B1 (ko) 1997-11-15 2000-09-15 김영환 적층형볼그리드어레이반도체패키지및그의제조방법
US6191475B1 (en) * 1997-11-26 2001-02-20 Intel Corporation Substrate for reducing electromagnetic interference and enclosure
JP3079529B2 (ja) * 1997-11-27 2000-08-21 日本電気株式会社 ボールグリッドアレイ型半導体装置
EP0926729A3 (en) * 1997-12-10 1999-12-08 Mitsubishi Gas Chemical Company, Inc. Semiconductor plastic package and process for the production thereof
US6051890A (en) 1997-12-24 2000-04-18 Intel Corporation Interleaving a bondwire between two bondwires coupled to a same terminal
US6064113A (en) * 1998-01-13 2000-05-16 Lsi Logic Corporation Semiconductor device package including a substrate having bonding fingers within an electrically conductive ring surrounding a die area and a combined power and ground plane to stabilize signal path impedances
SG73490A1 (en) * 1998-01-23 2000-06-20 Texas Instr Singapore Pte Ltd High density internal ball grid array integrated circuit package
US5990547A (en) * 1998-03-02 1999-11-23 Motorola, Inc. Semiconductor device having plated contacts and method thereof
US5939782A (en) * 1998-03-03 1999-08-17 Sun Microsystems, Inc. Package construction for integrated circuit chip with bypass capacitor
US6194782B1 (en) * 1998-06-24 2001-02-27 Nortel Networks Limited Mechanically-stabilized area-array device package
GB2341482B (en) * 1998-07-30 2003-07-09 Bookham Technology Ltd Lead frame attachment for integrated optoelectronic waveguide device
JP3602968B2 (ja) * 1998-08-18 2004-12-15 沖電気工業株式会社 半導体装置およびその基板接続構造
US6161215A (en) * 1998-08-31 2000-12-12 Hewlett-Packard Company Package routing of integrated circuit signals
US6404643B1 (en) 1998-10-15 2002-06-11 Amerasia International Technology, Inc. Article having an embedded electronic device, and method of making same
US6243269B1 (en) * 1998-12-29 2001-06-05 Ncr Corporation Centralized cooling interconnect for electronic packages
KR100341077B1 (en) * 1998-12-31 2002-09-27 Simm Tech Co Ltd Structure of multi-layered module in pcb
US6284574B1 (en) 1999-01-04 2001-09-04 International Business Machines Corporation Method of producing heat dissipating structure for semiconductor devices
US6081429A (en) 1999-01-20 2000-06-27 Micron Technology, Inc. Test interposer for use with ball grid array packages assemblies and ball grid array packages including same and methods
TW410446B (en) 1999-01-21 2000-11-01 Siliconware Precision Industries Co Ltd BGA semiconductor package
US6181004B1 (en) * 1999-01-22 2001-01-30 Jerry D. Koontz Digital signal processing assembly and test method
US6191477B1 (en) * 1999-02-17 2001-02-20 Conexant Systems, Inc. Leadless chip carrier design and structure
US6246583B1 (en) * 1999-03-04 2001-06-12 International Business Machines Corporation Method and apparatus for removing heat from a semiconductor device
US6052045A (en) * 1999-03-12 2000-04-18 Kearney-National, Inc. Electromechanical switching device package with controlled impedance environment
US6400576B1 (en) * 1999-04-05 2002-06-04 Sun Microsystems, Inc. Sub-package bypass capacitor mounting for an array packaged integrated circuit
TW413874B (en) * 1999-04-12 2000-12-01 Siliconware Precision Industries Co Ltd BGA semiconductor package having exposed heat dissipation layer and its manufacturing method
US6198635B1 (en) * 1999-05-18 2001-03-06 Vsli Technology, Inc. Interconnect layout pattern for integrated circuit packages and the like
US6430047B2 (en) * 1999-05-28 2002-08-06 Agere Systems Guardian Corp. Standardized test board for testing custom chips
JP3368870B2 (ja) * 1999-06-25 2003-01-20 日本電気株式会社 パッケージ基板及びこれを備えた半導体装置
KR100339020B1 (ko) 1999-08-02 2002-05-31 윤종용 반도체칩 패키징 시스템 및 이를 이용한 반도체칩 패키징 방법
JP3608990B2 (ja) * 1999-10-19 2005-01-12 新光電気工業株式会社 多層回路基板およびその製造方法
US6316828B1 (en) * 1999-11-09 2001-11-13 Advanced Semiconductor Engineering, Inc. Structure of a solder mask for the circuit module of a BGA substrate
US6204559B1 (en) * 1999-11-22 2001-03-20 Advanced Semiconductor Engineering, Inc. Ball grid assembly type semiconductor package having improved chip edge support to prevent chip cracking
GB2356737A (en) * 1999-11-26 2001-05-30 Nokia Mobile Phones Ltd Ground Plane for a Semiconductor Chip
US6225690B1 (en) * 1999-12-10 2001-05-01 Lsi Logic Corporation Plastic ball grid array package with strip line configuration
US6448509B1 (en) 2000-02-16 2002-09-10 Amkor Technology, Inc. Printed circuit board with heat spreader and method of making
US6418029B1 (en) * 2000-02-28 2002-07-09 Mckee James S. Interconnect system having vertically mounted passive components on an underside of a substrate
US6372539B1 (en) 2000-03-20 2002-04-16 National Semiconductor Corporation Leadless packaging process using a conductive substrate
US6686652B1 (en) 2000-03-20 2004-02-03 National Semiconductor Locking lead tips and die attach pad for a leadless package apparatus and method
US6399415B1 (en) 2000-03-20 2002-06-04 National Semiconductor Corporation Electrical isolation in panels of leadless IC packages
US6452255B1 (en) * 2000-03-20 2002-09-17 National Semiconductor, Corp. Low inductance leadless package
US6531335B1 (en) 2000-04-28 2003-03-11 Micron Technology, Inc. Interposers including upwardly protruding dams, semiconductor device assemblies including the interposers, and methods
US6429515B1 (en) * 2000-05-05 2002-08-06 Amkor Technology, Inc. Long wire IC package
US6351391B1 (en) * 2000-05-15 2002-02-26 International Business Machines Corporation Signal busses on printed board structures mounting ASIC chips with signal termination resistor devices using planar signal terminating devices
TW452953B (en) * 2000-05-22 2001-09-01 Via Tech Inc BGA chip package capable of decreasing its impedance when operating at high frequency
JP2001332859A (ja) * 2000-05-22 2001-11-30 Murata Mfg Co Ltd 積層型セラミック電子部品およびその製造方法ならびに電子装置
JP3292723B2 (ja) * 2000-05-26 2002-06-17 アルス電子株式会社 半導体パッケージ及びその製造方法
US6465882B1 (en) * 2000-07-21 2002-10-15 Agere Systems Guardian Corp. Integrated circuit package having partially exposed conductive layer
USRE38381E1 (en) 2000-07-21 2004-01-13 Kearney-National Inc. Inverted board mounted electromechanical device
TW462121B (en) * 2000-09-19 2001-11-01 Siliconware Precision Industries Co Ltd Heat sink type ball grid array package
US6559484B1 (en) * 2000-09-29 2003-05-06 Intel Corporation Embedded enclosure for effective electromagnetic radiation reduction
TW490820B (en) * 2000-10-04 2002-06-11 Advanced Semiconductor Eng Heat dissipation enhanced ball grid array package
US6466008B1 (en) * 2000-10-06 2002-10-15 Hewlett-Packard Company Method for matching the lengths of signal traces
JP4759798B2 (ja) * 2000-10-30 2011-08-31 日本電気株式会社 半導体装置の接続構造
US6960824B1 (en) * 2000-11-15 2005-11-01 Skyworks Solutions, Inc. Structure and method for fabrication of a leadless chip carrier
US6611055B1 (en) 2000-11-15 2003-08-26 Skyworks Solutions, Inc. Leadless flip chip carrier design and structure
US6582979B2 (en) 2000-11-15 2003-06-24 Skyworks Solutions, Inc. Structure and method for fabrication of a leadless chip carrier with embedded antenna
US6710433B2 (en) * 2000-11-15 2004-03-23 Skyworks Solutions, Inc. Leadless chip carrier with embedded inductor
US6867493B2 (en) * 2000-11-15 2005-03-15 Skyworks Solutions, Inc. Structure and method for fabrication of a leadless multi-die carrier
US6456515B1 (en) 2000-11-27 2002-09-24 Briggs & Stratton Corporation Three-phase H-bridge assembly and method of assembling the same
AU2002217987A1 (en) 2000-12-01 2002-06-11 Broadcom Corporation Thermally and electrically enhanced ball grid array packaging
US20020079572A1 (en) * 2000-12-22 2002-06-27 Khan Reza-Ur Rahman Enhanced die-up ball grid array and method for making the same
JP4462758B2 (ja) * 2000-12-27 2010-05-12 京セラ株式会社 高周波用配線基板
US6622905B2 (en) * 2000-12-29 2003-09-23 Intel Corporation Design and assembly methodology for reducing bridging in bonding electronic components to pads connected to vias
US6621012B2 (en) * 2001-02-01 2003-09-16 International Business Machines Corporation Insertion of electrical component within a via of a printed circuit board
US6452262B1 (en) * 2001-02-12 2002-09-17 Lsi Logic Corporation Layout of Vdd and Vss balls in a four layer PBGA
US6803650B2 (en) * 2001-02-23 2004-10-12 Silicon Bandwidth Inc. Semiconductor die package having mesh power and ground planes
US6449169B1 (en) * 2001-02-28 2002-09-10 Siliconware Precision Industries Co., Ltd. Ball grid array package with interdigitated power ring and ground ring
JP4605930B2 (ja) * 2001-03-29 2011-01-05 京セラ株式会社 高周波半導体素子収納用パッケージ
US6724083B2 (en) * 2001-07-16 2004-04-20 Ars Electronics Co., Ltd. Method of producing semiconductor packages by cutting via holes into half when separating substrate
US6900992B2 (en) * 2001-09-18 2005-05-31 Intel Corporation Printed circuit board routing and power delivery for high frequency integrated circuits
US6657130B2 (en) * 2001-09-20 2003-12-02 International Business Machines Corporation Electrical and physical design integration method and apparatus for providing interconnections on first level ceramic chip carrier packages
US6888235B2 (en) * 2001-09-26 2005-05-03 Molex Incorporated Power delivery system for integrated circuits utilizing discrete capacitors
SG104279A1 (en) * 2001-11-02 2004-06-21 Inst Of Microelectronics Enhanced chip scale package for flip chips
JP4068336B2 (ja) * 2001-11-30 2008-03-26 株式会社東芝 半導体装置
US6818985B1 (en) * 2001-12-22 2004-11-16 Skyworks Solutions, Inc. Embedded antenna and semiconductor die on a substrate in a laminate package
US6891266B2 (en) * 2002-02-14 2005-05-10 Mia-Com RF transition for an area array package
US20030150641A1 (en) * 2002-02-14 2003-08-14 Noyan Kinayman Multilayer package for a semiconductor device
US6873529B2 (en) * 2002-02-26 2005-03-29 Kyocera Corporation High frequency module
JP2003264260A (ja) * 2002-03-08 2003-09-19 Toshiba Corp 半導体チップ搭載基板、半導体装置、半導体モジュール及び半導体装置実装基板
EP1483769B1 (en) * 2002-03-08 2007-09-19 Kearney-National, Inc. Surface mount molded relay package and method of manufacturing same
US6940176B2 (en) * 2002-05-21 2005-09-06 United Microelectronics Corp. Solder pads for improving reliability of a package
US7138711B2 (en) * 2002-06-17 2006-11-21 Micron Technology, Inc. Intrinsic thermal enhancement for FBGA package
US20040022038A1 (en) * 2002-07-31 2004-02-05 Intel Corporation Electronic package with back side, cavity mounted capacitors and method of fabrication therefor
TW554501B (en) * 2002-08-14 2003-09-21 Siliconware Precision Industries Co Ltd Substrate for semiconductor package
US6965160B2 (en) * 2002-08-15 2005-11-15 Micron Technology, Inc. Semiconductor dice packages employing at least one redistribution layer
JP4005451B2 (ja) * 2002-08-29 2007-11-07 富士通株式会社 多層基板及び半導体装置
JP4125570B2 (ja) * 2002-09-19 2008-07-30 日本電気株式会社 電子装置
JP3908148B2 (ja) * 2002-10-28 2007-04-25 シャープ株式会社 積層型半導体装置
US6687133B1 (en) * 2002-11-15 2004-02-03 Lsi Logic Corporation Ground plane on 2 layer PBGA
FR2849346B1 (fr) * 2002-12-20 2006-12-08 Thales Sa Boitier hyperfrequence a montage de surface et montage correspondant avec un circuit multicouche.
US7317622B2 (en) * 2002-12-31 2008-01-08 Intel Corporation Method and apparatus for supplying power to a semiconductor device using a capacitor DC shunt
US6882266B2 (en) * 2003-01-07 2005-04-19 Cts Corporation Ball grid array resistor network having a ground plane
US7164192B2 (en) * 2003-02-10 2007-01-16 Skyworks Solutions, Inc. Semiconductor die package with reduced inductance and reduced die attach flow out
US7023084B2 (en) * 2003-03-18 2006-04-04 Sumitomo Metal (Smi) Electronics Devices Inc. Plastic packaging with high heat dissipation and method for the same
US6806563B2 (en) * 2003-03-20 2004-10-19 International Business Machines Corporation Composite capacitor and stiffener for chip carrier
DE10315768A1 (de) * 2003-04-07 2004-11-25 Siemens Ag Mehrlagige Leiterplatte
US8584353B2 (en) 2003-04-11 2013-11-19 Neoconix, Inc. Method for fabricating a contact grid array
US6916181B2 (en) 2003-06-11 2005-07-12 Neoconix, Inc. Remountable connector for land grid array packages
US7758351B2 (en) 2003-04-11 2010-07-20 Neoconix, Inc. Method and system for batch manufacturing of spring elements
US7244125B2 (en) 2003-12-08 2007-07-17 Neoconix, Inc. Connector for making electrical contact at semiconductor scales
US7114961B2 (en) 2003-04-11 2006-10-03 Neoconix, Inc. Electrical connector on a flexible carrier
US6768189B1 (en) * 2003-06-04 2004-07-27 Northrop Grumman Corporation High power chip scale package
US7070419B2 (en) 2003-06-11 2006-07-04 Neoconix Inc. Land grid array connector including heterogeneous contact elements
US6869290B2 (en) 2003-06-11 2005-03-22 Neoconix, Inc. Circuitized connector for land grid array
US7256486B2 (en) * 2003-06-27 2007-08-14 Avago Technologies Ecbu Ip (Singapore) Pte. Ltd. Packaging device for semiconductor die, semiconductor device incorporating same and method of making same
US7919787B2 (en) * 2003-06-27 2011-04-05 Avago Technologies Ecbu Ip (Singapore) Pte. Ltd. Semiconductor device with a light emitting semiconductor die
US7279355B2 (en) * 2003-06-27 2007-10-09 Avago Technologies Ecbuip (Singapore) Pte Ltd Method for fabricating a packaging device for semiconductor die and semiconductor device incorporating same
US6956286B2 (en) * 2003-08-05 2005-10-18 International Business Machines Corporation Integrated circuit package with overlapping bond fingers
US6954360B2 (en) * 2003-08-22 2005-10-11 Nokia Corporation Thermally enhanced component substrate: thermal bar
US7326477B2 (en) * 2003-09-23 2008-02-05 Saint-Gobain Ceramics & Plastics, Inc. Spinel boules, wafers, and methods for fabricating same
EP1673807B1 (en) * 2003-10-10 2019-12-11 Taiwan Semiconductor Manufacturing Co., Ltd. Electronic Device
FR2861216B1 (fr) * 2003-10-21 2006-02-10 St Microelectronics Sa Boitier semi-conducteur a puce sur plaque-support
US6965170B2 (en) * 2003-11-18 2005-11-15 International Business Machines Corporation High wireability microvia substrate
JP4028474B2 (ja) * 2003-11-20 2007-12-26 ミヨシ電子株式会社 高周波モジュール
CN1890854A (zh) 2003-12-22 2007-01-03 X2Y艾泰钮埃特有限责任公司 内屏蔽式能量调节装置
US7245506B2 (en) * 2004-01-08 2007-07-17 Dell Products L.P. System for reducing noise induced from reference plane currents
US7612449B2 (en) * 2004-02-24 2009-11-03 Qualcomm Incorporated Optimized power delivery to high speed, high pin-count devices
US7383632B2 (en) 2004-03-19 2008-06-10 Neoconix, Inc. Method for fabricating a connector
JP2005353889A (ja) * 2004-06-11 2005-12-22 Toshiba Corp 高周波多層集積回路
US7208830B2 (en) * 2004-06-30 2007-04-24 Intel Corporation Interconnect shunt used for current distribution and reliability redundancy
US7419852B2 (en) 2004-08-27 2008-09-02 Micron Technology, Inc. Low temperature methods of forming back side redistribution layers in association with through wafer interconnects, semiconductor devices including same, and assemblies
DE102004049485B3 (de) * 2004-10-11 2005-12-01 Siemens Ag Elektrische Schaltung mit einer Mehrlagen-Leiterplatte
TWI388042B (zh) * 2004-11-04 2013-03-01 Taiwan Semiconductor Mfg 基於奈米管基板之積體電路
US20100012367A1 (en) * 2004-12-21 2010-01-21 Koninklijke Philips Electronics N.V. Printed circuit board arrangement
US7772705B2 (en) * 2005-02-02 2010-08-10 Toshiba America Electronic Components, Inc. Low thermal resistance package
WO2006093831A2 (en) 2005-03-01 2006-09-08 X2Y Attenuators, Llc Energy conditioner with tied through electrodes
JP2008535207A (ja) 2005-03-01 2008-08-28 エックストゥーワイ アテニュエイターズ，エルエルシー 共平面導体を有する調整器
DE102005013762C5 (de) 2005-03-22 2012-12-20 Sew-Eurodrive Gmbh & Co. Kg Elektronisches Gerät und Verfahren zur Bestimmung der Temperatur eines Leistungshalbleiters
US7501341B1 (en) * 2005-05-05 2009-03-10 Xilinx, Inc. Interconnect array formed at least in part with repeated application of an interconnect pattern
DE102006023123B4 (de) * 2005-06-01 2011-01-13 Infineon Technologies Ag Abstandserfassungsradar für Fahrzeuge mit einem Halbleitermodul mit Komponenten für Höchstfrequenztechnik in Kunststoffgehäuse und Verfahren zur Herstellung eines Halbleitermoduls mit Komponenten für ein Abstandserfassungsradar für Fahrzeuge in einem Kunststoffgehäuse
US7332799B2 (en) * 2005-12-28 2008-02-19 Tessera, Inc. Packaged chip having features for improved signal transmission on the package
JP4455509B2 (ja) 2006-01-31 2010-04-21 シャープ株式会社 半導体装置
GB2448270B (en) * 2006-02-10 2012-02-08 Innovatech Ltd Circuit board and radiating heat system for circuit board
EP1991996A1 (en) 2006-03-07 2008-11-19 X2Y Attenuators, L.L.C. Energy conditioner structures
KR100737098B1 (ko) * 2006-03-16 2007-07-06 엘지이노텍 주식회사 전자파 차폐장치 및 그 제조 공정
JP2008091714A (ja) * 2006-10-03 2008-04-17 Rohm Co Ltd 半導体装置
CN100433322C (zh) * 2006-12-25 2008-11-12 南通大学 一种无引线集成电路芯片封装
US20080218979A1 (en) * 2007-03-08 2008-09-11 Jong-Ho Park Printed circuit (PC) board module with improved heat radiation efficiency
TWI356480B (en) * 2007-05-07 2012-01-11 Siliconware Precision Industries Co Ltd Semiconductor package substrate
TWI355057B (en) * 2007-07-10 2011-12-21 Unimicron Technology Corp Wire bonding type package substrate having heat-co
US7738249B2 (en) * 2007-10-25 2010-06-15 Endicott Interconnect Technologies, Inc. Circuitized substrate with internal cooling structure and electrical assembly utilizing same
KR101491138B1 (ko) * 2007-12-12 2015-02-09 엘지이노텍 주식회사 다층 기판 및 이를 구비한 발광 다이오드 모듈
WO2011074105A1 (en) * 2009-12-14 2011-06-23 Nec Corporation Resonant via structures in multilayer substrates and filters based on these via structures
JP2011187662A (ja) * 2010-03-08 2011-09-22 Renesas Electronics Corp 半導体パッケージ、基板、電子部品、及び半導体パッケージの実装方法
US8901747B2 (en) 2010-07-29 2014-12-02 Mosys, Inc. Semiconductor chip layout
US8411444B2 (en) * 2010-09-15 2013-04-02 International Business Machines Corporation Thermal interface material application for integrated circuit cooling
KR20120082190A (ko) * 2011-01-13 2012-07-23 삼성엘이디 주식회사 발광소자 패키지
TWI433278B (zh) 2011-03-10 2014-04-01 矽品精密工業股份有限公司 無承載板之封裝件及其製法
US9554453B2 (en) * 2013-02-26 2017-01-24 Mediatek Inc. Printed circuit board structure with heat dissipation function
US9680273B2 (en) 2013-03-15 2017-06-13 Neoconix, Inc Electrical connector with electrical contacts protected by a layer of compressible material and method of making it
KR102041243B1 (ko) * 2013-04-26 2019-11-07 삼성전자주식회사 반도체 패키지
JP5860917B2 (ja) * 2014-04-08 2016-02-16 日本航空電子工業株式会社 プリント配線板
JP2015211204A (ja) * 2014-04-30 2015-11-24 イビデン株式会社 回路基板及びその製造方法
KR20180065426A (ko) * 2016-12-07 2018-06-18 삼성전자주식회사 반도체 저장 장치
US10277268B2 (en) * 2017-06-02 2019-04-30 Psemi Corporation Method and apparatus for switching of shunt and through switches of a transceiver
CN107148144B (zh) * 2017-06-22 2020-04-07 青岛海信移动通信技术股份有限公司 一种4g模块
JP2019054216A (ja) * 2017-09-19 2019-04-04 東芝メモリ株式会社 半導体装置
US10985101B2 (en) * 2019-03-14 2021-04-20 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package and manufacturing method thereof
WO2020196752A1 (ja) * 2019-03-28 2020-10-01 株式会社村田製作所 モジュール
JP7279464B2 (ja) * 2019-03-28 2023-05-23 株式会社アイシン 電子基板
US11289431B2 (en) * 2019-12-27 2022-03-29 Intel Corporation Electrostatic discharge protection in integrated circuits using materials with optically controlled electrical conductivity

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3239469A (en) * 1959-10-26 1966-03-08 Phillips Petroleum Co Polymer curing system
FR1552207A (ko) * 1967-11-22 1969-01-03
US3582865A (en) * 1969-12-16 1971-06-01 Ibm Microcircuit module and connector
US3739469A (en) * 1971-12-27 1973-06-19 Ibm Multilayer printed circuit board and method of manufacture
US4535385A (en) * 1983-04-22 1985-08-13 Cray Research, Inc. Circuit module with enhanced heat transfer and distribution
US4513355A (en) * 1983-06-15 1985-04-23 Motorola, Inc. Metallization and bonding means and method for VLSI packages
EP0162521A3 (en) * 1984-05-23 1986-10-08 American Microsystems, Incorporated Package for semiconductor devices
US4739448A (en) * 1984-06-25 1988-04-19 Magnavox Government And Industrial Electronics Company Microwave multiport multilayered integrated circuit chip carrier
GB2209867B (en) * 1987-09-16 1990-12-19 Advanced Semiconductor Package Method of forming an integrated circuit chip carrier
DE3843787A1 (de) * 1988-12-24 1990-07-05 Standard Elektrik Lorenz Ag Verfahren und leiterplatte zum montieren eines halbleiter-bauelements
EP0399161B1 (en) * 1989-04-17 1995-01-11 International Business Machines Corporation Multi-level circuit card structure
US5010641A (en) * 1989-06-30 1991-04-30 Unisys Corp. Method of making multilayer printed circuit board
US5012386A (en) * 1989-10-27 1991-04-30 Motorola, Inc. High performance overmolded electronic package
US5102829A (en) * 1991-07-22 1992-04-07 At&T Bell Laboratories Plastic pin grid array package
US5264729A (en) * 1992-07-29 1993-11-23 Lsi Logic Corporation Semiconductor package having programmable interconnect
US5291062A (en) * 1993-03-01 1994-03-01 Motorola, Inc. Area array semiconductor device having a lid with functional contacts
US5355283A (en) * 1993-04-14 1994-10-11 Amkor Electronics, Inc. Ball grid array with via interconnection
US5397917A (en) * 1993-04-26 1995-03-14 Motorola, Inc. Semiconductor package capable of spreading heat
US5490324A (en) * 1993-09-15 1996-02-13 Lsi Logic Corporation Method of making integrated circuit package having multiple bonding tiers
JPH07169872A (ja) * 1993-12-13 1995-07-04 Fujitsu Ltd 半導体装置及びその製造方法
US5468999A (en) * 1994-05-26 1995-11-21 Motorola, Inc. Liquid encapsulated ball grid array semiconductor device with fine pitch wire bonding
US5508556A (en) * 1994-09-02 1996-04-16 Motorola, Inc. Leaded semiconductor device having accessible power supply pad terminals

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101003033B1 (ko) * 2004-06-08 2010-12-21 주식회사 코오롱 심색성이 우수한 추출형 복합섬유

Also Published As

Publication number Publication date
EP0692823A1 (en) 1996-01-17
EP0692823B1 (en) 2003-02-19
KR100378511B1 (ko) 2003-06-18
JPH08172141A (ja) 1996-07-02
DE69529646T2 (de) 2003-12-18
US5741729A (en) 1998-04-21
DE69529646D1 (de) 2003-03-27
US5640048A (en) 1997-06-17

Similar Documents

Publication Publication Date Title
KR960005968A (ko) 집적회로용 볼 그리드 어레이 패키지
KR100281813B1 (ko) 열및전기적으로개선된볼그리드패키지
US6396136B2 (en) Ball grid package with multiple power/ground planes
US4975761A (en) High performance plastic encapsulated package for integrated circuit die
US6888240B2 (en) High performance, low cost microelectronic circuit package with interposer
KR101062260B1 (ko) 집적 회로 조립체
TW410446B (en) BGA semiconductor package
US4945399A (en) Electronic package with integrated distributed decoupling capacitors
KR950030321A (ko) 반도체장치 및 그 제조방법 및 기판
US5473190A (en) Tab tape
KR950021447A (ko) 반도체 장치 및 그 제조방법
KR19990029932A (ko) 집적 회로용 와이어 본드 패키지를 위한 방법 및 장치
KR970030749A (ko) 집적 회로 패키지
KR970013236A (ko) 금속 회로 기판을 갖는 칩 스케일 패키지
US20060097370A1 (en) Stepped integrated circuit packaging and mounting
US6340839B1 (en) Hybrid integrated circuit
US4964019A (en) Multilayer bonding and cooling of integrated circuit devices
KR100299560B1 (ko) 리드프레임리드와도전성트레이스를조합한고밀도집적회로어셈블리
KR960706193A (ko) 전도성 트레이스와 리드 프레임 리드를 결합하는 고밀도 집적회로 조립체(a high density integrated circuit assembly combining leadframe leads with conductive traces)
KR920000208A (ko) 실장기판
US20060202335A1 (en) Tape ball grid array package with electromagnetic interference protection and method for fabricating the package
US4731700A (en) Semiconductor connection and crossover apparatus
KR910019222A (ko) 고집적 반도체 장치 및 이를 사용한 반도체 모듈
JP2001308388A (ja) チップ型発光素子
KR100632469B1 (ko) 반도체 칩 패키지

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee