KR920022537A - 감소된 기생 캐패시턴스를 갖는 보호형 프로그램가능 트랜지스터 및 그의 제조방법 - Google Patents

감소된 기생 캐패시턴스를 갖는 보호형 프로그램가능 트랜지스터 및 그의 제조방법 Download PDF

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KR920022537A
KR920022537A KR1019920008266A KR920008266A KR920022537A KR 920022537 A KR920022537 A KR 920022537A KR 1019920008266 A KR1019920008266 A KR 1019920008266A KR 920008266 A KR920008266 A KR 920008266A KR 920022537 A KR920022537 A KR 920022537A
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region
impurity
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impurity region
doped
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KR1019920008266A
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KR100258646B1 (ko
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제임스 첸 테-이
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프레데릭 얀 스미트
엔. 브이. 필립스 글로아이람펜파브리켄
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B69/00Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66825Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a floating gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
    • H01L29/1033Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
    • H01L29/1041Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface
    • H01L29/1045Channel region of field-effect devices of field-effect transistors with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure with a non-uniform doping structure in the channel region surface the doping structure being parallel to the channel length, e.g. DMOS like
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7884Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7885Hot carrier injection from the channel

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Non-Volatile Memory (AREA)
  • Semiconductor Memories (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)

Abstract

내용 없음.

Description

감소된 기생 캐패시턴스를 갖는 보호형 프로그램가능 트랜지스터 및 그의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제1도 내지 제10도는 본 발명에 따른 프로그램가능 트랜지스터를 제조하는 방법의 예를 도시한 도면으로,
제7도 내지 제10도는 제1도 내지 제6도 보다 확대된 도면.

Claims (7)

  1. 제1도전형과는 반대인 제2도전형의 소스 및 드레인 사이에 배치되는 상기 제1도전형의 주반도체 대역내의 채널 영역 상부의 전하축적 영역과; 상기 채널 영역으로 연장되고 상기 주대역 보다 강하게 도우프되며, 실질적으로 상기 드레인과는 축방향으로 접촉하는 제1전도형의 제1불순물 대역을 포함하며, 상기 드레인이 강하게 도우프된 제3불순물 영역과, 상기 제3불순물 영역과 상기 제1불순물 영역사이에 위치되는 약하게 도우프된 제2불순물영역을 가지는 프로그램가능 트랜지스터.
  2. 제1항에 있어서, 상기 소스가 강하게 도우프된 제4불순물 영역과, 실질적으로 상기 제4영역과 상기 주대역 사이에 약하게 도우프된 제 5불순물 영역을 포함하는 프로그램가능 트랜지스터.
  3. 제1항에 있어서, 상기 전하 축적 영역이 부유 게이트를 포함하는 프로그램기능 트렌지스터
  4. 제1도전형의 표면-접합 주대역을 포함하는 단결정 반도체 기판으로부터 프로그램가능 트랜지스터를 제조하기 위한 것으로, 상기 주대역내의 채널 영역 상부에 전하 축척 영역을 생성하는 단계와; 상기 주대역에 제1도전형의 제1도우핀트를 제공하여, 상기 채널 영역으로 연장하고 상기 주대역보다 더 강하게 도우프되는 상기 제1도전형의 제1불순물 대역을 생성하는 단계와; 상기 주대역에 상기 제1도전형과는 반대의 제2도전형의 제2도우핀트를 제공하여, 상기 제1불순물 대역과는 실질적으로 축방향으로 접촉하는 약하게 도우프된 제2불순물 영역을 생성하는 단계와; 상기 제2영역에 상기 제2도전형의 제3도우핀트를 제공하여, 실질적으로 상기 제2영역에 매립되며 상기 제2영역보다 더 강하게 도우프되는 표면-접합 제3불순물 영역을 생성하는 단계를 포함하는 방법.
  5. 제4항에 있어서, 상기 제2불순물 영역이 부분적으로 상기 제1불순물 영역과는 반대로 도우핑함으로써 형성되는 방법.
  6. 제4항에 있어서, 스페이서가 제1영역 상부에 상기 전하 축적 영역을 따라 형성된 후 제2도우펀트가 제공되는 방법.
  7. 제4항에 있어서, 상기 스페이서가 상기 제2영역 상부에 상기 전하 축적 영역을 따라 형성된 후 제3도우핀트가 제공되는 방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개되는 것임.
KR1019920008266A 1991-05-15 1992-05-15 감소된 기생 캐패시턴스를 갖는 보호형 프로그램가능 트랜지스터 및 그의 제조방법 KR100258646B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US700,663 1991-05-15
US07/700,663 US5424567A (en) 1991-05-15 1991-05-15 Protected programmable transistor with reduced parasitic capacitances and method of fabrication

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KR920022537A true KR920022537A (ko) 1992-12-19
KR100258646B1 KR100258646B1 (ko) 2000-06-15

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US (2) US5424567A (ko)
EP (1) EP0513923B1 (ko)
JP (1) JPH05136427A (ko)
KR (1) KR100258646B1 (ko)
DE (1) DE69205060T2 (ko)

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EP0513923A3 (en) 1993-06-02
EP0513923A2 (en) 1992-11-19
US5424567A (en) 1995-06-13
KR100258646B1 (ko) 2000-06-15
DE69205060D1 (de) 1995-11-02
EP0513923B1 (en) 1995-09-27
JPH05136427A (ja) 1993-06-01
US5486480A (en) 1996-01-23

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