KR940012653A - 박막트랜지스터 제조방법 - Google Patents

박막트랜지스터 제조방법 Download PDF

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Publication number
KR940012653A
KR940012653A KR1019920020945A KR920020945A KR940012653A KR 940012653 A KR940012653 A KR 940012653A KR 1019920020945 A KR1019920020945 A KR 1019920020945A KR 920020945 A KR920020945 A KR 920020945A KR 940012653 A KR940012653 A KR 940012653A
Authority
KR
South Korea
Prior art keywords
semiconductor layer
forming
thin film
amorphous semiconductor
film transistor
Prior art date
Application number
KR1019920020945A
Other languages
English (en)
Inventor
김정현
Original Assignee
이헌조
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이헌조, 주식회사 금성사 filed Critical 이헌조
Priority to KR1019920020945A priority Critical patent/KR940012653A/ko
Priority to DE4337871A priority patent/DE4337871A1/de
Priority to FR9313370A priority patent/FR2697946B1/fr
Priority to JP5279799A priority patent/JPH06209011A/ja
Publication of KR940012653A publication Critical patent/KR940012653A/ko

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66742—Thin film unipolar transistors
    • H01L29/6675—Amorphous silicon or polysilicon transistors
    • H01L29/66757—Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/73—Bipolar junction transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode

Abstract

본 발명은 박막트랜지스터 제조방법에 관한 것으로 종래에는 오믹 접촉을 위해 비정질 반도체층위에 도핑된 반도체층을 증착하여 제조하므로 도핑된 반도체층의 불순물이온에 의한 파티클로이내 수율을 저하시켜 원가를 상승시키고 소자의 특성을 저하시키는 문제점이 있었다.
본 발명은 상기와 같은 종래의 문제점을 감안하여 소스, 드레인 전극위에 불순물 이온을 도핑하여 실리사이드막을 형성하고 그 실리사이드 막위에 비정질 반도체층을 증착하면 상기 불순물 이온이 확산에 의해 비정질 반도체층 일부를 도핑된 반도체층을 형성하여 불순물 이온에 의한 파티클의 영향을 제거하여 수율을 증가시켜 제조시원가를 절감하고 소자의 특성향상하는 효과가 있다.

Description

박막트랜지스터의 제조방법
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
제2도의 (가) 내지 (바)는 본 발명의 박막트랜지스터의 제조공정을 보인 단면도.

Claims (2)

  1. 유리기판(1)위에 소스, 드레인 전극(2)을 형성후 상기 전극(2)에 이온 도핑으로 실리사이드막(7)을 형성하는 공정과, 그 실리사이드 막(7)위에 비정질 반도체 층(8)을 형성하여 상기 이온의 확산에 의해 도핑된 비정질 반도체층(9)을 형성하는 공정과, 상기 비정질 반도체층(8) 위에 게이트 절연막(5)을 형성하는 공정과, 그 게이트 절연막(5)위에 게이트 전극(6)을 형성하는 공정으로 제조하는 박막트랜지스터 제조방법.
  2. 제1항에 있어서, 실리사이막(7)형성을 위한 이온 도핑은 이온 주입공정 또는 이온샤워(Ion shower)방법으로 제조하는 박막트랜지스터 제조방법.
    ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.
KR1019920020945A 1992-11-09 1992-11-09 박막트랜지스터 제조방법 KR940012653A (ko)

Priority Applications (4)

Application Number Priority Date Filing Date Title
KR1019920020945A KR940012653A (ko) 1992-11-09 1992-11-09 박막트랜지스터 제조방법
DE4337871A DE4337871A1 (de) 1992-11-09 1993-11-05 Verfahren zum Herstellen eines Dünnfilmtransistors
FR9313370A FR2697946B1 (fr) 1992-11-09 1993-11-09 Procédé à implantation pour fabriquer un transistor à couches minces.
JP5279799A JPH06209011A (ja) 1992-11-09 1993-11-09 薄膜トランジスターの製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920020945A KR940012653A (ko) 1992-11-09 1992-11-09 박막트랜지스터 제조방법

Publications (1)

Publication Number Publication Date
KR940012653A true KR940012653A (ko) 1994-06-24

Family

ID=19342740

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920020945A KR940012653A (ko) 1992-11-09 1992-11-09 박막트랜지스터 제조방법

Country Status (4)

Country Link
JP (1) JPH06209011A (ko)
KR (1) KR940012653A (ko)
DE (1) DE4337871A1 (ko)
FR (1) FR2697946B1 (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6774397B2 (en) 2000-05-12 2004-08-10 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
CN102881712B (zh) 2012-09-28 2015-02-25 京东方科技集团股份有限公司 一种阵列基板及其制造方法、oled显示装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3520626A1 (de) * 1985-06-08 1986-12-11 Bloss, Werner Heinz, Prof. Dr.-Ing., 7065 Winterbach Halbleiter oder mischhalbleiter und verfahren zu seiner herstellung
US4782033A (en) * 1985-11-27 1988-11-01 Siemens Aktiengesellschaft Process for producing CMOS having doped polysilicon gate by outdiffusion of boron from implanted silicide gate
US4999690A (en) * 1989-12-19 1991-03-12 Texas Instruments Incorporated Transistor
JPH03297172A (ja) * 1990-04-17 1991-12-27 Nec Corp 薄膜トランジスタ及びその製造方法
JP2584117B2 (ja) * 1990-09-21 1997-02-19 松下電器産業株式会社 薄膜トランジスタの製造方法

Also Published As

Publication number Publication date
DE4337871A1 (de) 1994-05-11
FR2697946B1 (fr) 1995-10-06
FR2697946A1 (fr) 1994-05-13
JPH06209011A (ja) 1994-07-26

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