KR100686273B1 - 반도체 집적 회로 장치 및 그 프로그램 방법 - Google Patents
반도체 집적 회로 장치 및 그 프로그램 방법 Download PDFInfo
- Publication number
- KR100686273B1 KR100686273B1 KR1020050028373A KR20050028373A KR100686273B1 KR 100686273 B1 KR100686273 B1 KR 100686273B1 KR 1020050028373 A KR1020050028373 A KR 1020050028373A KR 20050028373 A KR20050028373 A KR 20050028373A KR 100686273 B1 KR100686273 B1 KR 100686273B1
- Authority
- KR
- South Korea
- Prior art keywords
- circuit
- signal
- memory
- state
- information
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/18—Auxiliary circuits, e.g. for writing into memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
- G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
- G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
Landscapes
- Read Only Memory (AREA)
- Semiconductor Integrated Circuits (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004113440A JP4282529B2 (ja) | 2004-04-07 | 2004-04-07 | 半導体集積回路装置及びそのプログラム方法 |
| JPJP-P-2004-00113440 | 2004-04-07 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR20060045511A KR20060045511A (ko) | 2006-05-17 |
| KR100686273B1 true KR100686273B1 (ko) | 2007-02-26 |
Family
ID=35060380
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR1020050028373A Expired - Fee Related KR100686273B1 (ko) | 2004-04-07 | 2005-04-06 | 반도체 집적 회로 장치 및 그 프로그램 방법 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US7046569B2 (enExample) |
| JP (1) | JP4282529B2 (enExample) |
| KR (1) | KR100686273B1 (enExample) |
| CN (1) | CN100524525C (enExample) |
| TW (1) | TWI291177B (enExample) |
Families Citing this family (50)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7800932B2 (en) * | 2005-09-28 | 2010-09-21 | Sandisk 3D Llc | Memory cell comprising switchable semiconductor memory element with trimmable resistance |
| JP4282529B2 (ja) | 2004-04-07 | 2009-06-24 | 株式会社東芝 | 半導体集積回路装置及びそのプログラム方法 |
| GB0419465D0 (en) * | 2004-09-02 | 2004-10-06 | Cavendish Kinetics Ltd | Method and apparatus for programming and reading codes |
| EP1640844A1 (en) * | 2004-09-27 | 2006-03-29 | STMicroelectronics Limited | Secure OTP using external memory |
| US7263027B2 (en) * | 2004-10-14 | 2007-08-28 | Broadcom Corporation | Integrated circuit chip having non-volatile on-chip memories for providing programmable functions and features |
| JP4302049B2 (ja) * | 2004-12-17 | 2009-07-22 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| JP2006236511A (ja) * | 2005-02-25 | 2006-09-07 | Toshiba Corp | 半導体集積回路装置 |
| US7411810B2 (en) | 2005-12-11 | 2008-08-12 | Juhan Kim | One-time programmable memory |
| WO2008016419A2 (en) * | 2006-07-31 | 2008-02-07 | Sandisk 3D Llc | Mixed-use memory array and method for use therewith |
| US7486537B2 (en) * | 2006-07-31 | 2009-02-03 | Sandisk 3D Llc | Method for using a mixed-use memory array with different data states |
| US20080025069A1 (en) * | 2006-07-31 | 2008-01-31 | Scheuerlein Roy E | Mixed-use memory array with different data states |
| US7450414B2 (en) * | 2006-07-31 | 2008-11-11 | Sandisk 3D Llc | Method for using a mixed-use memory array |
| JP4818024B2 (ja) * | 2006-08-23 | 2011-11-16 | 株式会社東芝 | 半導体記憶装置 |
| JP4928878B2 (ja) * | 2006-09-11 | 2012-05-09 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| EP2122632B1 (en) * | 2006-12-22 | 2014-06-25 | Sidense Corp. | Dual function data register |
| JP2008198304A (ja) | 2007-02-15 | 2008-08-28 | Toshiba Corp | 不揮発性半導体記憶装置 |
| JP4922009B2 (ja) * | 2007-02-19 | 2012-04-25 | 株式会社東芝 | 半導体記憶装置 |
| US20080211060A1 (en) * | 2007-03-01 | 2008-09-04 | Kuang-Yeh Chang | Anti-fuse which will not generate a non-linear current after being blown and otp memory cell utilizing the anti-fuse |
| US7778074B2 (en) * | 2007-03-23 | 2010-08-17 | Sigmatel, Inc. | System and method to control one time programmable memory |
| US7564707B2 (en) * | 2007-08-22 | 2009-07-21 | Zerog Wireless, Inc. | One-time programmable non-volatile memory |
| JP2009087453A (ja) * | 2007-09-28 | 2009-04-23 | Sanyo Electric Co Ltd | 情報記憶回路 |
| JP5266920B2 (ja) * | 2008-07-15 | 2013-08-21 | 富士通セミコンダクター株式会社 | ヒューズ素子読み出し回路 |
| JP2010146636A (ja) * | 2008-12-18 | 2010-07-01 | Toshiba Corp | 半導体集積回路装置及びメモリシステム |
| US8395923B2 (en) * | 2008-12-30 | 2013-03-12 | Intel Corporation | Antifuse programmable memory array |
| JP2010165397A (ja) * | 2009-01-14 | 2010-07-29 | Toshiba Corp | 不揮発性半導体記憶装置 |
| JP2010165442A (ja) * | 2009-01-19 | 2010-07-29 | Toshiba Corp | 不揮発性半導体記憶装置 |
| TWI514399B (zh) * | 2009-07-27 | 2015-12-21 | Sidense Corp | 非揮發性記憶體之冗餘方法 |
| US9123429B2 (en) | 2009-07-27 | 2015-09-01 | Sidense Corp. | Redundancy system for non-volatile memory |
| KR101061313B1 (ko) * | 2010-01-28 | 2011-08-31 | 주식회사 하이닉스반도체 | 보안 제어장치를 포함하는 반도체 메모리 장치 |
| US8724364B2 (en) | 2011-09-14 | 2014-05-13 | Semiconductor Components Industries, Llc | Electronic device including a nonvolatile memory structure having an antifuse component and a process of using the same |
| US8530283B2 (en) | 2011-09-14 | 2013-09-10 | Semiconductor Components Industries, Llc | Process for forming an electronic device including a nonvolatile memory structure having an antifuse component |
| US8741697B2 (en) | 2011-09-14 | 2014-06-03 | Semiconductor Components Industries, Llc | Electronic device including a nonvolatile memory structure having an antifuse component and a process of forming the same |
| KR20130104287A (ko) | 2012-03-13 | 2013-09-25 | 삼성전자주식회사 | 센싱 검증부를 포함하는 반도체 메모리 장치 |
| KR20130119196A (ko) * | 2012-04-23 | 2013-10-31 | 에스케이하이닉스 주식회사 | 반도체 장치 |
| US8964444B2 (en) * | 2012-04-25 | 2015-02-24 | Semiconductor Components Industries, Llc | One-time programmable memory, integrated circuit including same, and method therefor |
| US9135970B2 (en) * | 2013-02-08 | 2015-09-15 | Everspin Technologies, Inc. | Tamper detection and response in a memory device |
| US9218509B2 (en) | 2013-02-08 | 2015-12-22 | Everspin Technologies, Inc. | Response to tamper detection in a memory device |
| US10127998B2 (en) * | 2013-09-26 | 2018-11-13 | Nxp Usa, Inc. | Memory having one time programmable (OTP) elements and a method of programming the memory |
| TWI514396B (zh) * | 2014-01-23 | 2015-12-21 | Sidense Corp | 非揮發性記憶體之冗餘系統 |
| US9336872B2 (en) * | 2014-03-11 | 2016-05-10 | Everspin Technologies, Inc. | Nonvolatile logic and security circuits |
| US9496270B2 (en) | 2014-05-30 | 2016-11-15 | Qualcomm Incorporated | High density single-transistor antifuse memory cell |
| US9786383B2 (en) | 2015-02-25 | 2017-10-10 | Ememory Technology Inc. | One time programmable non-volatile memory and read sensing method thereof |
| US9627088B2 (en) * | 2015-02-25 | 2017-04-18 | Ememory Technology Inc. | One time programmable non-volatile memory and read sensing method thereof |
| KR20170016108A (ko) | 2015-08-03 | 2017-02-13 | 삼성전자주식회사 | 오티피 메모리 장치의 프로그램 방법 및 이를 포함하는 반도체 집적 회로의 테스트 방법 |
| US10181357B2 (en) * | 2015-08-18 | 2019-01-15 | Ememory Technology Inc. | Code generating apparatus and one time programming block |
| KR102753310B1 (ko) * | 2016-12-13 | 2025-01-14 | 에스케이하이닉스 주식회사 | 반도체 장치 및 그의 동작 방법 |
| CN111192619A (zh) * | 2019-12-25 | 2020-05-22 | 北京时代民芯科技有限公司 | 一种基于栅氧击穿型反熔丝存储阵列的编程系统及方法 |
| JP7234178B2 (ja) * | 2020-03-19 | 2023-03-07 | 株式会社東芝 | 記憶装置 |
| JP2021149996A (ja) | 2020-03-23 | 2021-09-27 | 株式会社東芝 | 半導体記憶装置、及び半導体記憶装置の制御方法 |
| US11699496B2 (en) * | 2021-07-08 | 2023-07-11 | Changxin Memory Technologies, Inc. | Anti-fuse memory circuit |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6246496A (ja) * | 1985-08-23 | 1987-02-28 | Sony Corp | 固定記憶装置の書き込み方法 |
| JP2925138B2 (ja) * | 1987-09-29 | 1999-07-28 | 株式会社東芝 | 不揮発性半導体メモリ |
| JPH06187791A (ja) * | 1992-12-15 | 1994-07-08 | Mitsubishi Electric Corp | 半導体記憶装置 |
| KR100267492B1 (ko) | 1998-06-11 | 2000-11-01 | 김영환 | 여분 셀의 프로그래밍을 위한 엔티퓨즈를 가지는 리페어 회로및 그 제조 방법 |
| US6522582B1 (en) | 1999-03-05 | 2003-02-18 | Xilinx, Inc. | Non-volatile memory array using gate breakdown structures |
| US6243294B1 (en) | 1999-03-05 | 2001-06-05 | Xilinx, Inc. | Memory architecture for non-volatile storage using gate breakdown structure in standard sub 0.35 micron process |
| JP3821637B2 (ja) * | 2000-08-24 | 2006-09-13 | 株式会社東芝 | 半導体集積回路装置 |
| US6384664B1 (en) * | 2000-10-05 | 2002-05-07 | Texas Instruments Incorporated | Differential voltage sense circuit to detect the state of a CMOS process compatible fuses at low power supply voltages |
| JP2003168734A (ja) | 2001-11-29 | 2003-06-13 | Mitsubishi Electric Corp | 半導体装置及びその制御方法、その製造方法 |
| US6693819B2 (en) * | 2002-01-08 | 2004-02-17 | Broadcom Corporation | High voltage switch circuitry |
| US7211843B2 (en) * | 2002-04-04 | 2007-05-01 | Broadcom Corporation | System and method for programming a memory cell |
| WO2003096353A1 (en) * | 2002-05-08 | 2003-11-20 | Semtech Corporation | Method and apparatus for improving the reliability of the reading of integrated circuit fuses |
| US6735108B2 (en) * | 2002-07-08 | 2004-05-11 | Micron Technology, Inc. | ROM embedded DRAM with anti-fuse programming |
| JP2004087002A (ja) * | 2002-08-27 | 2004-03-18 | Fujitsu Ltd | Acセンス方式のメモリ回路 |
| US6775189B2 (en) * | 2002-12-25 | 2004-08-10 | Ememory Technology Inc. | Option fuse circuit using standard CMOS manufacturing process |
| US6944083B2 (en) * | 2003-11-17 | 2005-09-13 | Sony Corporation | Method for detecting and preventing tampering with one-time programmable digital devices |
| JP4282529B2 (ja) | 2004-04-07 | 2009-06-24 | 株式会社東芝 | 半導体集積回路装置及びそのプログラム方法 |
-
2004
- 2004-04-07 JP JP2004113440A patent/JP4282529B2/ja not_active Expired - Fee Related
- 2004-07-26 US US10/898,249 patent/US7046569B2/en not_active Expired - Fee Related
-
2005
- 2005-03-16 TW TW094107989A patent/TWI291177B/zh not_active IP Right Cessation
- 2005-04-05 CN CNB2005100650532A patent/CN100524525C/zh not_active Expired - Fee Related
- 2005-04-06 KR KR1020050028373A patent/KR100686273B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US7046569B2 (en) | 2006-05-16 |
| JP2005302091A (ja) | 2005-10-27 |
| JP4282529B2 (ja) | 2009-06-24 |
| KR20060045511A (ko) | 2006-05-17 |
| TWI291177B (en) | 2007-12-11 |
| CN1681045A (zh) | 2005-10-12 |
| TW200603167A (en) | 2006-01-16 |
| US20050226078A1 (en) | 2005-10-13 |
| CN100524525C (zh) | 2009-08-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100686273B1 (ko) | 반도체 집적 회로 장치 및 그 프로그램 방법 | |
| KR100591026B1 (ko) | 퓨즈 검출 회로를 갖는 집적 회로 메모리 | |
| US6967881B2 (en) | Semiconductor integrated circuit and method of manufacturing of semiconductor integrated circuit | |
| US6590825B2 (en) | Non-volatile flash fuse element | |
| JP4772328B2 (ja) | 不揮発性半導体記憶装置 | |
| US8305822B2 (en) | Fuse circuit and semiconductor memory device including the same | |
| US20070279998A1 (en) | Semiconductor device and semiconductor integrated circuit | |
| US20090002119A1 (en) | Fuse sensing scheme | |
| EP1297620A2 (en) | Digital trimming of op amp offset voltage and quiescent current using non-volatile memory | |
| US7760564B2 (en) | Non-volatile memory structure | |
| US7672186B2 (en) | Antifuse replacement determination circuit and method of semiconductor memory device | |
| US7426142B1 (en) | Device and method for sensing programming status of non-volatile memory elements | |
| US7289358B2 (en) | MTP NVM elements by-passed for programming | |
| US8270233B2 (en) | Semiconductor memory device | |
| US6654300B2 (en) | Semiconductor memory device having internal circuit screening function | |
| JP3799332B2 (ja) | オプションフェーズ回路 | |
| US20050195016A1 (en) | Small size circuit for detecting a status of an electrical fuse with low read current | |
| US20080062738A1 (en) | Storage element and method for operating a storage element | |
| JP2007273772A (ja) | 半導体装置 | |
| KR100543192B1 (ko) | 프로그래머블 퓨즈 회로 및 그를 구비한 반도체메모리장치 | |
| KR20180020364A (ko) | 바이어스 전류 생성회로 및 이를 이용한 오티피 메모리 소자 읽기 방법 | |
| TWI281671B (en) | An option fuse circuit using standard CMOS manufacturing process | |
| WO2023221389A1 (zh) | 反熔丝电路及反熔丝单元烧写状态验证方法 | |
| TW591794B (en) | Pure CMOS latch-type fuse circuit | |
| US20080266736A1 (en) | Method and Apparatus for Implementing APS Voltage Level Activation With Secondary Chip in Stacked-Chip Technology |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A201 | Request for examination | ||
| PA0109 | Patent application |
St.27 status event code: A-0-1-A10-A12-nap-PA0109 |
|
| PA0201 | Request for examination |
St.27 status event code: A-1-2-D10-D11-exm-PA0201 |
|
| PG1501 | Laying open of application |
St.27 status event code: A-1-1-Q10-Q12-nap-PG1501 |
|
| E902 | Notification of reason for refusal | ||
| PE0902 | Notice of grounds for rejection |
St.27 status event code: A-1-2-D10-D21-exm-PE0902 |
|
| E13-X000 | Pre-grant limitation requested |
St.27 status event code: A-2-3-E10-E13-lim-X000 |
|
| P11-X000 | Amendment of application requested |
St.27 status event code: A-2-2-P10-P11-nap-X000 |
|
| P13-X000 | Application amended |
St.27 status event code: A-2-2-P10-P13-nap-X000 |
|
| E701 | Decision to grant or registration of patent right | ||
| PE0701 | Decision of registration |
St.27 status event code: A-1-2-D10-D22-exm-PE0701 |
|
| GRNT | Written decision to grant | ||
| PR0701 | Registration of establishment |
St.27 status event code: A-2-4-F10-F11-exm-PR0701 |
|
| PR1002 | Payment of registration fee |
St.27 status event code: A-2-2-U10-U11-oth-PR1002 Fee payment year number: 1 |
|
| PG1601 | Publication of registration |
St.27 status event code: A-4-4-Q10-Q13-nap-PG1601 |
|
| R17-X000 | Change to representative recorded |
St.27 status event code: A-5-5-R10-R17-oth-X000 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 4 |
|
| FPAY | Annual fee payment |
Payment date: 20110127 Year of fee payment: 5 |
|
| PR1001 | Payment of annual fee |
St.27 status event code: A-4-4-U10-U11-oth-PR1001 Fee payment year number: 5 |
|
| LAPS | Lapse due to unpaid annual fee | ||
| PC1903 | Unpaid annual fee |
St.27 status event code: A-4-4-U10-U13-oth-PC1903 Not in force date: 20120216 Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE |
|
| PC1903 | Unpaid annual fee |
St.27 status event code: N-4-6-H10-H13-oth-PC1903 Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE Not in force date: 20120216 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-4-4-P10-P22-nap-X000 |
|
| P22-X000 | Classification modified |
St.27 status event code: A-4-4-P10-P22-nap-X000 |
|
| R18-X000 | Changes to party contact information recorded |
St.27 status event code: A-5-5-R10-R18-oth-X000 |