JP5552395B2 - 液晶表示装置 - Google Patents
液晶表示装置 Download PDFInfo
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- JP5552395B2 JP5552395B2 JP2010177489A JP2010177489A JP5552395B2 JP 5552395 B2 JP5552395 B2 JP 5552395B2 JP 2010177489 A JP2010177489 A JP 2010177489A JP 2010177489 A JP2010177489 A JP 2010177489A JP 5552395 B2 JP5552395 B2 JP 5552395B2
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- oxide
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- oxide semiconductor
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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Description
薄膜トランジスタを含む半導体装置の作製工程について、図1乃至図5を用いて説明する。
本実施の形態では、実施の形態1において、酸化物半導体層とソース電極層又はドレイン電極層との間に、ソース領域及びドレイン領域として酸化物導電層を設ける例を図6及び図7に示す。従って、他は実施の形態1と同様に行うことができ、実施の形態1と同一部分又は同様な機能を有する部分、及び工程の繰り返しの説明は省略する。また、図6及び図7は、図1乃至図5と工程が一部異なる点以外は同じであるため、同じ箇所には同じ符号を用い、同じ箇所の詳細な説明は省略する。
ここでは、第1の基板と第2の基板の間に液晶層を封入する液晶表示装置において、第2の基板に設けられた対向電極と電気的に接続するための共通接続部を第1の基板上に形成する例を示す。なお、第1の基板にはスイッチング素子として薄膜トランジスタが形成されており、共通接続部の作製工程を画素部のスイッチング素子の作製工程と共通化させることで工程を複雑にすることなく形成する。
本実施の形態では、薄膜トランジスタの作製工程の一部が実施の形態1と異なる例を図10に示す。図10は、図1乃至図5と工程が一部異なる点以外は同じであるため、同じ箇所には同じ符号を用い、同じ箇所の詳細な説明は省略する。
本実施の形態では、同一基板上に少なくとも駆動回路の一部と、画素部に配置する薄膜トランジスタを作製する例について以下に説明する。
薄膜トランジスタを作製し、該薄膜トランジスタを画素部、さらには駆動回路に用いて表示機能を有する半導体装置(表示装置ともいう)を作製することができる。また、薄膜トランジスタを駆動回路の一部または全体を、画素部と同じ基板上に一体形成し、システムオンパネルを形成することができる。
本明細書に開示する半導体装置は、フレキシビリティを持たすことによって電子書籍(電子ブック)、ポスター、電車などの乗り物の車内広告、クレジットカード等の各種カードにおける表示部等に適用することができる。電子機器の一例を図18に示す。
本明細書に開示する半導体装置は、さまざまな電子機器(遊技機も含む)に適用することができる。電子機器としては、例えば、テレビジョン装置(テレビ、またはテレビジョン受信機ともいう)、コンピュータ用などのモニタ、デジタルカメラ、デジタルビデオカメラ、デジタルフォトフレーム、携帯電話機(携帯電話、携帯電話装置ともいう)、携帯型ゲーム機、携帯情報端末、音響再生装置、パチンコ機などの大型ゲーム機などが挙げられる。
本実施の形態では、半導体装置の一形態として、実施の形態1乃至6で示す薄膜トランジスタを有する表示装置の例を図22乃至図35を用いて説明する。本実施の形態は、表示素子として液晶素子を用いた液晶表示装置の例を図22乃至図35を用いて説明する。図22乃至図35の液晶表示装置に用いられるTFT628、629は、実施の形態1、2、5、6で示す薄膜トランジスタを適用することができ、実施の形態1乃至6で示す工程で同様に作製できる電気特性及び信頼性の高い薄膜トランジスタである。
11 配線
12 配線
13 配線
14 配線
15 配線
21 入力端子
22 入力端子
23 入力端子
24 入力端子
25 入力端子
26 出力端子
27 出力端子
28 薄膜トランジスタ
31 トランジスタ
32 トランジスタ
33 トランジスタ
34 トランジスタ
35 トランジスタ
36 トランジスタ
37 トランジスタ
38 トランジスタ
39 トランジスタ
40 トランジスタ
41 トランジスタ
42 トランジスタ
43 トランジスタ
51 電源線
52 電源線
53 電源線
83 透光性基板
84 遮光部
85 回折格子
86 光透過率
87 半透過部
88 遮光部
89 光透過率
100 基板
101 電極
102 ゲート絶縁層
103 酸化物半導体層
107 酸化物絶縁層
108 容量配線層
109 平坦化絶縁層
110 画素電極層
111 導電層
116 チャネル形成領域
118 コンタクトホール
119 コンタクトホール
120 酸化物半導体層
121 端子
122 端子
125 コンタクトホール
126 コンタクトホール
127 コンタクトホール
128 端子電極
129 端子電極
130 酸化物半導体層
131 酸化物半導体層
133 酸化物半導体層
134 酸化物半導体層
137 金属導電層
139 酸化物導電層
140 酸化物導電層
145 配線層
145 容量
146 容量
147 容量
148 容量
150 端子
151 端子
152 ゲート絶縁層
153 接続電極
154 保護絶縁層
155 導電膜
156 電極
157 酸化物半導体層
158 酸化物半導体層
161 ゲート電極層
162 導電層
162 配線層
163 酸化物半導体層
166 チャネル形成領域
168 酸化物半導体層
170 薄膜トランジスタ
171 薄膜トランジスタ
173 薄膜トランジスタ
175 酸化物導電層
177 酸化物導電層
180 薄膜トランジスタ
181 薄膜トランジスタ
183 薄膜トランジスタ
185 金属導電層
190 基板
190 対向基板
191 絶縁層
192 液晶層
193 絶縁層
194 対向電極層
195 着色層
202 ゲート絶縁層
203 保護絶縁層
205 共通電位線
206 共通電極層
210 酸化物半導体層
220 薄膜トランジスタ
227 画素電極層
402 ゲート絶縁層
600 基板
601 対向基板
602 ゲート配線
603 ゲート配線
604 容量配線
605 容量配線
606 ゲート絶縁層
607 電極層
609 共通電位線
615 容量電極
616 配線
617 配線
618 配線
619 配線
620 絶縁膜
621 絶縁膜
622 絶縁膜
623 コンタクトホール
624 画素電極層
625 スリット
626 画素電極層
627 コンタクトホール
628 TFT
629 TFT
630 保持容量部
630 容量配線
631 保持容量部
632 遮光膜
633 コンタクトホール
636 着色膜
637 平坦化膜
640 対向電極層
641 スリット
644 突起
646 配向膜
648 配向膜
650 液晶層
651 液晶素子
652 液晶素子
660 容量配線
81a グレートーンマスク
81b ハーフトーンマスク
104a 酸化物導電層
104b 酸化物導電層
105a ソース電極層
105b ドレイン電極層
117a 高抵抗ソース領域
117b 高抵抗ドレイン領域
135a レジストマスク
135b レジストマスク
136a レジストマスク
136c レジストマスク
164a 酸化物導電層
164b 酸化物導電層
165a ソース電極層
165b ドレイン電極層
167a 高抵抗ソース領域
167b 高抵抗ドレイン領域
196a 偏光板
2600 TFT基板
2601 対向基板
2602 シール材
2603 画素部
2604 表示素子
2605 着色層
2606 偏光板
2607 偏光板
2608 配線回路部
2609 フレキシブル配線基板
2610 冷陰極管
2611 反射板
2612 回路基板
2613 拡散板
2700 電子書籍
2701 筐体
2703 筐体
2705 表示部
2707 表示部
2711 軸部
2721 電源
2723 操作キー
2725 スピーカ
4001 基板
4002 画素部
4003 信号線駆動回路
4004 走査線駆動回路
4005 シール材
4006 基板
4008 液晶層
4010 薄膜トランジスタ
4011 薄膜トランジスタ
4013 液晶素子
4015 接続端子電極
4016 端子電極
4018 FPC
4019 異方性導電膜
4020 保護絶縁層
4021 絶縁層
4030 画素電極層
4031 対向電極層
4032 絶縁層
4040 導電層
5300 基板上
5300 基板
5301 画素部
5302 走査線駆動回路
5303 走査線駆動回路
5304 信号線駆動回路
5305 タイミング制御回路
5601 シフトレジスタ
5602 スイッチング回路
5603 薄膜トランジスタ
5604 配線
5605 配線
606a ゲート絶縁層
606b ゲート絶縁層
9201 表示部
9202 表示ボタン
9203 操作スイッチ
9205 調節部
9206 カメラ部
9207 スピーカ
9208 マイク
9301 上部筐体
9302 下部筐体
9303 表示部
9304 キーボード
9305 外部接続ポート
9306 ポインティングデバイス
9307 表示部
9600 テレビジョン装置
9601 筐体
9603 表示部
9605 スタンド
9607 表示部
9609 操作キー
9610 リモコン操作機
9700 デジタルフォトフレーム
9701 筐体
9703 表示部
9881 筐体
9882 表示部
9883 表示部
9884 スピーカ部
9885 操作キー
9886 記録媒体挿入部
9887 接続端子
9888 センサ
9889 マイクロフォン
9890 LEDランプ
9891 筐体
9893 連結部
9900 スロットマシン
9901 筐体
9903 表示部
Claims (8)
- 同一基板上に、画素部と、駆動回路部とを有し、
前記画素部は、第1のトランジスタと、画素電極と、前記画素電極上の液晶層とを有し、
前記第1のトランジスタは、
第1のゲート電極と、
前記第1のゲート電極上の、ゲート絶縁層と、
前記ゲート絶縁層上の、第1の酸化物半導体層と、
前記第1の酸化物半導体層と電気的に接続された、第1のソース電極と、
前記第1の酸化物半導体層と電気的に接続された、第1のドレイン電極と、を少なくとも有し、
前記第1のソース電極及び第1のドレイン電極上に、酸化物絶縁層を有し、
前記画素電極は、前記酸化物絶縁層が有する第1のコンタクトホールを介して、前記第1のソース電極又は前記第1のドレイン電極と電気的に接続され、
前記駆動回路部は、第2のトランジスタと、第1の導電層と、第2の導電層とを有し、
前記第2のトランジスタは、
第2のゲート電極と、
前記第2のゲート電極上の、前記ゲート絶縁層と、
前記ゲート絶縁層上の、第2の酸化物半導体層と、
前記第2の酸化物半導体層と電気的に接続された、第2のソース電極と、
前記第2の酸化物半導体層と電気的に接続された、第2のドレイン電極と、を少なくとも有し、
前記第2のソース電極及び第2のドレイン電極上に、前記酸化物絶縁層を有し、
前記酸化物絶縁層上に、第3の導電層を有し、
前記第2の酸化物半導体層は、前記第2のゲート電極と、前記第3の導電層とによって挟み込まれており、
前記第1のゲート電極と、前記第2のゲート電極と、前記第1の導電層とは、同一の導電膜を加工する工程を経て形成されたものであり、
前記画素電極と、前記第2の導電層と、前記第3の導電層とは、同一の導電膜を加工する工程を経て形成されたものであり、
前記第2の導電層は、前記ゲート絶縁層が有する第2のコンタクトホールに設けられた領域を有し、
前記第2の導電層は、前記酸化物絶縁層が有する第3のコンタクトホールに設けられた領域を有し、
前記第3のコンタクトホールは、前記第2のコンタクトホールと重なる領域を有し、
前記第1の導電層は、前記第2の導電層を介して、前記第2のソース電極又は前記第2のドレイン電極と電気的に接続されていることを特徴とする液晶表示装置。 - 同一基板上に、画素部と、駆動回路部とを有し、
前記画素部は、第1のトランジスタと、画素電極と、前記画素電極上の液晶層とを有し、
前記第1のトランジスタは、
第1のゲート電極と、
前記第1のゲート電極上の、ゲート絶縁層と、
前記ゲート絶縁層上の、第1の酸化物半導体層と、
前記第1の酸化物半導体層と電気的に接続された、第1のソース電極と、
前記第1の酸化物半導体層と電気的に接続された、第1のドレイン電極と、を少なくとも有し、
前記第1のソース電極及び第1のドレイン電極上に、酸化物絶縁層を有し、
前記画素電極は、前記酸化物絶縁層が有する第1のコンタクトホールを介して、前記第1のソース電極又は前記第1のドレイン電極と電気的に接続され、
前記駆動回路部は、第2のトランジスタと、第1の導電層と、第2の導電層とを有し、
前記第2のトランジスタは、
第2のゲート電極と、
前記第2のゲート電極上の、前記ゲート絶縁層と、
前記ゲート絶縁層上の、第2の酸化物半導体層と、
前記第2の酸化物半導体層と電気的に接続された、第2のソース電極と、
前記第2の酸化物半導体層と電気的に接続された、第2のドレイン電極と、を少なくとも有し、
前記第2のソース電極及び第2のドレイン電極上に、前記酸化物絶縁層を有し、
前記酸化物絶縁層上に、第3の導電層を有し、
前記第2の酸化物半導体層は、チャネル形成領域を有し、
前記第2のゲート電極は、前記チャネル形成領域のチャネル長方向の長さを越えて延びた領域を有し、
前記第3の導電層は、前記チャネル形成領域のチャネル長方向の長さを越えて延びた領域を有し、
前記第1のゲート電極と、前記第2のゲート電極と、前記第1の導電層とは、同一の導電膜を加工する工程を経て形成されたものであり、
前記画素電極と、前記第2の導電層と、前記第3の導電層とは、同一の導電膜を加工する工程を経て形成されたものであり、
前記第2の導電層は、前記ゲート絶縁層が有する第2のコンタクトホールに設けられた領域を有し、
前記第2の導電層は、前記酸化物絶縁層が有する第3のコンタクトホールに設けられた領域を有し、
前記第3のコンタクトホールは、前記第2のコンタクトホールと重なる領域を有し、
前記第1の導電層は、前記第2の導電層を介して、前記第2のソース電極又は前記第2のドレイン電極と電気的に接続されていることを特徴とする液晶表示装置。 - 請求項1又は請求項2において
前記基板の周辺に、端子部を有し、
前記端子部は、
第4の導電層と、
前記第4の導電層上の、前記ゲート絶縁層と、
前記ゲート絶縁層上の、第3の酸化物半導体層と、
前記第3の酸化物半導体層上の、第5の導電層と、
前記第5の導電層と電気的に接続された、第6の導電層とを有することを特徴とする液晶表示装置。 - 請求項1乃至請求項3のいずれか一において、
前記第3の導電層は、第3のゲート電極として機能することを特徴とする液晶表示装置。 - 請求項1乃至請求項4のいずれか一において、
前記第3の導電層は、前記第2のゲート電極と同じ電位を有することを特徴とする液晶表示装置。 - 請求項1乃至請求項5のいずれか一において、
前記第3の導電層は、フローティングであることを特徴とする液晶表示装置。 - 請求項1乃至請求項6のいずれか一において、
前記ゲート絶縁層は、酸化珪素層、酸化窒化珪素層、又は酸化アルミニウム層の単層又は積層を有することを特徴とする液晶表示装置。 - 請求項1乃至請求項7のいずれか一において、
前記画素電極と、前記第2の導電層と、前記第3の導電層とは、酸化インジウム、酸化インジウム酸化スズ合金、酸化インジウム酸化亜鉛合金、または酸化亜鉛を有することを特徴とする液晶表示装置。
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